WO2002065492A2 - Integrated transformer - Google Patents
Integrated transformer Download PDFInfo
- Publication number
- WO2002065492A2 WO2002065492A2 PCT/US2002/001742 US0201742W WO02065492A2 WO 2002065492 A2 WO2002065492 A2 WO 2002065492A2 US 0201742 W US0201742 W US 0201742W WO 02065492 A2 WO02065492 A2 WO 02065492A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- magnetic layer
- conductor
- forming
- over
- transformer
- Prior art date
Links
- 230000005291 magnetic effect Effects 0.000 claims abstract description 314
- 239000004020 conductor Substances 0.000 claims abstract description 195
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 239000000463 material Substances 0.000 claims abstract description 19
- 239000004065 semiconductor Substances 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 71
- 239000000696 magnetic material Substances 0.000 claims description 56
- 239000010941 cobalt Substances 0.000 claims description 48
- 229910017052 cobalt Inorganic materials 0.000 claims description 48
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 48
- 229910052715 tantalum Inorganic materials 0.000 claims description 8
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 8
- 239000010955 niobium Substances 0.000 claims description 6
- 229910052761 rare earth metal Inorganic materials 0.000 claims description 6
- 229910052758 niobium Inorganic materials 0.000 claims description 4
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 claims description 4
- 229910000808 amorphous metal alloy Inorganic materials 0.000 claims 6
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims 4
- 229910052726 zirconium Inorganic materials 0.000 claims 4
- 229910000531 Co alloy Inorganic materials 0.000 claims 2
- 238000010079 rubber tapping Methods 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 44
- 229910045601 alloy Inorganic materials 0.000 description 43
- 239000000956 alloy Substances 0.000 description 43
- GNEMDYVJKXMKCS-UHFFFAOYSA-N cobalt zirconium Chemical compound [Co].[Zr] GNEMDYVJKXMKCS-UHFFFAOYSA-N 0.000 description 24
- 239000000377 silicon dioxide Substances 0.000 description 22
- 239000010936 titanium Substances 0.000 description 20
- 238000000059 patterning Methods 0.000 description 17
- 238000010586 diagram Methods 0.000 description 14
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 14
- 229920002120 photoresistant polymer Polymers 0.000 description 12
- 235000012239 silicon dioxide Nutrition 0.000 description 11
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 10
- 229910052719 titanium Inorganic materials 0.000 description 10
- 239000003989 dielectric material Substances 0.000 description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 238000000151 deposition Methods 0.000 description 8
- 229910052702 rhenium Inorganic materials 0.000 description 8
- WUAPFZMCVAUBPE-UHFFFAOYSA-N rhenium atom Chemical compound [Re] WUAPFZMCVAUBPE-UHFFFAOYSA-N 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 239000010703 silicon Substances 0.000 description 8
- 238000005530 etching Methods 0.000 description 7
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 6
- 229910000428 cobalt oxide Inorganic materials 0.000 description 6
- 230000005672 electromagnetic field Effects 0.000 description 6
- 238000005240 physical vapour deposition Methods 0.000 description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 6
- ZGWQKLYPIPNASE-UHFFFAOYSA-N [Co].[Zr].[Ta] Chemical compound [Co].[Zr].[Ta] ZGWQKLYPIPNASE-UHFFFAOYSA-N 0.000 description 5
- 239000002253 acid Substances 0.000 description 5
- -1 aluminum-copper-silicon Chemical compound 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- IVMYJDGYRUAWML-UHFFFAOYSA-N cobalt(ii) oxide Chemical compound [Co]=O IVMYJDGYRUAWML-UHFFFAOYSA-N 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000011049 filling Methods 0.000 description 3
- 230000004907 flux Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000035699 permeability Effects 0.000 description 3
- 210000002381 plasma Anatomy 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052692 Dysprosium Inorganic materials 0.000 description 2
- 229910052779 Neodymium Inorganic materials 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 229910052777 Praseodymium Inorganic materials 0.000 description 2
- 229910000676 Si alloy Inorganic materials 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- XFAYPONASJRQET-UHFFFAOYSA-N [Re].[Zr].[Co] Chemical compound [Re].[Zr].[Co] XFAYPONASJRQET-UHFFFAOYSA-N 0.000 description 2
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 description 2
- 239000006117 anti-reflective coating Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- KBQHZAAAGSGFKK-UHFFFAOYSA-N dysprosium atom Chemical compound [Dy] KBQHZAAAGSGFKK-UHFFFAOYSA-N 0.000 description 2
- 230000005350 ferromagnetic resonance Effects 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 230000005415 magnetization Effects 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- PUDIUYLPXJFUGB-UHFFFAOYSA-N praseodymium atom Chemical compound [Pr] PUDIUYLPXJFUGB-UHFFFAOYSA-N 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 206010010144 Completed suicide Diseases 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- WPPDFTBPZNZZRP-UHFFFAOYSA-N aluminum copper Chemical compound [Al].[Cu] WPPDFTBPZNZZRP-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 238000013021 overheating Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/041—Printed circuit coils
- H01F41/042—Printed circuit coils by thin film techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/041—Printed circuit coils
- H01F41/046—Printed circuit coils structurally combined with ferromagnetic material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F2017/0046—Printed inductances with a conductive path having a bridge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F2017/008—Electric or magnetic shielding of printed inductances
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the present invention relates generally to the field of electrical transformers. More particularly, the present invention relates to the field of electrical transformers for integrated circuits (ICs) and IC packages.
- ICs integrated circuits
- transformers are typically used in a variety of microelectronic circuit applications such as, for example, power converters, power delivery devices, power isolation devices, and radio frequency (RF) and microwave circuitry including matching networks, oscillators, amplifiers, and filters. Because discrete transformers result in losses, for example, due to parasitic capacitance and resistance in connecting them to an integrated circuit and because discrete transformers incur a relatively high cost for assembly, transformers are preferably fabricated on-chip, that is integrated on an integrated circuit, and/or in a package housing an integrated circuit.
- RF radio frequency
- Figure 1 illustrates, for one embodiment, a plan view of an integrated inductor
- Figure 2 illustrates, for one embodiment, a flow diagram to form the integrated inductor of Figure 1;
- Figure 3 illustrates, for one embodiment, a cross-sectional view of a substrate over which a first dielectric layer and a magnetic layer are formed
- Figure 4 illustrates, for one embodiment, a cross-sectional view of the substrate of Figure 3 after the first magnetic layer has been patterned and a second dielectric layer has been formed
- Figure 5 illustrates, for one embodiment, a cross-sectional view of the substrate of Figure 4 after the second dielectric layer has been patterned and a conductive layer has been formed;
- Figure 6 illustrates, for one embodiment, a cross-sectional view of the substrate of Figure 5 after the conductive layer has been patterned and a third dielectric layer has been formed;
- Figure 7 illustrates, for one embodiment, a cross-sectional view of the substrate of Figure 6 after the third dielectric layer has been patterned and a second magnetic layer has been formed and patterned;
- Figure 8 illustrates, for one embodiment, a flow diagram to form a magnetic layer
- Figure 9 illustrates, for one embodiment, a cross-sectional view of a substrate over which a dielectric layer and a magnetic layer have been formed
- Figure 10 illustrates, for one embodiment, a cross-sectional view of the substrate of Figure 9 after a patterned mask layer has been formed and the magnetic layer has been patterned;
- Figure 11 illustrates, for one embodiment, a plan view of an integrated transformer
- Figure 12 illustrates, for one embodiment, a cross-sectional view of the integrated transformer of Figure 11 ;
- Figure 13 illustrates, for one embodiment, a plan view of another integrated transformer
- Figure 14 illustrates, for one embodiment, a plan view of another integrated transformer
- Figure 15 illustrates, for one embodiment, a plan view of another integrated transformer
- Figure 16 illustrates, for one embodiment, a plan view of another integrated transformer
- Figure 17 illustrates, for one embodiment, a block diagram of an integrated circuit comprising one or more transformers
- Figure 18 illustrates, for one embodiment, a block diagram of an integrated circuit package comprising one or more transformers.
- Figure 1 illustrates, for one embodiment, an integrated inductor 100.
- Integrated inductor 100 comprises a generally spiral-shaped conductor 110 defining a signal path along which current may flow to generate an electromagnetic field around conductor 110.
- Current may flow through conductor 110 by applying a voltage potential across an innermost node 112 near the beginning of an innermost turn 114 of conductor 110 and an outermost node 116 near the end of an outermost turn 118 of conductor 110.
- conductor 110 may define any suitable number of one or more turns and any suitable fraction of a turn of any suitable shape. Each turn may be rectangular, hexagonal, or circular in shape, for example.
- Conductor 110 may comprise any suitable conductive material and may have any suitable dimensions.
- the signal path defined by conductor 110 may have any suitable width, thickness, and length with any suitable spacing between turns to form a generally spiral-shaped conductor 110 covering an area of any suitable shape and size.
- a spiral or spiral-shaped conductor includes any conductor defining a signal path having at least one turn with each successive turn, if any, substantially surrounding the innermost turn and any preceding turn.
- Inductor 100 for one embodiment comprises a magnetic layer 120.
- Conductor 110 is positioned over magnetic layer 120 and for one embodiment is separated from magnetic layer 120 by at least a dielectric layer.
- a dielectric layer may comprise any suitable dielectric material and have any suitable thickness. The dielectric material and thickness help determine the capacitance and therefore the resonance frequency ⁇ r for inductor 100.
- Magnetic layer 120 forms a voltage reference plane for inductor 100 to help contain electric and magnetic fields around conductor 110. Magnetic layer 120 therefore helps increase the inductance L of inductor 100, and therefore the quality factor Q for inductor 100.
- Magnetic layer 120 may comprise any suitable magnetic material and have any suitable shape, such as the rectangular shape illustrated in Figure 1 for example, and any suitable dimensions.
- Inductor 100 may be designed to have any suitable frequency range and any desirable quality factor Q «- ⁇ L/R, where ⁇ is the operating frequency for inductor 100, L is the inductance of inductor 100, and R is the resistance of inductor 100.
- ⁇ is the operating frequency for inductor 100
- L is the inductance of inductor 100
- R is the resistance of inductor 100.
- Q of inductor 100 is proportional to the inductance L of inductor 100 and inversely proportional to the resistance R of inductor 100
- inductor 100 can be designed with a relatively higher inductance L, and therefore a relatively higher quality factor Q, for a given area or resistance R of inductor 100.
- inductor 100 can be designed with a relatively smaller area and therefore a relatively lower resistance R and capacitance, resulting in a relatively higher resonance frequency ⁇ r and a relatively higher quality factor Q.
- Inductor 100 for one embodiment is formed over a substrate comprising a semiconductor material with at least a dielectric layer separating magnetic layer 120 from the substrate.
- a dielectric layer may comprise any suitable dielectric material and have any suitable thickness.
- Magnetic layer 120 for one embodiment defines slots, such as slots 122 and 124 for example, to help further reduce any Eddy currents in the substrate.
- Magnetic layer 120 may define any suitable number of one or more slots with any suitable dimensions and orientation at any suitable one or more locations relative to conductor 110.
- One or more slots may be perpendicular to or at any other suitable angle relative to the flow of current through conductor 110. Defining slots in magnetic layer 120 also reduces Eddy currents that can form in magnetic layer 120 and helps to increase the resonance frequency ⁇ r for inductor 100.
- Magnetic layer 120 for one embodiment has a relatively high magnetic permeability, a relatively high saturation magnetization, and a relatively high magnetic resonance frequency to allow inductor 110 to operate at relatively high frequencies, such as in the GigaHertz (GHz) range for example.
- Permeability is a measure of the ability of a magnetic material to magnetize.
- a non-magnetic material has a relative permeability of one.
- a magnetic material having a relatively high saturation magnetization allows for relatively high currents to be used.
- the increase in inductance L due to magnetic layer 120 helps increase the quality factor Q for inductor 100.
- Magnetic layer 120 for one embodiment is compatible with available semiconductor processing and packaging technology that may be used to form a chip having inductor 100. That is, magnetic layer 120 may be formed and optionally patterned using available semiconductor processing technology and may generally withstand relatively high temperatures encountered in processing and packaging a chip on which inductor 100 is formed without crystallizing or significantly changing the relevant properties of magnetic layer 120.
- Magnetic layer 120 for one embodiment comprises cobalt (Co).
- Magnetic layer 120 for one embodiment comprises an amorphous cobalt (Co) alloy comprising cobalt (Co) and any suitable one or more elements of any suitable atomic or weight percentage.
- the amorphous cobalt (Co) alloy may have any suitable atomic order.
- the amorphous cobalt (Co) alloy has an atomic order in the range of approximately 1 angstrom (A) to approximately 100 angstroms (A).
- the amorphous cobalt (Co) alloy has an atomic order in the range of approximately 1 angstrom (A) to approximately 25 angstroms (A).
- the amorphous cobalt (Co) alloy has an atomic order in the range of approximately 1 angstrom (A) to approximately 10 angstroms (A).
- Magnetic layer 120 for one embodiment comprises an amorphous cobalt (Co) alloy comprising cobalt (Co) and zirconium (Zr). Zirconium (Zr) helps make cobalt (Co) amorphous.
- Magnetic layer 120 for one embodiment comprises a cobalt-zirconium (CoZr) alloy having one or more additional elements, such as tantalum (Ta) and niobium (Nb) for example, that help make the cobalt-zirconium (CoZr) alloy magnetically softer.
- Magnetic layer 120 for one embodiment comprises a cobalt-zirconium (CoZr) alloy having one or more additional elements, such as a rare earth element for example, that help increase the ferromagnetic resonance of the cobalt-zirconium (CoZr) alloy.
- Rare earth elements include rhenium (Re), neodymium (Nd), praseodymium (Pr), and dysprosium (Dy) for example.
- Rhenium (Re) help reduce stress and magnetostriction for the cobalt-zirconium (CoZr) alloy.
- magnetic layer 120 comprises a cobalt-zirconium (CoZr) alloy
- magnetic layer 120 may comprise, for example, approximately 3 atomic percent to approximately 10 atomic percent zirconium (Zr).
- magnetic layer 120 comprises a cobalt-zirconium-tantalum (CoZrTa) alloy
- magnetic layer 120 may comprise, for example, approximately 3 atomic percent to approximately 10 atomic percent zirconium (Zr) and may comprise up to and including approximately 10 atomic percent tantalum (Ta).
- Magnetic layer 120 for one embodiment comprises approximately 91.5 atomic percent cobalt (Co), approximately 4 atomic percent zirconium (Zr), and approximately 4.5 atomic percent tantalum (Ta).
- CoZrTa alloy can operate in the GigaHertz (GHz) range and can withstand temperatures up to approximately 450° Celsius without crystallizing or significantly changing its relevant properties.
- magnetic layer 120 comprises a cobalt-zirconium-rhenium (CoZrRe) alloy
- magnetic layer 120 may comprise, for example, approximately 3 atomic percent to approximately 10 atomic percent zirconium (Zr) and may comprise up to and including approximately 3 atomic percent rhenium (Re).
- Magnetic layer 120 for one embodiment comprises approximately 89 atomic percent cobalt (Co), approximately 8 atomic percent zirconium (Zr), and approximately 3 atomic percent rhenium (Re).
- Magnetic layer 120 may have any suitable thickness. Magnetic layer 120 for one embodiment has a thickness in the range of approximately 0.05 microns ( ⁇ ) to approximately 2.0 microns ( ⁇ ). Magnetic layer 120 for one embodiment has a thickness in the range of approximately 0.1 microns (/mi) to approximately 1.0 micron ( ⁇ m). Magnetic layer 120 for one embodiment has a thickness of approximately 0.4 microns ( ⁇ m).
- Inductor 100 for one embodiment comprises another magnetic layer positioned over conductor 110 and separated from conductor 110 by at least a dielectric layer.
- a dielectric layer may comprise any suitable dielectric material and have any suitable thickness. The dielectric material and thickness help determine the capacitance and therefore the resonance frequency ⁇ r of inductor 100.
- the other magnetic layer may comprise any suitable magnetic material and have any suitable shape and dimensions similarly as for magnetic layer 120. The other magnetic layer may or may not comprise the same magnetic material as magnetic layer 120. The other magnetic layer helps further increase the inductance L of inductor 100, and therefore the quality factor Q for inductor 100, when used with magnetic layer 120.
- the other magnetic layer for one embodiment defines slots to help reduce Eddy currents and increase the resonance frequency ⁇ r for inductor 100.
- the other magnetic layer may define any suitable number of one or more slots with any suitable dimensions and orientation at any suitable one or more locations relative to conductor 110.
- One or more slots may be perpendicular to or at any other suitable angle relative to the flow of current through conductor 110.
- Inductor 100 may optionally comprise both magnetic layer 120 and the other magnetic layer or only either one of the two magnetic layers.
- magnetic layer 120 and the other magnetic layer may be connected through a region 132 within innermost turn 114 of conductor 110 and/or at one or more regions, such as regions 134 and 136 for example, along a perimeter surrounding outermost turn 118 of conductor 110.
- Connecting magnetic layer 120 and the other magnetic layer helps increase the inductance L of inductor 100 and therefore the quality factor Q for inductor 100.
- Magnetic layer 120 and the other magnetic layer may be connected along a perimeter of any suitable shape, such as the rectangular shape illustrated in Figure 1 for example. Connecting magnetic layer 120 and the other magnetic layer at most or substantially all regions along a perimeter surrounding conductor 110 helps prevent straying of the magnetic flux generated by conductor 110.
- Inductor 100 may be fabricated in any suitable manner.
- inductor 100 is fabricated in accordance with flow diagram 200 as illustrated in Figure 2.
- a first dielectric layer 302 is formed over a substrate 300 as illustrated in Figure 3.
- the cross-sectional view of Figure 3 generally corresponds to a cross-section at line A-A of inductor 100 as illustrated in Figure 1.
- Substrate 300 may comprise any suitable semiconductor material, such as silicon (Si), silicon germanium (SiGe), germanium (Ge), or gallium arsenide (GaAs) for example.
- Dielectric layer 302 may comprise any suitable dielectric material, such as an oxide of silicon, silicon nitride, or silicon oxynitride for example, and may be formed to any suitable thickness using any suitable technique. Dielectric layer 302 helps insulate inductor 100 from substrate 300.
- dielectric layer 302 is formed by depositing silicon dioxide (SiO 2 ) over substrate 300 to a thickness of approximately 2 microns ( ⁇ m) using a suitable chemical vapor deposition (CVD) technique.
- dielectric layer 302 may be formed by growing approximately 2 microns ( ⁇ m) of silicon dioxide (SiO 2 ) on substrate 300.
- dielectric layer 302 may be formed over one or more suitable layers, such as one or more interconnect, via, dielectric, and or device layers for example, formed over substrate 300.
- Magnetic layer 304 is formed over dielectric layer 302 as illustrated in Figure 3.
- Magnetic layer 304 corresponds to magnetic layer 120 of Figure 1.
- Magnetic layer 304 may comprise any suitable magnetic material and may be formed to any suitable thickness using any suitable technique.
- magnetic layer 304 is formed by sputter depositing an amorphous cobalt (Co) alloy, such as a suitable cobalt-zirconium-tantalum (CoZrTa) alloy for example, to a thickness in the range of approximately 0.1 microns ( ⁇ m) to approximately 1.0 micron ( ⁇ m) over dielectric layer 302.
- the magnetic material for one embodiment for magnetic layer 304 may be deposited in the presence of an applied magnetic field to induce desirable magnetic properties in magnetic layer 304.
- magnetic layer 304 is patterned to define at least one slot, such as slot 322 for example, as illustrated in Figure 4.
- Magnetic layer 304 may be patterned to define any suitable number of one or more slots with any suitable dimensions and orientation at any suitable one or more locations.
- Magnetic layer 304 for one embodiment is patterned to define slots having a width in the range of approximately 0.05 microns ( ⁇ m) to approximately 15 microns ( ⁇ m).
- Magnetic layer 304 for one embodiment is patterned to define a conductive underpass 126 to innermost node 112 of inductor 110 as illustrated in Figure 1 to allow a voltage potential to be applied to node 112.
- Magnetic layer 304 may be patterned using any suitable patterning technique. Magnetic layer 304 for one embodiment is patterned by forming a patterned mask over magnetic layer 304, etching magnetic layer 304 to pattern magnetic layer 304 in accordance with the patterned mask, and removing the patterned mask.
- the patterned mask may comprise any suitable material, such as photoresist for example, formed to any suitable thickness and may be patterned using any suitable technique.
- Magnetic layer 304 may be etched using any suitable etch technique, such as a suitable wet etching technique for example.
- Forming magnetic layer 304 and/or patterning magnetic layer 304 to define one or more slots is optional.
- a second dielectric layer 306 is formed over magnetic layer 304 as illustrated in Figure 4.
- Dielectric layer 306 corresponds to the dielectric layer between magnetic layer 120 and conductor 110 of Figure 1 and helps insulate magnetic layer 120 from conductor 110.
- dielectric layer 306 fills each such slot.
- dielectric layer 306 fills the slots surrounding conductive underpass 126.
- Dielectric layer 306 may comprise any suitable dielectric material, such as an oxide of silicon, silicon nitride, or silicon oxynitride for example, and may be formed to any suitable thickness using any suitable technique.
- dielectric layer 306 is formed by depositing silicon dioxide (SiO 2 ) over magnetic layer 304 to a thickness of approximately 10,000 angstroms (A) using a tetraethyl orthosilicate (TEOS) silicon dioxide (SiO 2 ) plasma enhanced chemical vapor deposition (PECVD) system.
- TEOS tetraethyl orthosilicate
- PECVD plasma enhanced chemical vapor deposition
- dielectric layer 306 is patterned to define at least one via to magnetic layer 304, such as vias 332 and 334 for example, as illustrated in Figure 5.
- Dielectric layer 306 for one embodiment is patterned to define at least one via in region 132 within innermost turn 114 of conductor 110 as illustrated in Figure 1 to connect magnetic layer 304 with another magnetic layer.
- Dielectric layer 306 for one embodiment is patterned to define at least one via in one or more regions, such as regions 134 and 136 for example, along a perimeter surrounding outermost turn 118 of conductor 110 as illustrated in Figure 1.
- dielectric layer 306 is not patterned with any via along the perimeter in such regions.
- dielectric layer 306 is patterned to form a via to conductive underpass 126 to connect node 112 to conductive underpass 126.
- Dielectric layer 306 may be patterned using any suitable patterning technique. Dielectric layer 306 for one embodiment is patterned by forming a patterned mask over dielectric layer 306, etching dielectric layer 306 to pattern dielectric layer 306 in accordance with the patterned mask, and removing the patterned mask.
- the patterned mask may comprise any suitable material, such as photoresist for example, formed to any suitable thickness and may be patterned using any suitable technique.
- Dielectric layer 306 may be etched using any suitable etch technique, such as a suitable dry etch technique for example.
- Forming dielectric layer 306 is optional. Dielectric layer 306 may not be formed, for example, where magnetic layer 304 is not formed. Patterning dielectric layer 306 to define one or more vias to magnetic layer 304 is optional. Dielectric layer 306 may not be patterned, for example, where magnetic layer 304 does not define conductive underpass 126 and where magnetic layer 304 is not to be connected to another magnetic layer.
- a conductive layer 308 is formed over dielectric layer 306 as illustrated in Figure 5.
- dielectric layer 306 defines one or more vias to magnetic layer 304
- conductive layer 308 fills any such vias.
- Conductive layer 308 may comprise any suitable conductive material and may be formed to any suitable thickness using any suitable technique.
- Suitable conductive materials include, for example, copper (Cu), aluminum (Al), tungsten (W), molybdenum (Mo), titanium (Ti), gold (Au), silver (Ag), a metal suicide, a metal nitride, polysilicon, or an alloy containing one or more such conductive materials, such as an aluminum-copper (AlCu) alloy, an aluminum-silicon (AlSi) alloy, an aluminum-copper-silicon (AlCuSi) alloy, and a titanium nitride (TiN) alloy for example.
- AlCu aluminum-copper
- AlSi aluminum-silicon
- AlCuSi aluminum-copper-silicon
- TiN titanium nitride
- conductive layer 308 is formed by sputter depositing an aluminum-copper-silicon (AlCuSi) alloy over dielectric layer 306 to a thickness of approximately 1 micron ( ⁇ m).
- Conductive layer 308 for one embodiment may also be formed to comprise an underlying adhesion and/or diffusion barrier layer and/or an overlying adhesion and/or diffusion barrier layer.
- Conductive layer 308 for one embodiment may also be formed to comprise any overlying layer that serves as an anti-reflective coating for lithography and/or that helps prevent hillocking of the conductive material for conductive layer 308.
- conductive layer 308 comprises an aluminum-copper-silicon (AlCuSi) alloy
- a titanium (Ti) layer may be deposited prior to depositing the aluminum- copper-silicon alloy and another titanium (Ti) layer may be deposited over the deposited aluminum-copper-silicon alloy.
- conductive layer 308 is patterned to form conductor 110 as illustrated in Figures 1 and 6.
- Conductive layer 308 may be patterned to define a signal path having any suitable width, thickness, and length and any suitable spacing between turns to form a generally spiral -shaped conductor 110 covering an area of any suitable shape and size.
- dielectric layer 306 defines one or more vias to magnetic layer 304
- conductive layer 308 is also patterned to remove conductive layer 308 from any such vias.
- magnetic layer 304 defines conductive underpass 126
- conductive layer 308 for one embodiment is not removed from any via to conductive underpass 126. In this manner, conductive layer 308 helps connect conductive underpass 126 to node 112 of conductor 110.
- Conductive layer 308 may be patterned using any suitable patterning technique.
- Conductive layer 308 for one embodiment is patterned by forming a patterned mask over conductive layer 308, etching conductive layer 308 to pattern conductive layer 308 in accordance with the patterned mask, and removing the patterned mask.
- the patterned mask may comprise any suitable material, such as a photoresist and a silicon dioxide (SiO 2 ) hard mask for example, formed to any suitable thickness and may be patterned using any suitable technique.
- Conductive layer 308 may be etched using any suitable etch technique, such as a suitable plasma dry etching technique for example.
- a third dielectric layer 310 is formed over conductive layer 308 as illustrated in Figure 6.
- Dielectric layer 310 for one embodiment helps insulate conductive layer 308 from another magnetic layer.
- Dielectric layer 310 fills the areas removed from conductive layer 308 in patterning conductive layer 308 to form conductor 110.
- Dielectric layer 310 also fills any exposed vias in dielectric layer 306.
- Dielectric layer 310 may comprise any suitable dielectric material, such as an oxide of silicon, silicon nitride, or silicon oxynitride for example, and may be formed to any suitable thickness using any suitable technique.
- dielectric layer 310 is formed by depositing silicon dioxide (SiO 2 ) over conductive layer 308 to a thickness of approximately 10,000 angstroms (A) using a tetraethyl orthosilicate (TEOS) silicon dioxide (SiO 2 ) plasma enhanced chemical vapor deposition (PECVD) system.
- SiO 2 silicon dioxide
- TEOS tetraethyl orthosilicate
- PECVD plasma enhanced chemical vapor deposition
- dielectric layer 310 is patterned to define at least one via extending to magnetic layer 304 as illustrated in Figure 7.
- Dielectric layer 310 for one embodiment is patterned to define a via extending through each exposed via defined by dielectric layer 306.
- Dielectric layer 310 may be patterned using any suitable patterning technique.
- Dielectric layer 310 for one embodiment is patterned by forming a patterned mask over dielectric layer 310, etching dielectric layer 310 to pattern dielectric layer 310 in accordance with the patterned mask, and removing the patterned mask.
- the patterned mask may comprise any suitable material, such as photoresist for example, formed to any suitable thickness and may be patterned using any suitable technique.
- Dielectric layer 310 may be etched using any suitable etch technique, such as a suitable dry etch technique for example.
- Forming dielectric layer 310 is optional. Dielectric layer 310 may not be formed, for example, where another magnetic layer is not to be formed over conductive layer 308. Patterning dielectric layer 310 to define one or more vias to magnetic layer 304 is optional. Dielectric layer 310 may not be patterned, for example, where magnetic layer 304 is not formed or where magnetic layer 304 is not to be connected to another magnetic layer formed over conductive layer 308.
- a second magnetic layer 312 is formed over dielectric layer 302 as illustrated in Figure 7.
- dielectric layers 306 and 310 define one or more vias to magnetic layer 304
- magnetic layer 312 fills any such vias. In this manner, one or more connections between magnetic layer 304 and magnetic layer 312 may be formed.
- Magnetic layer 312 may comprise any suitable magnetic material and may be formed to any suitable thickness using any suitable technique.
- magnetic layer 312 is formed by sputter depositing an amorphous cobalt (Co) alloy, such as a suitable cobalt-zirconium-tantalum (CoZrTa) alloy for example, to a thickness in the range of approximately 0.1 microns ( ⁇ m) to approximately 1.0 micron ( ⁇ m) over dielectric layer 310.
- the magnetic material for one embodiment for magnetic layer 312 may be deposited in the presence of an applied magnetic field to induce desirable magnetic properties in magnetic layer 312.
- magnetic layer 312 is patterned to define at least one slot, such as slot 342 for example, as illustrated in Figure 7.
- Magnetic layer 312 may be patterned to define any suitable number of one or more slots with any suitable dimensions and orientation at any suitable one or more locations.
- Magnetic layer 312 for one embodiment is patterned to define slots having a width in the range of approximately 0.05 microns ( ⁇ m) to approximately 15 microns ( ⁇ m).
- Magnetic layer 312 may be patterned using any suitable patterning technique. Magnetic layer 312 for one embodiment is patterned by forming a patterned mask over magnetic layer 312, etching magnetic layer 312 to pattern magnetic layer 312 in accordance with the patterned mask, and removing the patterned mask.
- the patterned mask may comprise any suitable material, such as photoresist for example, formed to any suitable thickness and may be patterned using any suitable technique.
- Magnetic layer 312 may be etched using any suitable etch technique, such as a suitable wet etching technique for example.
- Forming magnetic layer 312 and/or patterning magnetic layer 312 to define one or more slots is optional.
- any suitable conductive material may also be used.
- any vias in dielectric layer 306 to magnetic layer 304 may be filled with conductive material in forming and patterning conductive layer 308 for blocks 212 and 214.
- Dielectric layer 310 may then be patterned for block 218 to define at least one via to any such filled vias.
- magnetic material fills any vias in dielectric layer 310 in forming magnetic layer 312 for block 220, one or more connections between magnetic layer 304 and magnetic layer 312 is formed.
- inductor 100 may also or instead comprise a similar conductive overpass defined by magnetic layer 312 to allow a voltage potential to be applied to node 112.
- inductor 100 may be fabricated such that a voltage potential may be applied to node 112 and/or node 116 from beneath magnetic layer 304. Also, inductor 100 may be fabricated such that a voltage potential may be applied to node 112 and/or node 116 from above magnetic layer 312.
- Nodes 112 and/or 116 may each be conductively coupled to circuitry from beneath and/or above inductor 100 by forming a respective via through magnetic layer 304 and/or magnetic layer 312 and filling the via with a suitable conductive material.
- a portion of magnetic layer 304 and/or magnetic layer 312 may optionally be isolated to serve as a portion of a conductive contact to conductor 110. By conductively coupling both nodes 112 and 116 through magnetic layer 304 and/or magnetic layer 312 in this manner, magnetic layers 304 and 312 may be connected continuously along the full perimeter surrounding outermost turn 118.
- dielectric layer 306 and/or dielectric layer 310 may nevertheless be patterned with at least one via in region 132 and/or in one or more regions along a perimeter surrounding conductor 110, as illustrated in Figure 1, for subsequent filling with a suitable magnetic or conductive material.
- Inductor 100 for another embodiment is fabricated using a suitable damascene process to form conductor 110.
- dielectric layer 306 or another dielectric layer formed over dielectric layer 306 may be patterned to define suitable trenches and/or vias such that a conductive material, such as copper (Cu) for example, may be deposited over the dielectric layer and polished with a suitable chemical-mechanical polishing (CMP) technique, for example, to form conductor 110.
- CMP chemical-mechanical polishing
- One or more vias to magnetic layer 304 may then be defined through the dielectric layer.
- Magnetic layers 304 and 312 may each be formed and patterned in any suitable manner.
- each magnetic layer 304 and 312 is formed and patterned in accordance with flow diagram 800 as illustrated in Figure 8.
- Flow diagram 800 is described in the context of magnetic layer 304 for the sake of simplicity.
- an underlying layer 902 is formed over dielectric layer 302 as illustrated in Figure 9.
- Layer 902 may serve as an adhesion layer and or as a diffusion barrier layer for magnetic layer 304.
- Layer 902 may comprise any suitable material and may be formed to any suitable thickness using any suitable technique.
- the magnetic material for magnetic layer 304 comprises an amorphous cobalt (Co) alloy, such as cobalt- zirconium-tantalum (CoZrTa) for example
- titanium (Ti) may be sputter deposited over dielectric layer 302 to a suitable thickness, such as approximately 250 angstroms (A) for example, using a physical vapor deposition (PVD) system, for example, to form layer 902.
- PVD physical vapor deposition
- Titanium (Ti) helps the cobalt (Co) alloy adhere to dielectric layer 302.
- Layer 902 is optional and may not be used, for example, where adhesion and/or diffusion are of minimized concern for the magnetic material of magnetic layer 304.
- Magnetic material layer 904 is formed over underlying layer 902 as illustrated in Figure 9.
- Magnetic material layer 904 may comprise any suitable material and may be formed to any suitable thickness using any suitable technique.
- Magnetic material layer 904 for one embodiment comprises cobalt (Co).
- Magnetic material layer 904 for one embodiment comprises an amorphous cobalt (Co) alloy comprising cobalt (Co) and any suitable one or more elements of any suitable atomic or weight percentage.
- the amorphous cobalt (Co) alloy may have any suitable atomic order.
- the amorphous cobalt (Co) alloy has an atomic order in the range of approximately 1 angstrom (A) to approximately 100 angstroms (A).
- the amorphous cobalt (Co) alloy has an atomic order in the range of approximately 1 angstrom (A) to approximately 25 angstroms (A).
- the amorphous cobalt (Co) alloy has an atomic order in the range of approximately 1 angstrom (A) to approximately 10 angstroms (A).
- Magnetic material layer 904 for one embodiment comprises an amorphous cobalt (Co) alloy comprising cobalt (Co) and zirconium (Zr). Zirconium (Zr) helps make cobalt (Co) amorphous. Magnetic material layer 904 for one embodiment comprises a cobalt- zirconium (CoZr) alloy having one or more additional elements, such as tantalum (Ta) and niobium (Nb) for example, that help make the cobalt-zirconium (CoZr) alloy magnetically softer.
- additional elements such as tantalum (Ta) and niobium (Nb) for example, that help make the cobalt-zirconium (CoZr) alloy magnetically softer.
- Magnetic material layer 904 for one embodiment comprises a cobalt-zirconium (CoZr) alloy having one or more additional elements, such as a rare earth element for example, that help increase the ferromagnetic resonance of the cobalt-zirconium (CoZr) alloy.
- Rare earth elements include rhenium (Re), neodymium (Nd), praseodymium (Pr), and dysprosium (Dy) for example.
- Rhenium (Re) helps reduce stress and magnetostriction for the cobalt-zirconium (CoZr) alloy.
- magnetic material layer 904 comprises a cobalt-zirconium (CoZr) alloy
- magnetic material layer 904 may comprise, for example, approximately 3 atomic percent to approximately 10 atomic percent zirconium (Zr).
- magnetic material layer 904 comprises a cobalt-zirconium-tantalum (CoZrTa) alloy
- magnetic material layer 904 may comprise, for example, approximately 3 atomic percent to approximately 10 atomic percent zirconium (Zr) and may comprise up to and including approximately 10 atomic percent tantalum (Ta).
- Magnetic material layer 904 for one embodiment comprises approximately 91.5 atomic percent cobalt (Co), approximately 4 atomic percent zirconium (Zr), and approximately 4.5 atomic percent tantalum (Ta).
- CoZrTa alloy can operate in the GigaHertz (GHz) range and can withstand temperatures up to approximately 450° Celsius without crystallizing or significantly changing its relevant properties.
- magnetic material layer 904 comprises a cobalt-zirconium-rhenium (CoZrRe) alloy
- magnetic material layer 904 may comprise, for example, approximately 3 atomic percent to approximately 10 atomic percent zirconium (Zr) and may comprise up to and including approximately 3 atomic percent rhenium (Re).
- Magnetic material layer 904 for one embodiment comprises approximately 89 atomic percent cobalt (Co), approximately 8 atomic percent zirconium (Zr), and approximately 3 atomic percent rhenium (Re).
- Magnetic material layer 904 may be formed to any suitable thickness.
- Magnetic material layer 904 for one embodiment has a thickness in the range of approximately 0.05 microns ( ⁇ m) to approximately 2.0 microns ( ⁇ m).
- Magnetic material layer 904 for one embodiment has a thickness in the range of approximately 0.1 microns ( ⁇ m) to approximately 1.0 micron ( ⁇ m).
- Magnetic material layer 904 for one embodiment has a thickness of approximately 0.4 microns ( ⁇ m).
- Magnetic material layer 904 for one embodiment is sputter deposited using a physical vapor deposition (PVD) system, for example. Magnetic material layer 904 for one embodiment is deposited in the presence of an applied magnetic field to induce desirable magnetic properties in magnetic material layer 904. Magnetic material layer 904 may be deposited, for example, in the presence of a fixed magnetic field, an approximately 180° switching magnetic field, or an orthogonal switching magnetic field.
- PVD physical vapor deposition
- Magnetic material layer 904 for one embodiment may be deposited in sublayers of any suitable thickness, such as approximately 0.2 microns ( ⁇ m) for example, to help prevent overheating and crystal growth during deposition.
- Each sublayer for one embodiment may be deposited in the presence of a magnetic field in such a manner so as to induce a magnetic anisotrophy in the sublayer in a direction parallel to the plane of the sublayer and orthogonal to that of another sublayer.
- Each sublayer may, for example, be deposited in the presence of an orthogonal switching magnetic field.
- Substrate 300 may also be repositioned relative to a fixed magnetic field as each sublayer is deposited so as to induce the orthogonal magnetic fields.
- an overlying layer 906 is formed over magnetic material layer 904 as illustrated in Figure 9.
- Layer 906 may serve as an adhesion layer, a diffusion barrier layer, and/or as an anti-reflective coating for lithography for magnetic layer 304.
- Layer 906 may comprise any suitable material and may be formed to any suitable thickness using any suitable technique.
- titanium (Ti) may be sputter deposited over magnetic material layer 904 to a suitable thickness, such as approximately 250 angstroms (A) for example, using a physical vapor deposition (PVD) system, for example, to form layer 906.
- PVD physical vapor deposition
- Titanium (Ti) helps photoresist adhere to cobalt (Co) in patterning magnetic layer 304, helps protect cobalt (Co) from relatively high temperature processes that could potentially oxidize the top surface of magnetic material layer 904 and possibly damage the relevant properties of cobalt (Co), and may help reduce any undercutting in etching magnetic material layer 904.
- magnetic material layer 904 comprises cobalt (Co)
- magnetic material layer 904 is oxidized to form layer 906 comprising cobalt oxide (CoO x ).
- Cobalt oxide (CoO x ) may be formed to any suitable thickness, such as in the range of approximately 10 angstroms (A) to approximately 100 angstroms (A) for example.
- Magnetic material layer 904 for one embodiment is briefly ashed with a suitable relatively low lamp, low temperature recipe to oxidize cobalt (Co) while minimizing any damage to the relevant properties of cobalt (Co). Oxidizing cobalt (Co) in this manner helps photoresist adhere to cobalt (Co) in patterning magnetic layer 304.
- Layer 906 is optional and may not be used, for example, where adhesion is of minimized concern for the magnetic material of magnetic layer 304.
- a patterned mask layer 908 is formed over magnetic layer 304 as illustrated in Figure 10.
- Mask layer 908 may comprise any suitable material and may have any suitable thickness.
- Mask layer 908 may be patterned using any suitable technique.
- Mask layer 908 for one embodiment comprises photoresist that is spun on and then patterned by exposing mask layer 908 through a suitable mask and developing mask layer 908.
- Magnetic layer 304 for one embodiment is etched using a suitable wet etching technique.
- layer 906 comprises titanium (Ti) or cobalt oxide (CoO x )
- a suitable dilute hydrofluoric (HF) acid solution is used to etch layer 906 exposed by mask layer 908.
- HF dilute hydrofluoric
- an approximately 50:1 HF acid solution is used.
- magnetic material layer 904 comprises cobalt (Co)
- a solution of nitric acid is used to wet etch magnetic material layer 904 exposed by mask layer 908.
- an approximately 10% solution of nitric (HNO 3 ) acid is used.
- layer 906 comprises titanium (Ti)
- layer 906 helps reduce any undercutting in wet etching magnetic material layer 904.
- a suitable dilute hydrofluoric (HF) acid solution is used to etch layer 902 exposed by mask layer 908.
- HF dilute hydrofluoric
- each subsequent process technique is to account for the presence of magnetic layer 304.
- magnetic layer 304 comprises cobalt (Co)
- exposing magnetic layer 304 to a plasma or atmosphere containing oxygen at relatively high temperatures may damage the relevant properties of magnetic layer 304.
- the effects of subsequent process techniques on magnetic layer 304 may be monitored using a permeance meter, for example.
- magnetic layer 304 comprises cobalt (Co)
- silicon dioxide (SiO 2 ) is deposited to form dielectric layer 306, for example, using a suitable plasma enhanced chemical vapor deposition (PECVD) system with tetraethyl orthosilicate (TEOS) to help maintain a temperature below approximately 450° Celsius and therefore help minimize any oxidation and crystallization of magnetic layer 304.
- PECVD plasma enhanced chemical vapor deposition
- TEOS tetraethyl orthosilicate
- photoresist for example, is to be removed from magnetic layer 304, dielectric layer 306, and/or from a silicon dioxide (SiO 2 ) hard mask over conductive layer 308, a suitable relatively low temperature resist strip technique and a suitable solvent may be used instead of a typical relatively high temperature ash technique to avoid exposing magnetic layer 304 to plasmas at relatively high temperatures for relatively long periods of time.
- a suitable relatively low temperature resist strip technique and a suitable solvent may be used instead of a typical relatively high temperature ash technique to avoid exposing magnetic layer 304 to plasmas at relatively high temperatures for relatively long periods of time.
- the silicon dioxide (SiO 2 ) may be etched using a suitable relatively low power and relatively low temperature dry etch technique to help minimize any hardening of the photoresist. The photoresist may then be removed using a suitable solvent.
- magnetic layer 304 and/or magnetic layer 312 may be annealed by exposing inductor 100 to a suitable temperature in the presence of a magnetic field to help vitalize the magnetic properties of magnetic layer 304 and/or magnetic layer 312.
- inductor 100 may be fabricated with a multi-level conductor formed across multiple layers and/or with multiple conductors. Inductor 100 for one embodiment may be formed with multiple conductors coupled in series or in parallel. Also, one or more magnetic layers may be formed and possibly patterned in fabricating other suitable integrated circuit devices, such as an integrated transformer formed using one or more inductors similar to inductor 100.
- Figure 11 illustrates, for one embodiment, an integrated transformer 1100.
- Figure 12 illustrates, for one embodiment, a cross-sectional view of integrated transformer 1100.
- the cross-sectional view of Figure 12 generally corresponds to a cross-section at line 12- 12 of transformer 1100 as illustrated in Figure 11.
- integrated transformer 1100 comprises integrated inductor 100 and another integrated inductor 1150 formed over inductor 100.
- Integrated inductor 1150 for one embodiment is similarly fabricated as inductor 100.
- Inductor 100 corresponds to a primary coil of a conventional transformer, and inductor 1150 corresponds to a secondary coil.
- transformer 1100 for one embodiment may be used to couple signals or power from one circuit to another while isolating direct current (dc) biases. Transformer 1100 may also be used to help reduce noise.
- dc direct current
- inductor 1150 comprises, similarly as inductor 100, a generally spiral-shaped conductor 1160 defining a signal path along which current may flow.
- Inductor 1150 is positioned relative to inductor 100 such that an electromagnetic field generated by inductor 100 induces a voltage potential across an innermost node 1162 near the beginning of an innermost turn 1164 of conductor 1160 and an outermost node 1166 near the end of an outermost turn 1168 of conductor 1160. Current then flows through conductor 1160.
- the induced voltage potential across inductor 1150 may be stepped up or stepped down from the voltage potential applied across inductor 100 as desired in designing inductors 100 and 1150 and in positioning inductors 100 and 1150 relative to one another.
- each conductor 110 and 1160 is illustrated as defining approximately 2 % generally octagonal-shaped turns, each conductor 110 and 1160 may define any suitable number of one or more turns and any suitable fraction of a turn of any suitable shape. Each turn may be rectangular, hexagonal, or circular in shape, for example.
- the number of turns defined by each conductor 110 and 1160 helps determine the amount of the voltage potential induced across inductor 1150 for a given voltage potential applied across inductor 100.
- the shape of each turn for each conductor 110 and 1160 may also help determine the amount of the voltage potential induced across inductor 1150 for a given voltage potential applied across inductor 100.
- Each conductor 110 and 1160 may comprise any suitable conductive material and may have any suitable dimensions.
- the signal path defined by each conductor 110 and 1160 may have any suitable width, thickness, and length with any suitable spacing between turns and may cover an area of any suitable shape and size.
- the material and dimensions of each conductor 110 and 1160 and the spacing between turns for each conductor 110 and 1160 may help determine the amount of the voltage potential induced across inductor 1150 based on a given voltage potential applied across inductor 100.
- Inductors 100 and 1150 may be positioned relative to one another in any suitable manner to induce any desirable voltage potential across inductor 1150 for a given voltage potential applied across inductor 100.
- Inductor 1150 for one embodiment is positioned relative to inductor 100 such that the signal path defined by conductor 1160 lies over and is generally parallel to the signal path defined by conductor 110. How inductors 100 and 1150 are positioned relative to one another and the proximity between inductors 100 and 1150 helps determine the amount of the voltage potential induced across inductor 1150 based on a given voltage potential applied across inductor 100.
- inductor 100 may also correspond to a secondary coil and inductor 1150 may correspond to a primary coil. That is, a voltage potential may be applied across nodes 1162 and 1166 of inductor 1150 to generate an electromagnetic field around both inductors 1150 and 100 and induce a voltage potential across nodes 112 and 116 of inductor 100.
- Inductors 100 and 1150 for one embodiment are each fabricated to have an increased self-inductance to help increase the quality factor Q of each inductor 100 and 1150 and to help form transformer 1100 with a relatively high mutual inductance between inductors 100 and 1150.
- inductor 1150 for one embodiment is similarly fabricated as inductor 100.
- Inductor 1150 comprises magnetic layer 312, a first dielectric layer 314, a conductive layer 316 to form conductor 1160, a second dielectric layer 318, and a magnetic layer 320.
- Magnetic layer 312 serves as a second magnetic layer for inductor 100 and as a first magnetic layer for inductor 1150.
- Dielectric layer 314 helps insulate conductive layer 316 from magnetic layer 312.
- Dielectric layer 318 helps insulate magnetic layer 320 from conductive layer 316.
- Inductor 1150 for one embodiment is fabricated in accordance with flow diagram 200 as illustrated in Figure 2.
- dielectric layer 314 may be formed over inductor 100 and patterned similarly as dielectric layer 306 for blocks 208 and 210 of Figure 2. Forming and/or patterning dielectric layer 314 is optional similarly as dielectric layer 306. Dielectric layer 314 may not be formed, for example, where inductor 100 does not comprise magnetic layer 312 and does comprise dielectric layer 310.
- Conductive layer 316 may be formed and patterned to form conductor 1160 similarly as conductive layer 308 for blocks 212 and 214 of Figure 2.
- Dielectric layer 318 may be formed and patterned similarly as dielectric layer 310 for blocks 216 and 218 of Figure 2. Forming and/or patterning dielectric layer 318 is optional similarly as dielectric layer 310.
- Magnetic layer 320 may be formed and patterned similarly as magnetic layer 312 for blocks 220 and 222 of Figure 2. Forming and/or patterning magnetic layer 320 is optional similarly as magnetic layer 312.
- Magnetic layers 304 and/or 312 help increase the self -inductance of inductor 100, and magnetic layers 312 and/or 320 help increase the self-inductance of inductor 1150. Magnetic layers 304, 312, and/or 320 help increase the mutual inductance between inductors 100 and 1150.
- Each magnetic layer 304, 312, and 320 may comprise any suitable magnetic material and have any suitable shape, such as the rectangular shape illustrated in Figures 1 and 11 for example, and any suitable dimensions.
- Each magnetic layer 304, 312, and 320 may or may not comprise the same magnetic material as any other magnetic layer 304, 312, or 320. Any one or more of magnetic layers 304, 312, and 320 may optionally define any suitable number of one or more slots.
- Transformer 1100 for one embodiment may optionally comprise one of magnetic layers 304, 312, and 320 to help increase the inductance of inductor 100 and/or inductor 1150.
- Transformer 1100 for another embodiment may optionally comprise two of magnetic layers 304, 312, and 320 to help further increase the inductance of inductor 100 and or inductor 1150.
- Transformer 1100 for another embodiment may comprise all three magnetic layers 304, 312, and 320 to help even further increase the inductance of inductor 100 and/or inductor 1150.
- transformer 1100 comprises two or more of magnetic layers 304, 312, and 320
- each such magnetic layer 304, 312, or 320 may optionally be connected to another magnetic layer 304, 312, or 320 with any suitable magnetic and/or conductive material.
- Magnetic layers 304 and 312 may be connected, as illustrated in Figure 1, through a region 132 within innermost turn 114 of conductor 110 and/or at one or more regions, such as regions 134 and 136 for example, along a perimeter surrounding outermost turn 118 of conductor 110.
- Magnetic layers 312 and 320 may be connected, as illustrated in Figure 11, through a region 1182 within innermost turn 1164 of conductor 1160 and/or at one or more regions, such as regions 1184 and 1186 for example, along a perimeter surrounding outermost turn 1168 of conductor 1160.
- Magnetic layers 304 and 320 may be connected through regions 132 and 1182 and/or at one or more regions, such as regions 134 and 1184 and regions 136 and 1186 for example, along a perimeter surrounding conductors 110 and 1160.
- Two or more of magnetic layers 304, 312, and 320 may be connected along a perimeter of any suitable shape, such as the rectangular shape illustrated in Figures 1 and 11 for example.
- Connecting two or more of magnetic layers 304, 312, and 320 helps increase the self-inductance of inductor 100 and/or inductor 1150 and the mutual inductance between inductor 100 and 1150. Connecting two or more of magnetic layers 304, 312, and 320 at most or substantially all regions along a perimeter surrounding conductor 110 and/or conductor 1160 helps prevent straying of the magnetic flux generated by conductor 110 and/or conductor 1160.
- Figure 13 illustrates, for one embodiment, another integrated transformer 1300.
- Integrated transformer 1300 comprises integrated inductor 1310 and another integrated inductor 1360.
- inductors 1310 and 1360 are positioned in a side-by-side relationship.
- inductor 1310 for example, generates an electromagnetic field due to the application of a voltage potential across inductor 1310, a voltage potential is induced across inductor 1360.
- the induced voltage potential across inductor 1360 may be stepped up or stepped down from the voltage potential applied across inductor 1310 as desired in designing inductors 1310 and 1360 and in positioning inductors 1310 and 1360 relative to one another.
- Each inductor 1310 and 1360 for one embodiment is fabricated similarly as inductor 100.
- each inductor 1310 and 1360 is fabricated in accordance with flow diagram 200 of Figure 2 over the same substrate to form transformer 1300.
- each inductor 1310 and 1360 comprises a first magnetic layer corresponding to magnetic layer 304 of inductor 100
- each corresponding first magnetic layer of inductors 1310 and 1360 for one embodiment may be formed at the same time and remain connected to one another to help increase the mutual inductance between inductors 1310 and 1360.
- each inductor 1310 and 1360 comprises a second magnetic layer corresponding to magnetic layer 312 of inductor 100
- each corresponding second magnetic layer of inductors 1310 and 1360 for one embodiment may be formed at the same time and remain connected to one another to help increase the mutual inductance between inductors 1310 and 1360.
- each inductor 1310 and 1360 comprises both magnetic layers corresponding to magnetic layers 304 and 312 of inductor 100
- the first magnetic layer of each inductor 1310 and 1360 may be connected to the second magnetic layer of each inductor 1310 and 1360 at one or more regions along a perimeter surrounding both inductors 1310 and 1360 to help further increase the mutual inductance between inductors 1310 and 1360.
- Figure 14 illustrates, for one embodiment, another integrated transformer 1400.
- Integrated transformer 1400 comprises integrated inductor 1410 and another integrated inductor 1460.
- Inductors 1410 and 1460 for one embodiment are positioned such that at least a portion of one or more turns of the conductor of inductor 1460 are each positioned adjacent to an inner side of at least a portion of one turn of the conductor of inductor 1410.
- Inductors 1410 and 1460 for one embodiment are positioned such that at least a portion of one or more turns of inductor 1410 are each positioned between at least a portion of each of two turns of inductor 1460 and such that at least a portion of one or more turns of inductor 1460 are each positioned between at least a portion of each of two turns of inductor 1410.
- inductors 1410 and 1460 are positioned such that each turn of inductor 1410 is positioned on the same level as and adjacent to at least one turn of inductor 1460 and such that each turn of inductor 1460 is positioned on the same level as and adjacent to at least one turn of inductor 1410.
- inductor 1410 As inductor 1410, for example, generates an electromagnetic field due to the application of a voltage potential across inductor 1410, a voltage potential is induced across inductor 1460.
- the induced voltage potential across inductor 1460 may be stepped up or stepped down from the voltage potential applied across inductor 1410 as desired in designing inductors 1410 and 1460 and in positioning inductors 1410 and 1460 relative to one another.
- Each inductor 1410 and 1460 for one embodiment is fabricated similarly as inductor 100.
- each inductor 1410 and 1460 is fabricated in accordance with flow diagram 200 of Figure 2.
- the conductor of each inductor 1410 and 1460, for one embodiment, is formed simultaneously for blocks 212 and 214 of Figure 2.
- Transformer 1400 may be formed with a first magnetic layer corresponding to magnetic layer 304 of inductor 100 and/or a second magnetic layer corresponding to magnetic layer 312 of inductor 100.
- each inductor 100, 1150, 1310, 1360, 1410 and 1460 is described as comprising one single-level spiral-shaped conductor, other suitable primary and secondary inductors each having any suitable number of one or more spiral-shaped conductors each formed over one or more levels and coupled in series or in parallel may be similarly fabricated as inductor 100 and positioned relative to one another in any suitable manner to form an integrated transformer.
- Figure 15 illustrates, for one embodiment, another integrated transformer 1500.
- Integrated transformer 1500 comprises integrated inductor 1510 and another integrated inductor 1560.
- Inductors 1510 and 1560 for one embodiment are positioned such that at least a portion of one or more turns of the conductor of inductor 1560 are each positioned adjacent to an inner side of at least a portion of one turn of the conductor of inductor 1510 and such that at least a portion of one or more turns of inductor 1510 are each positioned adjacent to an inner side of at least a portion of one turn of inductor 1560.
- Inductors 1510 and 1560 for one embodiment are positioned such that at least a portion of one or more turns of inductor 1510 are each positioned between at least a portion of each of two turns of inductor 1560, such that at least a portion of one or more turns of inductor 1560 are each positioned between at least a portion of each of two turns of inductor 1510, and such that each of one or more turns of inductor 1510 or 1560 crosses over an adjacent turn of inductor 1560 or 1510 at least once.
- inductor 1510 As inductor 1510, for example, generates an electromagnetic field due to the application of a voltage potential across inductor 1510, a voltage potential is induced across inductor 1560.
- the induced voltage potential across inductor 1560 may be stepped up or stepped down from the voltage potential applied across inductor 1510 as desired in designing inductors 1510 and 1560 and in positioning inductors 1510 and 1560 relative to one another.
- Each inductor 1510 and 1560 for one embodiment is fabricated similarly as inductor 100.
- each inductor 1510 and 1560 is fabricated in accordance with flow diagram 200 of Figure 2.
- the conductor of each inductor 1510 and 1560 is formed simultaneously for blocks 212 and 214 of Figure 2 and spans multiple levels to accommodate cross-overs for each conductor with a suitable dielectric material between each conductor at each cross-over.
- Transformer 1500 may be formed with a first magnetic layer corresponding to magnetic layer 304 of inductor 100 and or a second magnetic layer corresponding to magnetic layer 312 of inductor 100.
- each transformer 1100, 1300, 1400, and 1500 is illustrated as comprising one primary inductor and one secondary inductor, any suitable number of primary and secondary inductors each similarly fabricated as inductor 100 may be positioned relative to one another in any suitable manner to form an integrated transformer. As one example, two secondary inductors may be positioned relative to one primary inductor in any suitable manner to form an integrated transformer.
- FIG 16 illustrates, for one embodiment, an integrated transformer 1600.
- Integrated transformer 1600 is an autotransformer.
- Transformer 1600 for one embodiment may be similarly fabricated as inductor 100 of Figure 1, for example.
- Transformer 1600 may be used, for example, for circuits such as in a direct current (dc) voltage converter.
- dc direct current
- Figure 16 illustrates, for one embodiment, voltage taps 1642 and 1644 each at a node between nodes 1612 and 1616.
- a voltage potential tapped using voltage taps 1642 and/or 1644 may be stepped down from the voltage potential applied across transformer 1600 as desired in designing transformer 1600.
- the resulting voltage potential for example, across voltage tap 1642 and voltage tap 1644, node 1612 and voltage tap 1642, node 1612 and voltage tap 1644, node 1616 and voltage tap 1642, and/or node 1616 and voltage tap 1644 may be tapped.
- a predetermined voltage potential such as ground for example, may be applied to voltage tap 1642 and/or voltage tap 1644.
- a voltage potential is applied across transformer 1600, the resulting voltage potential across node 1612 and voltage tap 1642, node 1612 and voltage tap 1644, node 1616 and voltage tap 1642, and/or node 1616 and voltage tap 1644 may be tapped.
- conductor 1610 is illustrated as defining approximately 2 % generally octagonal-shaped turns, conductor 1610 may define any suitable number of one or more turns and any suitable fraction of a turn of any suitable shape. Each turn may be rectangular, hexagonal, or circular in shape, for example. The number of turns defined by conductor 1610 helps determine the amount of the voltage potential tapped using voltage taps 1642 and/or 1644 for a given voltage potential applied across transformer 1600. The shape of each turn for conductor 1610 may also help determine the amount of the voltage potential tapped using voltage taps 1642 and/or 1644 for a given voltage potential applied across transformer 1600.
- Conductor 1610 may comprise any suitable conductive material and may have any suitable dimensions.
- the signal path defined by conductor 1610 may have any suitable width, thickness, and length with any suitable spacing between turns and may cover an area of any suitable shape and size.
- the material and dimensions of conductor 1610 and the spacing between turns for conductor 1610 may help determine the amount of the voltage potential tapped using voltage taps 1642 and/or 1644 for a given voltage potential applied across transformer 1600.
- Transformer 1600 may be fabricated such that a voltage potential may be tapped from conductor 1610 in any suitable manner.
- Transformer 1600 may be fabricated, for example, such that a voltage potential may be tapped from beneath conductor 1610 and/or from above conductor 1610.
- Voltage taps 1642 and 1644 may be conductively coupled to circuitry from beneath and/or above transformer 1600 by forming a respective via to conductor 1610 and filling the via with a suitable conductive material.
- transformer 1600 comprises a lower magnetic layer and/or an upper magnetic layer
- a portion of the lower magnetic layer and/or the upper magnetic layer may optionally be isolated to serve as a portion of a conductive contact to conductor 1610.
- transformer 1600 is described as comprising one single-level spiral- shaped conductor, any other suitable transformer having any suitable number of one or more spiral-shaped conductors each formed over one or more levels and coupled in series or in parallel may be similarly fabricated and tapped at any suitable location along any conductor of the transformer.
- transformer 1600 is illustrated in the context of a single inductor, any suitable primary or secondary inductor of any suitable transformer, such as transformer 1100 of Figure 11, transformer 1300 of Figure 13, transformer 1400 of Figure 14, or transformer 1500 of Figure 15, for example, maybe tapped at any suitable location along any conductor of the transformer.
- any suitable primary or secondary inductor of any suitable transformer such as transformer 1100 of Figure 11, transformer 1300 of Figure 13, transformer 1400 of Figure 14, or transformer 1500 of Figure 15, for example, maybe tapped at any suitable location along any conductor of the transformer.
- one or more integrated transformers 1702 may be integrated in an integrated circuit 1700 with any suitable one or more integrated circuit devices, such as integrated circuit devices 1704 and 1706 for example, or with any suitable circuits comprising one or more integrated circuit devices, such as integrated circuit devices 1704 and 1706 for example.
- Each transformer 1702 may be fabricated, for example, as transformer 1100 of Figure 11, transformer 1300 of Figure 13, transformer 1400 of Figure 14, transformer 1500 of Figure 15, or transformer 1600 of Figure 16.
- integrated circuit 1700 may be fabricated with any suitable number of one or more transformers 1702.
- one or more integrated transformers 1802 for one embodiment may be mounted in an integrated circuit package 1800 for conductive coupling to an integrated circuit 1804 housed by integrated circuit package 1800.
- Each transformer 1802 may be integrated with or mounted in integrated circuit package 1800 and conductively coupled to integrated circuit 1804 in any suitable manner.
- Each transformer 1802 may be fabricated, for example, as transformer 1100 of Figure 11, transformer 1300 of Figure 13, transformer 1400 of Figure 14, transformer 1500 of Figure 15, or transformer 1600 of Figure 16.
- integrated circuit package 1800 may be fabricated with any suitable number of one or more transformers 1802.
- one or more transformers 1802 may be fabricated directly on an integrated circuit package.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
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Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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EP02713443.6A EP1352403B1 (en) | 2001-01-19 | 2002-01-22 | Integrated transformer |
AU2002245293A AU2002245293A1 (en) | 2001-01-19 | 2002-01-22 | Integrated transformer |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
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US09/766,162 US6856228B2 (en) | 1999-11-23 | 2001-01-19 | Integrated inductor |
US09/766,162 | 2001-01-19 | ||
US09/853,370 US6870456B2 (en) | 1999-11-23 | 2001-05-11 | Integrated transformer |
US09/853,370 | 2001-05-11 |
Publications (2)
Publication Number | Publication Date |
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WO2002065492A2 true WO2002065492A2 (en) | 2002-08-22 |
WO2002065492A3 WO2002065492A3 (en) | 2002-12-19 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/US2002/001742 WO2002065492A2 (en) | 2001-01-19 | 2002-01-22 | Integrated transformer |
Country Status (5)
Country | Link |
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US (2) | US6870456B2 (en) |
EP (1) | EP1352403B1 (en) |
CN (1) | CN1286131C (en) |
AU (1) | AU2002245293A1 (en) |
WO (1) | WO2002065492A2 (en) |
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- 2002-01-22 AU AU2002245293A patent/AU2002245293A1/en not_active Abandoned
- 2002-01-22 WO PCT/US2002/001742 patent/WO2002065492A2/en not_active Application Discontinuation
- 2002-01-22 CN CNB028065638A patent/CN1286131C/en not_active Expired - Fee Related
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Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6870456B2 (en) | 1999-11-23 | 2005-03-22 | Intel Corporation | Integrated transformer |
US6943658B2 (en) | 1999-11-23 | 2005-09-13 | Intel Corporation | Integrated transformer |
US7434306B2 (en) | 1999-11-23 | 2008-10-14 | Intel Corporation | Integrated transformer |
US7791447B2 (en) | 1999-11-23 | 2010-09-07 | Intel Corporation | Integrated transformer |
US7982574B2 (en) | 1999-11-23 | 2011-07-19 | Intel Corporation | Integrated transformer |
US8471667B2 (en) | 2003-05-05 | 2013-06-25 | Intel Corporation | On-die micro-transformer structures with magnetic materials |
US8134548B2 (en) | 2005-06-30 | 2012-03-13 | Micron Technology, Inc. | DC-DC converter switching transistor current measurement technique |
US8482552B2 (en) | 2005-06-30 | 2013-07-09 | Micron Technology, Inc. | DC-DC converter switching transistor current measurement technique |
US9124174B2 (en) | 2005-06-30 | 2015-09-01 | Micron Technology, Inc. | DC-DC converter switching transistor current measurement technique |
US7570144B2 (en) | 2007-05-18 | 2009-08-04 | Chartered Semiconductor Manufacturing, Ltd. | Integrated transformer and method of fabrication thereof |
US8242872B2 (en) | 2007-05-18 | 2012-08-14 | Globalfoundries Singapore Pte. Ltd. | Transformer with effective high turn ratio |
US8003529B2 (en) | 2007-08-01 | 2011-08-23 | Globalfoundries Singapore Pte. Ltd. | Method of fabrication an integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
US20030001713A1 (en) | 2003-01-02 |
US20020008605A1 (en) | 2002-01-24 |
EP1352403A2 (en) | 2003-10-15 |
EP1352403B1 (en) | 2015-06-10 |
AU2002245293A1 (en) | 2002-08-28 |
WO2002065492A3 (en) | 2002-12-19 |
US6870456B2 (en) | 2005-03-22 |
CN1541396A (en) | 2004-10-27 |
US6856226B2 (en) | 2005-02-15 |
CN1286131C (en) | 2006-11-22 |
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