WO2002063444A1 - Procede et dispositif de generation d'une variable de synchronisation, circuit integre et lecteur de disque numerique correspondants - Google Patents
Procede et dispositif de generation d'une variable de synchronisation, circuit integre et lecteur de disque numerique correspondants Download PDFInfo
- Publication number
- WO2002063444A1 WO2002063444A1 PCT/FR2002/000358 FR0200358W WO02063444A1 WO 2002063444 A1 WO2002063444 A1 WO 2002063444A1 FR 0200358 W FR0200358 W FR 0200358W WO 02063444 A1 WO02063444 A1 WO 02063444A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- approximation
- clock signal
- signal
- approximations
- synchronization variable
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 15
- 230000003287 optical effect Effects 0.000 claims description 14
- 230000010363 phase shift Effects 0.000 claims description 12
- 230000007704 transition Effects 0.000 description 13
- 238000004364 calculation method Methods 0.000 description 9
- 238000012545 processing Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 3
- 238000005070 sampling Methods 0.000 description 3
- 238000009432 framing Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 238000010200 validation analysis Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10037—A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
- G11B7/08—Disposition or mounting of heads or light sources relatively to record carriers
- G11B7/09—Disposition or mounting of heads or light sources relatively to record carriers with provision for moving the light beam or focus plane for the purpose of maintaining alignment of the light beam relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following
- G11B7/0901—Disposition or mounting of heads or light sources relatively to record carriers with provision for moving the light beam or focus plane for the purpose of maintaining alignment of the light beam relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following only
- G11B7/0906—Differential phase difference systems
Definitions
- the invention relates to the generation of a variable capable of allowing synchronization of a signal with another signal, in particular a clock signal.
- the invention is advantageously but not limited to the field of digital discs, in particular those known under the term of "compact disc” (CD-ROM: Read Only Memory-Compact Disc in English) and very particularly multifunction digital discs ( DVD: “Digital Nersatil Disc” in English) storing compressed image data. Synchronization can be done from an analog phase lock loop which is rather expensive.
- Synchronization can also be performed from a digital phase locked loop.
- a synchronization variable such as the time interval between a transition of an approximate signal and a transition of the signal which one wishes to obtain requires division operations which are slow to carry out and expensive in terms of computing resources.
- the invention aims to propose a simple and precise solution to the problems of the prior art.
- the invention proposes a method for generating a synchronization variable WCS intended for a second clock signal WP from a first clock signal WP j and a phase variation signal ⁇ , in which:
- an approximation P of the period of the second clock signal WP 2 can be determined .
- a second approximation is determined
- the phase ⁇ is calculated at a given instant by adding the phase variation signals ⁇ of the previous instants and the given instant, modulo the period P wp ⁇ of the clock signal WP j .
- the WCS synchronization variable is equal to that of the approximations generating the smallest error.
- the WCS synchronization variable is used to synchronize the clock signal WP 2 and the clock signal WP ⁇
- A is equal to 2 n with n a predetermined constant, n can be equal to 15.
- the invention also provides a device for generating a synchronization variable WCS intended for a second clock signal WP 2 from a first clock signal WP j and a phase variation signal ⁇ , comprising:
- the invention also provides an integrated circuit comprising a device as above.
- the invention also provides a phase locked loop comprising a device as above.
- the invention also provides a digital disc player comprising an optical head comprising means for emitting an incident light beam and several photodetectors for detecting the reflection of the light beam on the disc, means for summing two by two the signals from photodetectors and deliver two sampled incident signals, and means for calculating the mutual phase shift of the two sampled incident signals.
- the calculation means incorporate a device as above.
- the invention makes it possible to calculate a variable from which it is possible to generate a signal whose phase is determined with known precision. We can then modify the incident optical system and bring and enslave the optical beam on the runway.
- a digital disc has a single spiral track whose relief is representative of the binary information stored on the track of the disc. It is illuminated by an incident optical beam, for example a laser spot, the track of the disc and several photodetectors, for example four, detect the reflection of the light beam on the disc.
- an incident optical beam for example a laser spot
- the track of the disc and several photodetectors, for example four, detect the reflection of the light beam on the disc.
- the optical sensor formed by the photodetectors then supplies, on the one hand four elementary signals respectively delivered by the four photodetectors, and which are also used to effect a servo-control of the optical beam on the track of the disc, and on the other hand a global signal, or useful signal, equal to the sum of the four elementary signals, useful signal from which binary information read from the track is extracted.
- the coding of binary information on the disk is standardized and well known to those skilled in the art (RLL coding (2, 10) for example). More precisely, the length of the hollows and bumps present on the spiral track of the disc determines the number of logical values 0 framing two logical values 1.
- these lengths of hollows and bumps are all multiples of a base length commonly designated by the skilled person under the term 1T.
- the value of the basic length 1T is equal to 0.64 micron for a DND disc and to 1.6 micron for a CD-ROM.
- the useful signal containing the binary data comprises a succession of transitions whose spacings are representative of the lengths of said pulses. And, the higher the speed of rotation of the disc, the more the spacings between the transitions are reduced.
- the general principle for extracting the binary data conveyed by the incident signal then consists in detecting the transitions of the incident signal, in calculating the distances separating the successive transitions and in determining the values of the data from the calculated distances.
- the calculation of the mutual phase shift of two sampled incident signals can be carried out by an electronic device comprising: a detection stage capable of detecting the transitions of each incident signal relative to a predetermined crossing threshold as well as the so-called “minimum” samples of this signal whose levels are below a low threshold and those called “maximum” whose levels are above a high threshold, a first pair of blocks associated with a first incident signal, and a second pair of blocks associated with the second incident signal, each block comprising on the one hand memory elements capable of storing the levels of a predetermined set of samples of the corresponding incident signal, this set comprising at least a minimum sample, a maximum sample, and two intermediate samples representative of a transition said incident signal temporally located between these minimum and maximum samples, and on the other hand the first, second and third time counters clocked by the sampling clock signal and respectively associated with the minimum, maximum and one of the samples intermediaries, suitable means of control, in the presence of at least two samples or two samples maximum tillons respectively relating to the two incident signals
- Such an electronic phase shift calculation device can be used upstream of the device for generating a variable of synchronization to provide it with a phase variation signal ⁇ .
- FIG. 4 is a partial schematic view of the internal architecture of a digital disc player, in particular DVD disc.
- the invention makes it possible to synchronize two clock signals by using fast and inexpensive digital means.
- the device 1 for generating a synchronization variable WCS receives as input a phase variation signal ⁇ which can be generated as explained below with reference to FIG. 4, and a signal of period P 1 of the clock signal WP, for example of frequency equal to 20 MHz.
- the synchronization signal WCS at the output of the device 1 is supplied to a module 2 which also receives as input a clock signal WP and capable of outputting a synchronized clock signal WP s of frequency equal to the clock signal WP 2 and synchronized with the WP signal,.
- a module could be provided for calculating an approximation P of the period of the second clock signal WP 2 .
- P B / ⁇ , with B a constant which depends on the number of bits used for the calculation, the frequency of the signal WP,, a sampling frequency, for example equal to 400 Mhz and a frequency of writing, for example equal to 130 kHz.
- P can be pre-calculated for intervals of ⁇ .
- the device 1 comprises a module 3 for calculating the phase ⁇ from the phase variation signal ⁇ and the period P wp ⁇ -
- the module 3 performs the addition of the phase variations of the instants previous and the phase variation of the current instant modulo the period P wp ⁇ - In other words, module 3 performs the following operations:
- - ⁇ n + 1 takes the value ⁇ n + ⁇ n + 1 ; - if ⁇ n + 1 > ⁇ ma ⁇ , then ⁇ n + 1 takes the value ⁇ ⁇ + 1 - ⁇ ma ⁇ .
- ⁇ ma ⁇ being the maximum value of the phase either at the instant
- phase ⁇ can be determined from a phase variation signal coming from another clock, not shown, of different frequency but of determined phase. To simplify the calculations, phase ⁇ can be calculated every p periods, with p> 1, of the first clock signal WP ⁇
- the device 1 comprises a module 4 which receives the phase signal ⁇ from the module 3 and the approximate period P wpl .
- the device 1 comprises a module 5 for determining other approximations close to the first approximation WS Q. Module 5 is connected to the output of module 4.
- WS pl WS 0 + 1
- WS ml WS Q - 1.
- the device 1 comprises a module 6 for calculating errors which receives the first approximation WS 0 from module 4 and the second and third approximations WS, and WS ml from module 5.
- Module 6 also receives the phase variation signal ⁇ .
- the device 1 comprises a selection module 7 which receives the three error values err_0, err_pl and err_ml from the error module 6, the first WS Q approximation from the module 4 and the second and third WS approximations, and WS ml from module 5.
- Module 7 determines which is the smallest error among the above errors and outputs the approximation with the smallest error. Said approximation is sent to device 1 output as being the WCS synchronization variable.
- the device 1 is produced in integrated form and forms part of an integrated circuit.
- FIG. 2 the various stages which are carried out chronologically during the implementation of the method are illustrated.
- step 10 an approximation P of the period of the second clock signal is calculated.
- step 11 the phase ⁇ is calculated as a function of the phase shift ⁇ and of the period P l .
- step 12 the first approximation WS Q is calculated as a function of phase ⁇ and of the approximate period P.
- step 13 the second and third approximations WS j and WS ml are calculated from the first approximation WS 0 .
- step 14 the errors corresponding to each of the abovementioned approximations are calculated.
- step 15 the approximation offering the lowest error is taken as the synchronization variable.
- the clock signal W j has a frequency of 20 MHz.
- the vertical lines referenced 8 correspond to the rising transitions of the clock signal W
- the signal W 2 defines between two descending transitions a writing period which one seeks to determine. Knowledge of rising signal transitions
- the reference 20 designates more particularly a DVD disc player of which only some useful elements have been shown here to describe a means of calculating phase shift ⁇ .
- the reference 21 designates an optical sensor composed of four photodetectors 22, 23, 24, 25.
- a laser diode emits a laser beam which is directed towards the face of the disc, on which the track containing the information is engraved, by l 'in particular through a separating plate and a conventional optical system.
- the beam reflected by the disc then crosses the separating plate in the other direction and is picked up by the four photodetectors 22, 23, 24, 25 which are all four in a plane parallel to the plane of the disc.
- Each photodetector delivers a signal that has been referenced, for simplification purposes, by the same number as that assigned to the photodetector.
- These elementary signals 28, 29, 30, 31 are then processed in a first processing stage 26 comprising at the head a preliminary processing module 27 comprising in particular amplifiers, this module 27 being of structure known per se.
- the signals 28, 29, 30, 31 delivered by the module 27 are then sampled in four analog digital converters 32 to 35.
- a sampling clock signal is delivered for example by a quartz (not shown here for the sake of simplification).
- one of the secondary signals is equal to the sum of the elementary signals 28 and 30, while the other secondary signal is equal to the sum of the elementary signals 29 and 31.
- the processing stage therefore provides two sampled incident signals, the mutual phase shift of which is representative of the positioning error of the optical beam relative to the disc track.
- These two sampled signals will be processed by the phase shift calculation device according to the invention, incorporated in stage 38, the latter delivering a positioning error which will be conventionally used in a servo loop to modify the incident optical system. and bring back and enslave the optical beam on the track of the disc.
- the positioning error can be taken as a phase shift or undergo an intermediate treatment before being used by the device 1 of FIG. 1.
- optical sensor formed by photodetectors delivers, in addition to the four elementary signals, a global signal, or useful signal, equal to the sum of the four elementary signals, useful signal from which the binary information read from the track.
- useful signal equal to the sum of the four elementary signals, useful signal from which the binary information read from the track.
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- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Optical Recording Or Reproduction (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002563124A JP4115278B2 (ja) | 2001-02-02 | 2002-01-30 | 同期変数を生成する方法 |
US10/470,441 US7219297B2 (en) | 2001-02-02 | 2002-01-30 | Method and device for generating a synchronization variable and the corresponding integrated circuit and digital disc drive |
EP02701350A EP1356364A1 (fr) | 2001-02-02 | 2002-01-30 | Procede et dispositif de generation d'une variable de synchronisation, circuit integre et lecteur de disque numerique correspondants |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR01/01434 | 2001-02-02 | ||
FR0101434A FR2820521B1 (fr) | 2001-02-02 | 2001-02-02 | Procede et dispositif de generation d'une variable de synchronisation, circuit integre et lecteur de disque numerique correspondants |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2002063444A1 true WO2002063444A1 (fr) | 2002-08-15 |
Family
ID=8859558
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FR2002/000358 WO2002063444A1 (fr) | 2001-02-02 | 2002-01-30 | Procede et dispositif de generation d'une variable de synchronisation, circuit integre et lecteur de disque numerique correspondants |
Country Status (5)
Country | Link |
---|---|
US (1) | US7219297B2 (fr) |
EP (1) | EP1356364A1 (fr) |
JP (1) | JP4115278B2 (fr) |
FR (1) | FR2820521B1 (fr) |
WO (1) | WO2002063444A1 (fr) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5461642A (en) * | 1992-10-28 | 1995-10-24 | International Business Machines Corporation | Discrete time control loop method and apparatus for clocking data in an asynchronous channel |
US5576904A (en) * | 1994-09-27 | 1996-11-19 | Cirrus Logic, Inc. | Timing gradient smoothing circuit in a synchronous read channel |
WO1998004074A1 (fr) * | 1996-07-22 | 1998-01-29 | Seagate Technology, Inc. | Estimateur de detecteur de phase |
EP1037204A1 (fr) * | 1999-03-16 | 2000-09-20 | STMicroelectronics SA | Procédé et dispositif d'asservissement d'un faisceau optique incident sur une piste d'un support mobile d'informations, en particulier un disque numérique |
EP1073204A1 (fr) * | 1999-07-30 | 2001-01-31 | STMicroelectronics SA | Dispositif de synchronisation d'un événement de référence d'un signal analogique sur une horloge |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5184091A (en) * | 1991-06-04 | 1993-02-02 | Zenith Electronics Corporation | Circuit for phase locking an oscillator within any one of a plurality of frequency ranges |
JP3285941B2 (ja) * | 1992-07-31 | 2002-05-27 | キヤノン株式会社 | 色処理方法、色処理装置、及びカラー画像処理システム |
US5914953A (en) * | 1992-12-17 | 1999-06-22 | Tandem Computers, Inc. | Network message routing using routing table information and supplemental enable information for deadlock prevention |
US5570397A (en) * | 1993-12-23 | 1996-10-29 | Unisys Corporation | Redundant synchronized clock controller |
US6430125B1 (en) * | 1996-07-03 | 2002-08-06 | Zen Research (Ireland), Ltd. | Methods and apparatus for detecting and correcting magnification error in a multi-beam optical disk drive |
US6189076B1 (en) * | 1997-11-14 | 2001-02-13 | Lucent Technologies, Inc. | Shared synchronous memory with a switching circuit controlled by an arbiter and method for glitch free switching of a clock signal |
US6535946B1 (en) * | 2000-01-04 | 2003-03-18 | National Semiconductor Corporation | Low-latency circuit for synchronizing data transfers between clock domains derived from a common clock |
US6810483B2 (en) * | 2001-01-25 | 2004-10-26 | Synopsys, Inc. | Synchronizing data and function opcodes between an application layer having a first clock speed and a circuit having a slower clock speed |
US6983032B2 (en) * | 2001-08-28 | 2006-01-03 | Texas Instruments Incorporated | Digital timing recovery method for communication receivers |
-
2001
- 2001-02-02 FR FR0101434A patent/FR2820521B1/fr not_active Expired - Fee Related
-
2002
- 2002-01-30 JP JP2002563124A patent/JP4115278B2/ja not_active Expired - Fee Related
- 2002-01-30 US US10/470,441 patent/US7219297B2/en not_active Expired - Lifetime
- 2002-01-30 EP EP02701350A patent/EP1356364A1/fr not_active Withdrawn
- 2002-01-30 WO PCT/FR2002/000358 patent/WO2002063444A1/fr active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5461642A (en) * | 1992-10-28 | 1995-10-24 | International Business Machines Corporation | Discrete time control loop method and apparatus for clocking data in an asynchronous channel |
US5576904A (en) * | 1994-09-27 | 1996-11-19 | Cirrus Logic, Inc. | Timing gradient smoothing circuit in a synchronous read channel |
WO1998004074A1 (fr) * | 1996-07-22 | 1998-01-29 | Seagate Technology, Inc. | Estimateur de detecteur de phase |
EP1037204A1 (fr) * | 1999-03-16 | 2000-09-20 | STMicroelectronics SA | Procédé et dispositif d'asservissement d'un faisceau optique incident sur une piste d'un support mobile d'informations, en particulier un disque numérique |
EP1073204A1 (fr) * | 1999-07-30 | 2001-01-31 | STMicroelectronics SA | Dispositif de synchronisation d'un événement de référence d'un signal analogique sur une horloge |
Also Published As
Publication number | Publication date |
---|---|
JP4115278B2 (ja) | 2008-07-09 |
EP1356364A1 (fr) | 2003-10-29 |
JP2004527823A (ja) | 2004-09-09 |
FR2820521B1 (fr) | 2003-04-25 |
FR2820521A1 (fr) | 2002-08-09 |
US7219297B2 (en) | 2007-05-15 |
US20040075476A1 (en) | 2004-04-22 |
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