WO2002049247A3 - Data stream separation circuit - Google Patents

Data stream separation circuit Download PDF

Info

Publication number
WO2002049247A3
WO2002049247A3 PCT/EP2001/014607 EP0114607W WO0249247A3 WO 2002049247 A3 WO2002049247 A3 WO 2002049247A3 EP 0114607 W EP0114607 W EP 0114607W WO 0249247 A3 WO0249247 A3 WO 0249247A3
Authority
WO
WIPO (PCT)
Prior art keywords
data stream
separation circuit
serial
signal
edge
Prior art date
Application number
PCT/EP2001/014607
Other languages
German (de)
French (fr)
Other versions
WO2002049247A2 (en
Inventor
Philipp Boerker
Dirk Scheideler
Original Assignee
Infineon Technologies Ag
Philipp Boerker
Dirk Scheideler
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Philipp Boerker, Dirk Scheideler filed Critical Infineon Technologies Ag
Publication of WO2002049247A2 publication Critical patent/WO2002049247A2/en
Publication of WO2002049247A3 publication Critical patent/WO2002049247A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dc Digital Transmission (AREA)

Abstract

The invention relates to a data stream separation circuit for separating a serial input data stream into two serial output data streams, comprising a signal input (2) for receiving the serial input data stream at a certain data transmission rate, a first edge-triggered flip-flop (5), which switches over when the signal edge of the input data stream rises and delivers a first serial output data stream through a first signal output (3) of the data stream separation circuit (1) at half the data transmission rate, and a second edge-triggered flip-flop (6), which switches over when the signal edge of the serial input data stream falls and delivers a second serial output data stream through a second signal output (4) of the data stream separation circuit, at half the data transmission rate.
PCT/EP2001/014607 2000-12-12 2001-12-12 Data stream separation circuit WO2002049247A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10061768.9 2000-12-12
DE2000161768 DE10061768A1 (en) 2000-12-12 2000-12-12 Data stream separation circuit

Publications (2)

Publication Number Publication Date
WO2002049247A2 WO2002049247A2 (en) 2002-06-20
WO2002049247A3 true WO2002049247A3 (en) 2002-12-05

Family

ID=7666760

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2001/014607 WO2002049247A2 (en) 2000-12-12 2001-12-12 Data stream separation circuit

Country Status (2)

Country Link
DE (1) DE10061768A1 (en)
WO (1) WO2002049247A2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1190367A (en) * 1966-07-12 1970-05-06 Plessey Co Ltd Improvements in or relating to Telegraph Signalling Equipment
JPH05308353A (en) * 1992-04-28 1993-11-19 Oki Electric Ind Co Ltd Method for transmitting clock signal
WO1998027678A1 (en) * 1996-12-18 1998-06-25 Dsc Communications A/S A method of generating a plurality of demultiplexed output signals from a serial data signal and a circuit for performing the method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1190367A (en) * 1966-07-12 1970-05-06 Plessey Co Ltd Improvements in or relating to Telegraph Signalling Equipment
JPH05308353A (en) * 1992-04-28 1993-11-19 Oki Electric Ind Co Ltd Method for transmitting clock signal
WO1998027678A1 (en) * 1996-12-18 1998-06-25 Dsc Communications A/S A method of generating a plurality of demultiplexed output signals from a serial data signal and a circuit for performing the method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 018, no. 113 (E - 1514) 23 February 1994 (1994-02-23) *

Also Published As

Publication number Publication date
DE10061768A1 (en) 2002-06-27
WO2002049247A2 (en) 2002-06-20

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