WO2002034014A1

WO2002034014A1 - Centrally-controlled electronic ballast with enhanced power savings

Info

Publication number: WO2002034014A1
Application number: PCT/KR2001/001725
Authority: WO
Inventors: Joon-Ho Park
Original assignee: Park Joon Ho
Priority date: 2000-10-13
Filing date: 2001-10-12
Publication date: 2002-04-25
Also published as: KR100356270B1; AU2001296066A1; KR20020029504A

Abstract

A centrally-controlled electronic ballast which can centrally control a plurality of discharge lamps is provided. The electronic ballast has a power output unit which generates two DC power, including first power which is used in amplification to the level of high voltage, and second power which is used in generation of a square-wave signal; a switching unit which operates at a predetermined frequency according to a switching signal, chops the second power into a square-wave signal; an inverter unit which receives the square-wave signal having the level of the second power, amplifies the received signal to a square-wave signal having the level of the first power, and provides the power to a discharging lamp; a current feedback unit which detects the output current of the inverter unit and feeds the detected current to the switching unit; and a switching control unit which controls the output of the inverter unit by adjusting the pulse phase of the switching signal. Accordingly, the ballast has high efficiency with the structure.

Description

CENTRALLY-CONTROLLED ELECTRONIC BALLAST WITH ENHANCED POWER SAVINGS

Technical Field The present invention relates to an electronic ballast of a high voltage discharge lamp, and more particularly, to a centrally-controlled electronic ballast which can centrally control a plurality of discharge lamps. Background Art Since a magnetic ballast uses a choke coil and a high capacity condenser, a lot of power is lost due to heat generation of the ballast itself in addition to the power consumed as light in a fluorescent lamp. Also, flickering occurs because the light is turned on by 60Hz commercial power. In order to compensate for this drawbacks, the electronic ballast has been developed.

The electronic ballast rectifies 60Hz commercial Alternating Current (AC) into a direct current, using a semiconductor device. The direction current signal is converted into a high frequency (25-50KHz) signal in an inverter circuit so that the fluorescent lamp is turned on stably. Since the electronic ballast turns on the light with high frequency power compared to the magnetic ballast such that light-emitting efficiency is improved, loss due to heat generation in the choke coil is reduced, and therefore power consumption is reduced.

However, when a plurality of fluorescent lamps are centrally controlled and turned on, power consumption in the ballast is still great, and a separate heat sink is added to a transistor used in the inverter because of a large current.

Disclosure of the Invention To solve the above problems, it is an objective of the present invention to provide a centrally-controlled electronic ballast which can centrally control a plurality of discharge lamps.

To accomplish the objective of the present invention, there is provided an electronic ballast having a power output unit which generates two Direct Current (DC) power, including first power which is used in amplification to the level of high voltage, and second power which is used in generation of a square-wave signal by a switching operation; a switching unit which operates at a predetermined frequency ^' according to a switching signal, chops the second power into a square-wave signal having the predetermined frequency, and outputs the chopped signal; an inverter unit which receives the square-wave signal having the level of the second power, amplifies the received signal to a square-wave signal having the level of the first power, and provides the power to a discharging lamp; a current feedback unit which detects the output current of the inverter unit and feeds the detected current to the switching unit; and a switching control unit which controls the output of the inverter unit to be kept at a predetermined level, by adjusting the pulse phase of the switching signal according to the sense signal detected in the current feedback unit.

Also, to accomplish the objective of the present invention, there is provided an electronic ballast having a power output unit which generates two Direct Current (DC) power, including first power which is used in amplification to the level of high voltage, and second power which is used in generation of a square-wave signal by a switching operation; a switching unit which operates at a predetermined frequency according to a switching signal, chops the second power into a square-wave signal having the predetermined frequency, and outputs the chopped signal; an inverter unit which has an up-output unit and a down-output unit that are alternately turned on or off according to the logic level of the input square-wave signal, and after setting a current path from the (+) terminal of the first power through the up-output unit to the intermediate tap terminal of the first power, or setting a current path from the intermediate tap terminal of the first power through the down-output unit to the (-) terminal of the first power, receives the square-wave signal having the level of the second power, amplifies the received signal to a square-wave signal having the level of the first power, and provides the power to a discharging lamp; a current feedback unit which detects the output current of the inverter unit which is provided to the discharging lamp, and feeds the detected current to the switching unit; and a switching control unit which controls the output of the inverter unit to be kept at a predetermined level, by adjusting the pulse phase of the switching signal according to the sense signal detected in the current feedback unit.

Brief Description of the Drawings

FIG. 1 a is a block diagram of an electronic ballast according to the present invention;

FIG. 1 b is a detailed diagram of the structure of one of a plurality of fluorescent lamps included in a load unit 15 shown in FIG. 1 a;

FIG. 1 c is a waveform diagram of a signal input to the load unit; FIG. 2 is a detailed circuit diagram corresponding to the electronic ballast shown in FIG. 1 ;

FIG. 3 is an example of a structural diagram of a Pulse Width Modulation (PWM) control circuit 21 shown in FIG. 2;

FIG. 4a is a detailed diagram of a circuit (M1 ) of each module included in an up-output unit 23 shown in FIG. 2;

FIG. 4b is a detailed diagram of a circuit (M2) of each module included in a down-output unit 24 shown in FIG. 2; and FIG. 5a is a circuit diagram showing the structure of an input rectifier 1 1 shown in FIG. 1 , FIGS. 5b through 5d are other examples of a high voltage generating unit 53 shown in FIG. 5a, and FIG. 5e is a circuit diagram of an example of a DC/DC converter which is connected to an output terminal of a low voltage generating unit 55 shown in FIG. 5a to provide a lower and stable low voltage power.

Best mode for carrying out the Invention

Referring to FIG. 1 a, which is a block diagram of an electronic ballast according to the present invention, when an AC power is input to an input rectifier unit 1 1 , two DC powers (V-, , V₂) are generated and output to a switching circuit 12 and an inverter 14. Here, DC power V-, is high voltage DC power, determines the output voltage level of the inverter 14, and DC power V₂ is provided as power for the switching circuit 12. In a different structure, an additional circuit (for example, a DC/DC converter shown in FIG. 5e) may be added to the circuit of FIG. 1 so that more stable and lower voltage (for example, 12 or 15Vdc) can be generated. A square-wave signal of the inverter 14 and high voltage power V₁ are input to the load unit 15 such as the fluorescent lamps. As an example of the load unit 15, a plurality of fluorescent lamps 151 through 1 5n, each of which is formed of a resonator and a lamp, are shown.

The switching circuit 12 operates at a predetermined frequency, and chops the input DC voltage signal (V₂) into a square-wave signal having a high frequency. This square-wave signal is input to the inverter 14 through the drive transformer 13, amplified in the inverter 14, and then applied to the load unit 15. The inverter 14 generates a square-wave signal (RF) having the electric potential level of the input DC voltage (\ ) with respect to the frequency of the square-wave signal generated in the switching circuit 12. The current feedback unit 18 detects the output current of the inverter 14, and feeds the current back to the switching circuit 12. The switching circuit 12 compares the feedback signal with a reference signal and controls (PWM control) the level (magnitude) of the current and voltage by adjusting the pulse phase of the switching signal. Thus the switching circuit 12 maintains the final output of the inverter 14 at a fixed level.

FIG. 1 b is a detailed diagram of the structure of one of the plurality of fluorescent lamps included in the load unit 15 shown in FIG. 1 a. Inside the fluorescent lamp, there are a capacitor (C1) and an inductor (L1 ) that operate as a resonator, and a lamp (FL) which emits light by arc discharge.

FIG. 1 c is a waveform diagram of a signal input to the load unit 15. The RF square-wave signal which is amplified in the inverter 14 is applied to the resonance circuit of the fluorescent lamp as shown in FIG. 1 b. In the high level interval of the square-wave signal, a charging current flows by capacitors C1 through C3 of the resonance circuit, and in the low level interval thereof, the current charged in the capacitors C1 through C3 is discharged such that a current flows to -V1. At this time, the current flowing through the fluorescent lamp can turn on the fluorescent lamp even when it is a small current, by the operation of the high voltage square-wave signal.

FIG. 2 is a detailed circuit diagram corresponding to the centrally controlled electronic ballast shown in FIG. 1. The circuit on the left of the drive transformer T1 in FIG. 2 corresponds to the switching unit 12 of FIG. 1 , and the circuit on the right corresponds to the inverter 14, and a current feedback unit 25 is additionally shown. DC powers V₁ and V₂ are output from the input rectifier 11 shown in FIG. 1. DC power V_! is high voltage DC power which is power for amplification ("high voltage power") which determines the power level of an output signal, and DC power V₂ is provided as power for primary coil of the driver transformer T1 and the PWM control circuit 21 , which is power ("switching power") for generating a square-wave signal by a switching operation.

A switching transistor Qs operates as a switching device which is turned on or off according to a switching signal (SWout) output from the PWM control circuit 21. In transformer T1 , a primary coil N_p is connected between switching power V-i and the transistor Qs, and AC power is provided to the primary coil by on or off of the transistor Qs such that power is provided to the secondary coil. Also, changes in a current due to changes in the load of the output is sensed by the current feedback unit 25 and thus the obtained sense signal (SENSE) is fed back to the PWM control circuit 21 . Considering the sense signal, the PWM control circuit 21 generates a switching signal (SW_0Ut).

The switching device is formed of transistor Qs, and is turned on or off according to the logic level of the switching signal (SW_0Ut) of the PWM control circuit 21 so as to intermit the current flowing through the primary coil N_p of the power transformer T1 . According to on or off of switching transistor Qs, a current flowing through primary coil (N_p) of the transformer T1 is induced to the secondary coil, and voltage is induced at both ends of the secondary coil with respect to the winding ratio. The square-wave signal generated by switching transistor Qs is provided to the secondary coil of transformer T1 , and input to the gate terminal of each of the field-effect transistors included in the up-output unit 23 and the down-output unit 24. Therefore, transistors of the up-output unit 23 and transistors of the down-output unit 24 are alternately turned on and off to amplify the input square-wave signal. As a result, a square-wave signal which has substantially the same frequency as the input square-wave signal and is amplified to the level of the high voltage power (\Λ) is generated. Meanwhile, in selecting transistor Qs, the following points need to be considered. First, it is preferable that internal resistance (R_Ds(on) ) is a low value (for example, equal to or less than 0.3Ω ) and the input gate capacitance of the transistor is a low value (for example, 220pF). By doing so, power loss can be reduced.

In the present circuit diagram, a primary coil N_p and an auxiliary coil N_τ are included in the first-side of transformer T1. The auxiliary coil stores energy when the switching transistor Qs is off, and returns the stored energy to the output side when the switching transistor Qs is on. By doing so, the down part of a square wave, that is, the energy of the low level signal is provided to the output side and thus the level of an off signal is raised. Therefore, a gate signal enough to turn on transistors Q₅ through Q₇ of the down-output unit 24 is provided during the down part of the square wave. Reversely, the primary coil N_p stores energy when switching transistor Qs is on, and provides the stored energy to the output side when switching transistor Qs is off such that transistors Q-, through Q₃ of the up-output unit 23 are turned on.

The primary coil N_p and the auxiliary coil N_τ are wound to have opposite polarities. An ultra fast switching diode is adopted for diode D1 , placed between the primary coil N_p and the auxiliary coil N_τ, or between the auxiliary coil N_τ and (-) terminal (-V₂), which determines the direction of a current while switching transistor Qs is off. The thickness and the winding turns of coil used in the auxiliary coil N_τ are formed substantially the same as those of the primary coil N_p.

According to the present embodiment, the auxiliary coil N_τ of the drive transformer T1 has the same number of winding turns as that of the primary coil N_p, but their polarities are opposite. This facilitates turn-on of the transistors Q₅ through Q₇, by storing energy in the coil while transistor Qs is turned on and then providing charging current for gate input capacitance of transistors Q₅ through Q₇ of the down-output unit 24 while transistor Qs is turned off. Meanwhile, charging current for gate input capacitance of transistors Q-i through Q₃ of the up-output unit 23 is provided from energy stored in the primary coil N_p while transistor Qs is turned on. Therefore, in the output signal there is no dead time, and high efficiency and less ripple can be achieved. The PWM control circuit 21 receives the output voltage signal

(+FB) of the converter, receives the sensed voltage signal (SENSE) generated by the inverter output current, and generates a square-wave pulse for on/off operations of the switching device Qs. The detailed structure of this will be explained referring to FIG. 3. The magnetic bias circuit 22 provides operational power to the output unit of the switching signal (SW_0Ut) in the PWM control circuit 21 . Voltage induced by the feedback coil (N_FB, its polarity representation (dot; representation of the start point of the winding) is opposite to the polarity representation of the primary coil (N_P)) in the first-side of the power transformer T1 is provided to terminal Vcc of the PWM control circuit 21 through diode D1 . Here, capacitor C1 is for removing ripples. Power Vi_n which is input to the PWM control circuit 21 is provided to devices included in the PWM control circuit 21 , except the switching output unit of which power is provided by the self-bias circuit 22. FIG. 3 is an example of a structural diagram of the PWM control circuit shown in FIG. 2, and explains a current-mode control method. Power Vcc generated by a feedback coil N_FB in the first-side of transformer T1 is provided to the output amplifier 35 which outputs switching signal SW_0Ut. Operating power Vin is provided from the input power V₂ to circuits, including a clock generator 33, a flip-flop 34, an error amplifier 31 , and a comparator 32.

The error amplifier 31 amplifies an error signal obtained by comparing the output voltage signal (+FB) of the inverter and the reference voltage signal (V_ref), and the amplified error signal is input to the comparator 32. The output current of the inverter is sensed and converted into voltage signal, and then the sensed signal (SENSE) is input to the comparator 32. The comparator 32 compares the sensed signal (SENSE) according to the pick switch current with an error signal related to the output voltage signal, and input the comparison result (SENSE) to an RS flip-flop (latch) 34. The clock generator 33 generates a clock signal corresponding to the switching frequency (fs). The RS flip-flop 34 receives the output of the comparator 34 and the clock signal and generates the switching signal (SW_0Ut) which drives on/off of the switching device. According to the logic level of the switching signal, the switching device (transistor Qs) which is connected to the RS flip-flop is turned on or off.

The inverter output voltage (+FB) which is fed back from the final output terminal is compared with the reference voltage (V_ref) in the error amplifier 31 . The current feedback signal (SENSE) is compared with the reference voltage (1.2V) in the comparator 32, and the result is input to the flip-flop 34. In the flip-flop 34, according to the output signal of the comparator 32, the phase (or width) of the clock signal which is generated in the clock generator 33 and input to the flip-flop 34 is increased or decreased, that is, a pulse width modulated signal in which the duty cycle of the clock signal is changed is generated. By doing so, the switching signal (SW_0Ut) is generated and the current flowing in transformer T1 is increased or decreased according to changes in the input voltage and load so that the output voltage of the final output terminal can be maintained at a predetermined level. Referring to FIG. 2, the structure of the inverter 14 connected to the second-side of the transformer T1 will now be explained. The inverter 14 is formed with the up-output unit 23 and the down-output unit 24, each of the output units 23 and 24 having a plurality of circuit modules (M1 or M2). (a) terminals (that is, a drain terminal of each transistor) of the modules (M1 ) of the up-output unit 23 are connected to each other and commonly connected to the high voltage power (+V-,), and (b) terminals (that is, a source terminal of each transistor) of the modules (M1 ) are commonly connected to each other to form the output terminal (S) of the inverter, (d) terminals (that is, a source terminal of each transistor) of the modules (M2) of the down-output unit 24 are connected to each other and commonly connected to (-) terminal (Λ ) of the high voltage power, and (c) terminals (that is, a drain terminal of each transistor) of the modules (M2) are connected to each other and connected to (b) terminals of the modules (M1 ) of the up-output unit 23 to form the output terminal (S) of the inverter.

If switching transistor Qs connected to the PWM control circuit 21 is turned on, then the transistors of the up-output unit 23 are turned on, the transistors of the down-output unit 24 are turned off, and a current flows from the (+) terminal (+V|) of the high voltage power to the intermediate tap. Next, if the switching transistor Qs is turned off, the transistors of the up-output unit 23 are turned off, the transistors of the down-output unit 24 are turned on, and a current flows from the intermediate tap of the high voltage power (Vi) through transformers T3 and T2, and the transistors of the down-output unit 24 to the (-) terminal (-Vi) of the high voltage power (V-i). Thus, by on/off operations of switching transistor Qs, a square-wave signal having a high voltage level is provided to the output transformer T3.

FIG. 4a is a detailed diagram of a circuit (M1 ) of each module included in the up-output unit 23 shown in FIG. 2. The circuit (M1 ) further includes an RC snubber circuit and an electrical discharging unit around the transistor. The circuit (M1 ) receives a square-wave signal provided from the primary coil of power transformer T1 , and the transistor Q2 is turned on/off according to the square-wave signal of which the level is changed according to the turns ratio. When transistor Q₂ is turned off, electric charge (which is charged while transistor Q₂ is turned on) which is charged in a capacitor (Coss) between a drain and a source is charged in a capacitor (Cd2) through a diode (Dd2). When transistor Q₂ is turned on, electric charge charged in the capacitor (Cd2) passes a resistor (Rd2) and is emitted as heat. Therefore, while transistor Q₂ is turned on, electric charge charged in the capacitance (Coss) between the drain and source is discharged in the resistor (Rd2). Accordingly, the influence of the electric charge on transistor Q₂ is minimized, and the heat generated from transistor Q₂ during switching operations can be substantially lowered. During turn-off, by the leakage inductance of the primary coil of power transformer T1 for high frequency and the capacitance (C_Gs) between the gate and source of transistor Q₂, a resonance circuit is formed. By this resonance circuit, transient overvoltage ringing is caused in a transient state. Ringing may have an amplitude big enough to destruct a diode or a transistor in the turn-off period. The RC device formed with a resistor (Rs₂) and a capacitor (C_S2) is a snubber circuit which supresses the ringing phenomenon, and is connected to the secondary coil of power transformer T1 in parallel.

A gate resistor (R_g) connected to the gate terminal of transistor Q₂ is added to match the rising time of the square-wave signal provided from power transformer T1 with the rising time of transistor Q₂.

FIG. 4b is a detailed diagram of a circuit (M2) of each module included in the down-output unit shown in FIG. 2. The circuit (M2) further includes an RC snubber circuit and an electric discharging unit around the transistor. Detailed explanation will be omitted, because the structure of the circuit (M2) is substantially the same as that of the circuit (M1 ), except that the position of polarity representations (dot) of the secondary coil is opposite to that of the circuit (M1 ).

Referring to FIG. 2, in the up-output unit 23, the circuits (M1 ) shown in FIG. 4a are connected in parallel and an operational current is made to flow through the plurality of transistors so that the current flowing each of the transistors becomes smaller. That is, in the up-output unit 23 connected to the secondary coil of power transformer T1 , the plurality of transistors (Q-, , Q₂, ... ) are connected in parallel (the drain of each transistor is connected to other drains and the source of each transistor is connected to other sources), and each transistor has its own electrical discharging unit. In addition, corresponding to the structure of the up-output unit 23, the down-output unit 24 has a structure in which the circuits (M2) shown in FIG. 4b are connected in parallel.

As in the present embodiment, with the up-output unit 23 which is formed with a group of transistors operating by the positive pulse part of a square wave signal, and the down-output unit 24 which is formed with a group of transistors operating by the negative pulse part of the square-wave signal, by inputting a square-wave signal output from the switching unit 12 to the gate of each transistor, the current flowing through each transistor is reduced down to be 1 /n, and accordingly power loss is reduced as much. Therefore, stable operation is enabled without a separate heat sink in each transistor. That is, the plurality of modules M1 shown in FIG. 4a are connected in parallel in the up-output unit 23, and the plurality of modules M2 shown in FIG. 4b are connected in parallel in the down-output unit 24, and therefore each output unit has the structure in which a plurality of transistors are connected in parallel. By doing so, the current flowing through each transistor is reduced to become 1 /n (here, n is the number of transistors used in each output unit), and power loss by the internal resistance (R_DS(ON)) between the drain and the source of each transistor can be minimized. Also, heat generated in each transistor can be minimized so that stable operation is enabled without using a separate heat radiating panel. In addition, as the switching frequency of the inverter rises, power loss by the capacitance (Coss) between the drain and the source of each transistor (MOSFET) increases. To reduce this power loss, a snubber circuit which is formed with a diode (Dd), a capacitor (Cd), and a resistor (Rd) is connected between the drain and the source of the transistor in each output unit (Refer to FIGS. 4a and 4b). Therefore, as the heat loss by the capacitance (Coss) between the drain and the source of a transistor is radiated in the resistor (Rd), thermal runaway of the transistor can be prevented. The heat loss by the internal resistance (R_DS(_ON)) of n transistors are calculated by the following equation:

p - R _v (Il∞_ _v „ - ^R∞^{{ON) X JP}~

¹ RLOSS ^l^DS{ON) V '

Therefore, by connecting n transistors in parallel as shown in drawings, the heat loss can be reduced to become 1/n. From the price aspect of components, since the price of unit transistor for high power is more expensive than a plurality of transistors for low power, the cost for building a circuit becomes cheaper.

Referring to FIG.2, the up-output unit 23 has, for example, a structure in which 3 modules (M1 ) shown in FIG. 4a are connected in parallel. That is, the drain terminal (a) of the transistor of each module is connected to each other, and the source terminal (b) of the transistor of each module is connected to each other to form a parallel structure. Likewise, the down-output unit 24 a structure in which 3 modules (M2) shown in FIG. 4b are connected in parallel. By this parallel structure, when the transistors of the output unit are turned on, the current flowing each transistor becomes a third of the entire current, and accordingly power loss by transistor's on-resistance (Rds) can be reduced to become 1/3. Though the number of modules included in each output unit is 3 in the present embodiment as an example, if the number of modules increases, power loss becomes smaller and the efficiency can be improved, but the physical size of the apparatus will become bigger. Reversely, if the number of modules decreases, the efficiency will be less improved but the physical size will become smaller. Therefore, according to the rated power and the purpose of the apparatus, the number of modules should be decided.

Each output unit 23 and 24 of the inverter 14 according to the present invention can be manufactured in the form of a small-sized light module having a predetermined rate output, and by connecting this modules in parallel, a high capacity inverter can be made. The present embodiment can be applied to a centrally-controlled ballast in which electronic ballasts, each included .in an individual fluorescent lamp, are integrated in one place and centrally operated, or a battery charger, and a driving apparatus of a DC motor, and can minimize the size of an apparatus and greatly improve the efficiency without using a separate heat sink in each transistor.

Meanwhile, the structure of the current feedback unit (S1 ) 25 which senses a current provided to transformer T3 and feeds the current back to the PWM control circuit 21 will now be explained. Since current IpDc which is a current flowing through the transistor sensitively changes according to the changes in the input voltage and/or the output voltage, the primary coil of current sensing transformer T2 is placed to the output side of the inverter in the current feedback unit 25 as shown in FIG. 2.

The output signal (SENSE) of the current feedback unit 25 is fed back to the input terminal (SENSE) of the PWM control circuit 21. The current feedback unit 25 includes a current coupling transformer T2, and the polarity of the winding is as shown in drawings. Resistors (R6, R7) converts a current induced in the secondary coil of transformer. T2 into a voltage signal. When the switching transistor (Qs) is turned on, the current flows from the (+) terminal of the high voltage power (V^ through the up-output unit 23 to the output terminal of the inverter, and therefore diode D2 flows the current because of forward" bias, and diode D4 doesn't flow the current because of reverse bias. The capacitor (C6) is for removing AC noise, and the variable resistor (VR1 ) is for adjusting the potential level of the output signal (SENSE). The voltage signal (SENSE) which is adjusted by the variable resistor (VR1 ) is fed back to the PWM control circuit 21. Meanwhile, when switching transistor (Qs) is turned off, the current flows from the intermediate tap terminal of the high voltage power (V-i) through the primary coil of transformer T3 and the down-output unit 24, to the (-) terminal (Λ ) of the high voltage power (V-i), and therefore diode D4 flows the current because of forward bias, and diode D3 doesn't flow the current because of reverse bias.

The current feedback unit 25 senses the output current, and generates the sense signal (SENSE) which controls the switching transistor (Qs). By transformer T2, the switching unit and the inverter output unit are electrically separated. Also, the ground level of the feedback unit 25 is connected to the (-) terminal (-V₂) of the switching power (V₂), and is electrically separated from the high voltage power (Vi) which controls the output level of the inverter. Therefore, oscillation or noise occurring in the output of the inverter by the high frequency operation in the switching transistor (Qs) can be prevented.

FIG. 5a is a circuit diagram showing the structure of the input rectifier shown in FIG. 1 , and the circuit includes an AC input unit 51 , a high voltage generating unit 53, and a low voltage generating unit 55. FIGS. 5b through 5d are other examples of the high voltage generating unit shown in FIG. 5a, and FIG. 5e is a circuit diagram of an example of a DC/DC converter which is connected to the output terminal of the low voltage generating unit 55 shown in FIG. 5a to generate a lower and stable low voltage power.

Referring to FIG. 5a, a varistor (Z^, capacitors (C-n, C₁₂, Cι₃), and inductors (Li, L₂) are connected to the AC input unit 51 so that a transient input voltage is clamped to a safe level, a transient current flow from the input power is prevented and noise is removed. Bridge diodes (BRι, BR₂) determines the current flow according to the phase of AC power, and converts the AC current to a DC current. A switch (S1 ) is for selection according to an AC input voltage (110V or 220V).

The high voltage generating unit 53 includes a thermister (TH) of which resistance decreases when temperature rises, which prevents damages in the circuit due to the momentary transient current of capacitors for filtering (Ci, C₂) by keeping the resistance of the thermister at a constant level regardless of the amount of the current. According to the cycle of the input AC power, current flow of the diode (BR-i) is determined, and by charging the capacitors (d, C₂), DC voltage V_T having a high potential level is generated.

In FIG. 5b, the high voltage generating unit 53 of FIG. 5a is formed in a parallel structure. FIG. 5b shows a multiple rectifier circuit which is formed by connecting the input terminals and the output terminals in parallel after dividing an AC-to-DC rectifier having a high rated current into a plurality of rectifiers. When an operational current is large, the bridge diode (BR-,) of the high voltage generating unit 53 of FIG. 5a generates heat as much. Therefore, a heat sink is needed, the capacity of the capacitor increases, and the size of the entire circuit becomes bigger.

As shown in FIG. 5b, the structure of each unit module is substantially the same as that of the high voltage generating unit of FIG. 5a, and by connecting the input terminals of the modules to each other, and connecting the output terminals of the modules to each other to connect the modules in parallel, the entire output capacity can be raised. For example, when a 500VA rectifier is designed, 10 modules, each having 50VA rating, can be connected in parallel. By doing so, the entire input current is distributed to each module such that power loss in each module is reduced. That is, since power loss is in proportion to resistance and the square of current, when n modules, each having a predetermined resistance (R) are used, power loss is obtained by the following equation:

A> RI^l

P l_lo_os_ss_s = R X n)² * " = n

That is, if the entire operational current is constant, and n modules, each having resistance R, are used, power loss can be reduced to be 1/n of the power loss when one module is used. Therefore, the efficiency of a power supplier can be raised. Meanwhile, an output filter 57 which is connected to the output terminal of each module is a π type low pass filter including a plurality of capacitors (CFn~CF₁₄) and an inductor (LFι), and removes 2nd, 3rd, or over harmonic noise generated by a high frequency switching operation. Since the current ratings of the capacitors and inductor used in the circuit are low, the capacity of the capacitors or the core size of the inductor may be smaller and heat loss is reduced.

In the parallel connection rectifier shown in FIG. 5b, a plurality of (AC-to-DC) rectifier modules for small current, each of the rectifier module having substantially the same structure, are connected in parallel so that input power is distributed to each module to 1/n. Therefore, since current rating needed in each module is lowered, the size of electric devices, especially capacitors and inductors, can be greatly reduced. Also, since heat generated in the bridge diode is reduced, the circuit can operate without a separate heat sink. As a result, as shown in FIG. 5c, by making each module (Mι~M_π) an integrated circuit and piling connecting the modules in parallel, a rectifier for high power can be implemented. Also from the economical aspect, implementation with a plurality of rectifiers for low power is much cheaper than implementation with one high power rectifier (about 30%~50% cheaper).

FIG. 5d is another example of the rectifier of FIG. 5c. Considering a physical space, the rectifier of FIG. 5d is implemented by piling one or more modules vertically and connecting a plurality of the piled modules horizontally. Also, parallel^' connection rectifier shown in FIG. 5b can be applied to an apparatus for converting 3-phase AC input to DC power.

FIG. 5e is a circuit diagram showing the structure of a DC/DC converter which can obtain low voltage power, being connected to the output terminal of the low voltage generating unit 55 shown in FIG. 5a. Input DC power (V_in) is the output voltage (V₂) of the low voltage generating unit 55 of FIG. 5a. According to the previous explanation, power applied as switching power may be referred to as output power (V_out) of the circuit shown in FIG. 5e, but is represented as V₂ for convenience of explanation.

In the embodiment shown in FIG. 5e, the PWM control circuit 51 receives the fed-back output voltage (+FB) of the converter, and the sensing voltage (SENSE) generated by the input side current, and generates a square-wave pulse for on/off operations of the switching device (Qi). The detailed structure of this is the same as explained referring to FIG. 3. A self-bias circuit 55 performs the same function as explained referring to FIG. 2.

Transistor Qi is turned on/off by the square-wave switching signal (SW_out) generated in the PWM control circuit 21. In transformer T1 , the primary coil (N_p) is connected between the input DC power (V_ln) and the switching unit, and high frequency square wave power is provided to the primary coil (N_p) by on/off of the switching uint such that power is provided to the secondary coil. When transistor Qi is turned on, the current is temporarily charged in the primary coil. When transistor Q-i is turned off, the current charged in the primary coil is provided to the secondary coil, and according to the turns ratio of transformer T1 , a voltage is induced at both ends of the secondary coil.

An input current detecting unit 33 senses the current flowing through the primary coil of transformer T1 by the on/off operation of the switching device (transistor Qi) and feeds the sensed current back to the PWM control circuit 51. The PWM control circuit 51 receives the fed-back output DC power signal (+FB), and controls the on/off duration of the switching signal (SWout) according to an error signal, which is compared the fed-back output DC power signal (+FB) with a reference signal, and the voltage level, which is detected by the input current detecting unit 53 with the input current which changes according to changes of input voltage (V_in), such that the PWM control circuit 51 controls the current amount flowing through the primary coil. A rectifier unit 57 which is connected to the secondary coil of power transformer T1 and converts AC power to DC power is included such that a constant voltage output can be obtained.

Meanwhile, the input current detecting unit 53 is connected between the source terminal of transistor Qi and the (-) terminal, and a signal which is generated according to the current of the time when transistor Qi is turned on is fed back to the PWM control circuit 51. The input current detecting unit 53 senses changes in current according to changes in potential of the input voltage (V_in) and changes in the input current according to changes of the output load, and feeds the sensed result to the PWM control circuit 51. In order to compensate for phenomena due to the current changes, the PWM control circuit 51 control switching operations according to the sensed signal.

The input current detecting unit 53 senses changes in the current I_PP due to changes in input voltage (V_in) or output voltage, converts the sensed current changes to a voltage signal, and feeds the voltage signal back to the PWM control circuit 21. Reflecting changes in input voltage (Vj_n) or output voltage, the PWM control circuit 51 adjusts the pulse interval of the positive phase of the switching signal (SW_out) so that the output voltage is kept in a predetermined level. If current l_pp increased, it is detected in the input current detecting unit 53, and current sensing voltage which is fed back to the PWM control circuit 51 increases.

Based on the current sensing voltage, the PWM control circuit 51 adjusts the pulse interval of the switching signal (SW_0Ut) so that l_pp can decrease.

When transistor Q1 is turned on, a current is induced in the secondary coil by the current flowing through the primary coil of current-coupling transformer T2. The resistor (Ri) converts the current induced in transformer T2 into a voltage signal, and a voltage which is applied to the sensing terminal (SENSE) is determined by adjusting resistance value in the variable resistor (R₂). Capacitors (C₂, C₃) are for removing ripples and noise, and diode D2 converts and rectifies the detected square-wave signal to a DC signal. In sensing changes in the current flowing through the primary coil of transformer T1 , using the fact that (+) polarities of used powers are separated from each other as the primary coil and the secondary coil of transformer T2 are separated, the current-coupling transformer T2 enables a circuit structure for switching to a high frequency.

Preferably, the turns ratio of the primary coil and the secondary coil of transformer T2 is 1 :5-~200. For example, it is preferable that for low power less than 10W, if continuous current (l_PDc) flowing through the primary coil of main transformer T1 is equal to or less than 1.0A, the number of winding turns of the primary coil of transformer T2 is 1 , and that of the secondary coil of transformer T2 is 100. Preferably, material for the core of transformer T2 is the same as that of the core of main transformer T1.

Power loss of the ballast according to an embodiment of the present invention compared to the prior art ballast will now be explained. When 240V is applied as the least input DC voltage, a current spent for lighting one 40W fluorescent lamp becomes 50mA. When a half-bridge type converter is adopted as the inverter, current l_c flowing through this converter is as the following equation:

T 2P out

V„ m mm)

When 500W inverter is adopted, current l_c flowing through this converter is as the following equation:

2 x 500 I = = 4.16(,4)

240 ^J

Therefore, the number of 40W fluorescent lamps that can be connected to the 500W inverter is about 80 as the following equation:

4.16

N = = 83.2

¹ 0.05

In the ballast of the present invention, with the 500W inverter,

^' 40W x 80 fluorescent lamps, that is, 3,200W (P1 ) fluorescent lamps can be lighted. However, since a 110mA current is needed in order to light a 40W fluorescent lamp having the prior art individual electronic ballasts, only

38 fluorescent lamps can be lighted with 500W power as the following equation:

4.16

N, = = 37.8

¹ 0.11 The entire power for light the fluorescent lamps is 1.520W (P2).

The comparison of the efficiencies of the prior art ballast and the ballast of the present invention is as the following equation:

R - P₇ 3200- 1520 , η = - = = 0.525(52.5%)

' i^> 3200

Therefore, the ballast of the present invention can save about 50% electric energy compared to the prior art ballast. Also, power needed in lighting one 40W fluorescent lamp by the centrally-controlled ballast according to the present invention is actually 240V x 0.05A = 12W, while that power by the prior art ballast is 240V x 0.11 A = 26.4W. Therefore, since the ratio of power consumption is 0.45 (12/26.4), when the ballast of the present invention is used replacing the prior art ballast, about 55% energy saving effect can be achieved. Industrial Applicability

As described above, according to the electronic ballast of the present invention, since power supplied to the switching frequency oscillating unit (the PWM control circuit) is completely separated from power supplied to main power amplifier, oscillation does not occur and high efficiency can be achieved even when the switching frequency is raised. Also, since the switching frequency can be raised greatly compared to the prior art, the size of the transformer used in the converter can be reduced, and at the same time the number of winding turns of the coil can be reduced such that energy loss by the resistance of the coil can be reduced.

Meanwhile, after modularizing an input rectifier, which rectifies AC power into DC power, into a plurality of rectifier for low current connected in parallel, the current flowing through each rectifier module is lowered and therefore heat loss of the bridge diode included in the rectifier is minimized. By doing so, even when power consumption is large, a separate heat sink is not needed and cost for implementing a rectifier for high power can be lowered. In addition, when transient current or transient voltage occurs in the switching circuit for controlling the inverter, power is immediately automatically cut off such that stability of the ballast is improved.

Claims

What is claimed is:

1. An electronic ballast comprising: a power output unit which generates two Direct Current (DC) power, including first power which is used in amplification to the level of high voltage, and second power which is used in generation of a square-wave signal by a switching operation; a switching unit which operates at a predetermined frequency according to a switching signal, chops the second power into a square-wave signal having the predetermined frequency, and outputs the chopped signal; an inverter unit which receives the square-wave signal having the level of the second power, amplifies the received signal to a square-wave signal having the level of the first power, and provides the power to a discharging lamp; a current feedback unit which detects the output current of the inverter unit and feeds the detected current to the switching unit; and a switching control unit which controls the output of the inverter unit to be kept at a predetermined level, by adjusting the pulse phase of the switching signal according to the sense signal detected in the current feedback unit.

2. An electronic ballast comprising: . a power output unit which generates two Direct Current (DC) power, including first power which is used in amplification to the level of high voltage, and second power which is used in generation of a square-wave signal by a switching operation; a switching unit which operates at a predetermined frequency according to a switching signal, chops the second power into a square-wave signal having the predetermined frequency, and outputs the chopped signal; an inverter unit which has an up-output unit and a down-output unit that are alternately turned on or off according to the logic level of the input square-wave signal, and after setting a current path from the (+) terminal of the first power through the up-output unit to the intermediate tap terminal of the first power, or setting a current path from the intermediate tap terminal of the first power through the down-output unit to the (-) terminal of the first power, receives the square-wave signal having the level of the second power, amplifies the received signal to a square-wave signal having the level of the first power, and provides the power to a discharging lamp; a current feedback unit which detects the output current of the inverter unit which is provided to the discharging lamp, and feeds the detected current to the switching unit; and a switching control unit which controls the output of the inverter unit to be kept at a predetermined level, by adjusting the pulse phase of the switching signal according to the sense signal detected in the current feedback unit.

3. The electronic ballast of claim 2, wherein each of the up-output unit and the down-output unit has at least two transistors for switching; drain terminals of the transistors included in the up-output unit are connected to each other and then connected to the (+) terminal of the first power and the source terminals of the transistors included in the up-output unit are connected to each other; source terminals of the transistors included in the down-output unit are connected to each other and then connected to the (-) terminal of the first power and the drain terminals of the transistors included in the down-output unit are connected to each other; and the common drain terminal of the transistors of the down-output unit and the common source terminal of the transistors of the up-output unit are connected to each other to form an output terminal of the inverter unit.

4. The electronic ballast of claim 3, wherein each transistor included in the up-output unit or the down-output unit comprises: an electric discharging unit which discharges electric charge charged in a capacitor between the drain and the source of each transistor; and a snubber unit which supresses ringing phenomenon caused by leakage inductance of the primary coil of the transformer and the capacitance between the gate and the source of each transistor.

5. The electronic ballast of claim 4, wherein the snubber unit connects a resistor and a capacitor that are serially connected to each other to the secondary coil of the transformer in parallel.

6. The electronic ballast of claim 4, wherein the electric discharging unit comprises: a capacitor which charges an electric charge generated by capacitance between the drain and the source while the transistor is turned off; a resistor which discharges the electric charge stored in the capacitor while the transistor is turned on; and a diode which defines the direction of the current while the transistor is turned on or off.

7. The electronic ballast of any one of claims 1 and 2, wherein the first power output unit which generates the first power in the power output unit comprises at least two rectifier units, each of which receives an Alternating Current (AC), rectifies the AC current into a Direct Current (DC), and generates the voltage of the second power, wherein each rectifier unit has substantially the same internal structure, and outputs substantially the same voltage, and (+) output terminals of the rectifier units are connected to each other and (-) output terminals of the rectifier units are connected to each other.

8. The electronic ballast of claim 7, wherein each rectifier unit is formed of a module having a predetermined rating, and has a (+) output terminal and a (-) output terminal, and by connecting the (+) output terminals of the modules to each other and connecting the (-) terminals of the modules to each other, the modules form the first power output unit having a rating required as the first power.

9. The electronic ballast of any one of claims 1 and 2, wherein the second power output unit which generates the second power in the power output unit comprises: a first rectifier unit which receives AC power and rectifies the AC power into DC power; a second switching unit which is turned on or off in a predetermined frequency according to a switching signal; a power transforming unit of which the primary coil is connected between the DC power of the first rectifier unit and the second switching unit, and which intermits the DC power provided to the primary coil by on or off of the second switching unit to provide power to the secondary coil ; a second rectifier unit which is connected to the secondary coil of the power transforming unit and converts AC power into DC and outputs the second power; a detection unit which senses a current flowing the primary coil of the power transforming unit according to on or off operation of the second switching unit and feeds the sensed result to a control unit; and the control unit which receives the second power of the second rectifier unit which is fed back, and generates the switching signal according to an error signal which is the result of comparison of the fed back second power with a reference signal, and a sense signal which is output from the detection unit.

10. The electronic ballast of claim 9, wherein the detection unit comprises: a current-coupling transformer which is connected one polarity terminal of input DC power and the second switching unit, wherein the primary coil of the current-coupling transformer receives a current flowing through the primary coil of the power transforming unit according to on or off operation of the sensed switching unit to provide to the secondary coil of the current coupling transformer, and a signal generating unit which generates a sensed signal which is input to the control unit, from power induced in the secondary coil of the current-coupling transformer.

1 1. The electronic ballast of claim 9, wherein the second rectifier comprises: a transistor of which gate terminal and source terminal are respectively connected to two ends of the secondary coil of the power transforming unit, wherein an output terminal is drawn out from the drain terminal of the transistor; and a snubber unit which comprises at least one of a first snubber circuit and a second snubber circuit, wherein the first snubber circuit is to prevent a ringing phenomenon between the gate terminal and the source terminal by gate capacitance and leakage inductance of the power transforming unit, and the second snubber circuit is to prevent a ringing phenomenon between the drain terminal and the source terminal by capacitance between the drain and the source and leakage inductance of the power transforming unit.

12. The electronic ballast of claim 9, wherein in the second rectifier unit, a diode for rectification is connected to the secondary coil of the power transforming unit, and a snubber circuit is connected to both ends of the diode, or is connected to both ends of the secondary coil of the power transforming unit in order to prevent a ringing phenomenon by leakage inductance of the power transforming unit and junction capacitance of the diode.