WO2002027956A2 - Procede et systeme d'evaluation de la correction du decalage de frequence et de la rotation de phase dans des systemes cdma - Google Patents

Procede et systeme d'evaluation de la correction du decalage de frequence et de la rotation de phase dans des systemes cdma Download PDF

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Publication number
WO2002027956A2
WO2002027956A2 PCT/CA2001/001247 CA0101247W WO0227956A2 WO 2002027956 A2 WO2002027956 A2 WO 2002027956A2 CA 0101247 W CA0101247 W CA 0101247W WO 0227956 A2 WO0227956 A2 WO 0227956A2
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WO
WIPO (PCT)
Prior art keywords
frequency offset
output
phase rotation
finger
correlation
Prior art date
Application number
PCT/CA2001/001247
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English (en)
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WO2002027956A3 (fr
Inventor
Xixian Chen
Xin Jin
Mohamed El-Tarhuni
Runbo Fu
Jeffrey Stanier
Neil Mcgowan
Wen Zhao
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Nortel Networks Limited
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Publication date
Application filed by Nortel Networks Limited filed Critical Nortel Networks Limited
Priority to AU2001287452A priority Critical patent/AU2001287452A1/en
Priority to EP01966908A priority patent/EP1325564A2/fr
Publication of WO2002027956A2 publication Critical patent/WO2002027956A2/fr
Publication of WO2002027956A3 publication Critical patent/WO2002027956A3/fr

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B1/7073Synchronisation aspects
    • H04B1/7087Carrier synchronisation aspects
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B1/7097Interference-related aspects
    • H04B1/711Interference-related aspects the interference being multi-path interference
    • H04B1/7115Constructive combining of multi-path signals, i.e. RAKE receivers
    • H04B1/7117Selection, re-selection, allocation or re-allocation of paths to fingers, e.g. timing offset control of allocated fingers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation
    • H04B1/7097Interference-related aspects
    • H04B1/711Interference-related aspects the interference being multi-path interference
    • H04B1/7115Constructive combining of multi-path signals, i.e. RAKE receivers
    • H04B1/712Weighting of fingers for combining, e.g. amplitude control or phase rotation using an inner loop

Definitions

  • the invention relates to methods and systems for estimating frequency offset and phase rotation correction in CDMA systems, for example IS-95 and third generation CDMA systems.
  • this motion introduces a time varying Doppler shift on the signals received over the channel which may be observed as a change in the frequency of signals received over the channel.
  • the change in frequency, or Doppler shift is related to the velocity of the mobile terminal and the angle between the direction of motion of the mobile terminal and the direction of arrival of the signal at the receiver.
  • the change in frequency hereinafter frequency offset
  • frequency offset may be as high as 1.6 kHz for a mobile terminal moving at 900 km/h and communicating in the 1.9 GHz band. It is an established fact that this frequency shift, if not compensated for, will greatly degrade the overall system performance.
  • Embodiments of the invention provide methods and apparatus which estimate frequency offset correction in a manner which is suitable in environments which may involve high speeds .
  • the invention provides a frequency offset correction apparatus/method adapted to estimate a frequency offset correction from a despread finger output sequence.
  • the apparatus has a correlation function adapted to perform a correlation between an input sequence which is a function of the despread finger output sequence and a delayed version of the input sequence over an update period to produce a correlation output.
  • the apparatus has an instantaneous frequency offset determining function adapted to determine an instantaneous frequency offset as a function of the correlation output.
  • Decimation/summation can be performed at various points throughout the frequency offset determination, before or after application of the frequency offset correction. In most circumstances, the frequency offset correction will be estimated from a plurality of despread finger output sequences.
  • the entities which track and process resolvable ultipath components are commonly known as "Rake fingers" or simply “fingers".
  • a plurality of correlation functions each adapted to perform a respective correlation on respective input signals each of which is a function of a respective one of the plurality of despread finger output sequences to produce a corresponding plurality of correlation outputs, the correlation being performed between the respective input signal and a delayed version of the respective input signal.
  • a combiner combines the plurality of autocorrelation outputs to produce a combined correlation output, and an instantaneous frequency offset determining function determines an instantaneous frequency offset as a function of the combined correlation output.
  • the apparatus may further include a low-pass filter adapted to perform low-pass filtering on the instantaneous frequency offset to produce a filtered frequency offset.
  • the instantaneous frequency offset determining function is a function substantially mathematically equivalent to a scalar multiplied by an arctangent of the imaginary part of the correlation output over the real part of the correlation output.
  • the frequency offset correction is converted to a phase correction output with a numerically controlled oscillator.
  • a closed loop arrangement is provided wherein the frequency offset correction is fed back and applied prior to the correlation function.
  • the input signal is based upon a component which has known content, for example a pilot channel signal. In other embodiments, the input signal is based upon an input with unknown content which must therefore be estimated prior to correlation.
  • pilot channel phase rotation correction circuit adapted to apply the phase rotation correction to the pilot channel and/or a DLL (delay locked loop) phase rotation correction circuit adapted to apply the phase rotation correction to a DLL, and/or a finger ' sample phase rotation correction circuit adapted to apply a phase rotation correction circuit to finger data samples, and/or a searcher phase rotation correction circuit adapted to apply a phase rotation correction to a searcher.
  • DLL delay locked loop
  • Another embodiment of the invention provides a' CDMA receiver adapted to include any of the above summarized functionality.
  • Figure 1 is a block diagram of a frequency offset correction circuit according to a first embodiment of the invention
  • Figure 2 is a block diagram of a frequency offset correction circuit according to a second embodiment of the invention
  • Figure 3 is a schematic of circuitry using the phase rotation correction output produced by the circuitry of Figure 1 or 2 to apply correction to a pilot channel;
  • Figure 4 is a schematic of circuitry using the phase rotation correction output produced by the circuitry of Figures 1 or 2 in adjusting timing in a delay lock loop;
  • Figure 5 is a schematic of circuitry which applies the phase rotation correction output produced by the circuitry of Figure 1 or Figure 2 to correct data symbols;
  • Figure 6 and 7 are two different implementations of how the phase rotation correction can be applied to a searcher.
  • Figure 8 is a schematic diagram of modifications to the circuitry of Figure 1 to accommodate CDMA signals which do not have a pilot channel .
  • the invention provides systems and methods adapted to compensate for the frequency offset between a mobile terminal and a base station, as well as to compensate for the Doppler frequency shift introduced by high-speed moving airplanes .
  • the two parts may be implemented separately or together, and in any suitable fashion with appropriate combinations of hardware, software, DSP, ASICs, FPGA, processors etc .
  • the invention is' applied in the context of receivers for
  • CDMA signals Such receivers have searchers which are adapted to be able to track separate multipath components of received signals separately before combining the various multipath components .
  • the searcher is a functional block in all CDMA receivers whose purpose is to detect an access request of a mobile or to search for multipath components over a certain search window. It correlates a received signal with the locally generated PN code defined by the system time for all possible delay offsets specified in the search window. The search results are accumulated over the total correlation interval.
  • the search results are "fingers" to new or existing multipath components .
  • a mobile terminal After having successfully completed the forward link synchronization, a mobile terminal enters the cell network by sending a request on a common unlink access channel according to a Slotted ALOHA scheme.
  • An access request contains a preamble made of a un-modulated pilot followed by an encapsulated message.
  • the access searcher function performs the first detection of a user in the cell so as to determine an access request has been made by a mobile.
  • the network assigns a traffic channel to the mobile.
  • the traffic searcher function is performed to search for multipath components over a certain search window so as to maintain the traffic channel which has already been established.
  • a searcher has devices which track each multipath which are referred to as "Rake fingers", or simply "fingers". Each finger produces an early, on-time, and late output for the multipath component it is tracking.
  • the on-time output of each finger is despread using a despreading PN code.
  • the number of fingers used to receive a given channel is typically determined by the searcher and Finger Assignment algorithms.
  • an assumption which is made is that all the finger paths of the same user undergo approximately the same frequency shift and that this frequency shift changes relatively slowly with the time.
  • the estimation period might be selected for example to equal the duration of a CDMA frame which is 20 ms in some systems.
  • the frequency offset algorithm works on pilot signals output by fingers after PN despreading in CDMA receivers.
  • the pilot signal is a component of the received signal which for the most part has known contents at . the receiver. More generally any component with known content could be used.
  • the signal may also contain unknown content such as is the case with the pilot channel which also includes power control information which should be removed.
  • the pilot signal x(n) from one finger can be expressed as follows:
  • x(n) c(n) (n)exp(j2 ⁇ fnT)+ v(n).
  • c(n) is the transmitted chip sequence
  • ⁇ (n) is a term representative of the channel response (including fading for example)
  • f is the frequency offset which is to be determined
  • 1/T is the chip rate
  • v(n) is an additive noise component. It is to be understood however that ⁇ (n) would be different for each finger/multipath.
  • the frequency offset f includes the component due to Doppler shift, and any other components which might exist due to other sources, such as the frequency offset due to different carrier frequencies between two terminals.
  • Each FOIE block 14 is identical and only the details of one of the FOIE blocks are shown.
  • Each signal 10 is of the form of x(n) presented above. While ⁇ (n) and v(n) may be different from one finger to the next, the assumption is made for this embodiment that f, the frequency offset, is roughly a constant from one finger to the nex .
  • An intermediate signal s (n) is produced by a multiplier 16 which multiplies x(n) by c (n) * (the complex conjugate of the nth known PN code chip) as follows :
  • the FOIE block 14 has an optional summer 19 which performs an accumulation of M samples, for example 128 samples to produce a decimated signal.
  • M the case in which no accumulation of samples is performed.
  • a functional block 20 functions to zero any power control symbols in the signal, these being located in predetermined positions. Alternatively, a decoded estimate of the power control symbol can be made in which case correlation can be performed over those symbols as well.
  • the sequence is correlated with a delayed version of itself with correlator block 21. More particularly, samples are fed through a k-sample delay block 22, the conjugated output 24 of which is correlated with the non-delayed sample stream 25 with a multiplier 26.
  • the output of the multiplier 26 is combined in a combiner 28 over a predetermined period (in our example one CDMA frame of 20 ms) which we assume requires a summation over N samples to produce a correlator output r(k) which is output by the correlator block 21.
  • the correlator output r(k) can be expressed as:
  • ⁇ (n+k) is approximately equal to (n) .
  • the output r(k) of combiner 28 constitutes the output of the FOIE block 14. More generally, the output of the dth FOIE block will be denoted r ⁇ k) .
  • the outputs of all of the FOIE blocks 14 are then coherently combined in a combiner 30 to produce an output labelled "r- ( - 0 t (k) " which can be expressed as follows:
  • the output rt 0 t(k) of combiner 30 is fed to an arctan functional block 32 which computes an estimate of the frequency offset according to:
  • arctan functional block 32 can be implemented in any suitable way, including but not limited to table look-up, DSP etc.
  • the frequency offset estimate / is used to drive a NCO (Numerically Controlled Oscillator) 36 which in turn generates a phase rotation output 38 at a rate of 76.8 KHz.
  • NCO Numerically Controlled Oscillator
  • the complex conjugate of the phase rotation output 38 is used to correct the phase rotation errors in the signals introduced by the frequency offset. More
  • phase rotation output pre ( / ) is generated according to :
  • the estimated frequency offset can also be applied to the known pilot signal to obtain an estimate of the channel amplitude response ⁇ (n) for a given finger. More particularly,
  • u(n) is a noise component which can be approximated by:
  • z( n M ) ⁇ s( n M M + i) « a(n M M)Mexp(j2 ⁇ f nu M) + q(n M )
  • njyj is a counter for accumulated samples. Then a correlation on these accumulated samples is determined according to:
  • the frequency offset / can be stabilized by passing it through a low-pass filter such as a first order IIR filter 34 which performs smoothing of the frequency offset estimate over time.
  • the first order IIR 34 produces an output F(m+1) according to:
  • F(m + 1) (1- ⁇ ) F(m) + ⁇ f(m) ⁇
  • / (m) is the estimated frequency offset during the mth estimation period
  • is a parameter of the first order IIR 34.
  • F(m+1) is the filter output which will be used to correct the frequency offset in the next frame.
  • y foc ( n ) y(n)exp(-j2 ⁇ F(m)nT)
  • closed loop estimation of the frequency offset is performed.
  • An example of this is shown in Figure 2.
  • This Figure is similar to Figure 1.
  • the decimation formerly performed in a single step by summer 19 is performed in two stages, a first stage in which an M-fold decimation occurs in summer 19, and a second stage in which a P- fold decimation occurs in summer 50.
  • the product M x P is equivalent to M in Figure 1.
  • a block 20 which zeros the PC bits
  • a correlation function 14 consisting of a delay block 22, multiplier 26 and combiner 28 which performs autocorrelation over one frame (20 ms) .
  • the output of the combiner 28 is the output for that FOIE block 14.
  • a feedback signal 52 is determined using similar computations to those used in Figure 1 to determine the frequency offset estimate, namely with an arctangent function 32, followed by the first order IIR filter 58 which drives an NCO 52.
  • the output 53 of the NCO 52 is used to perform frequency shift correction as in the embodiment of Figure 1.
  • the complex conjugate of the NCO output is fed back as feedback signal 52 to the FOIE blocks 14 between the two decimation stages 19,50 where it is multiplied by the intermediate signal 54 which exists at that point in the forward processing path.
  • the estimated frequency offset which is the output of the low pass filter 34 drives the NCO 52 to generate a phase rotation output at an update rate of 76.8 KHz. Its complex conjugate is used to correct the phase rotation errors in the signals introduced by the frequency offset. Practically, compensation can be performed if - ⁇ 2 ⁇ MP(f - f)kT ⁇ , but performance may degrade as the limits of this range are approached.
  • the closed-loop estimation has a feed-back for phase rotation correction, while the open-loop estimation does not.
  • their first order IIR filter structures are slightly different.
  • the first method is restricted in the range of Doppler shift it can effectively correct.
  • the second method assuming there is a good initial estimate, can track any Doppler shift.
  • the pilot channel is used for channel estimation, forward link fast power control bit extraction, pilot power estimation, frequency offset estimation, lock detector, etc.
  • Figure 3 shows a block diagram for the pilot channel phase rotation correction using the phase rotation correction determined as described previously. The processing performed for each finger is the same and as such will only be described once.
  • the on-time output is multiplied by the PN code using multiplier 61 to despread the pilot channel with the "0"'s Walsh code.
  • the phase rotation correction factor (output at B) determined using the circuitry of Figure 1 or Figure 2 is applied multiplicatively to the output of the accumulator 60 using multiplier 62.
  • the accumulated signal thus generated is then output for use in the above discussed channel estimation, forward link fast power control bit extraction, pilot power estimation, frequency offset estimation, lock detector, etc., these functions being indicated generally by 66 in Figure 3.
  • phase rotation correction delay locked loop (DLL) functionality may be implemented as shown in Figure 4.
  • DLL delay locked loop
  • one of the fingers per se is shown generally indicated by 70, having an early output 72, an on-time output 74, and a late output 76 as has become conventional.
  • the phase rotation correction produced by the circuitry of Figure 1 or Figure 2 is indicated by B.
  • Phase rotation correction circuitry for DLL has a processing path 80 which operates on the early output 72, and a processing path 82 which operates on the late output 76. Since these processing paths 80, 82 are identical other than their inputs, processing path 80 will be described by way of example.
  • the phase rotation correction factor B determined in accordance with Figure 1 or Figure 2 for example by the output of the accumulator 84. After coherent or non-coherent accumulations performed by accumulator 88, the results are output for use in adjusting the timing in
  • the phase rotation correction for finger on-time data symbol may be implemented as shown in Figure 5.
  • the input to the processing of this figure is the on-time output of each of the fingers which is despread by PN code multiplier 91 and Walsh code multiplier 93 and accumulated over the symbol duration in accumulator 95.
  • the accumulated output of each finger is multiplied with a respective multiplier 90 by the phase offset correction factor B.
  • the searcher is a functional block in all CDMA receivers whose purpose is to search for a PN code transmitted by a mobile terminal so as to determine that an access request has been made, or so as to maintain a channel which has already been established.
  • a searcher having an input buffer 100 in which samples are initially collected.
  • the searcher operates on samples collected in the input buffer 100. 384 even samples from the input buffer 100 are fed to a first searching process 102 and more specifically are first fed to a first shift register 104 while 384 odd samples are fed to a second searching process 106 the details of which are not shown but which are identical to the first searching process 102.
  • There is a code generator 110 which generates the PN code for correlation indicated as c(n),n 1,..,N stored in a buffer 112. The PN code thus generated and stored in buffer 112 is multiplied term by term with the contents of the shift register 104.
  • phase rotation correction is applied with multipliers 118 as controlled by the NCO.
  • the results are then coherently accumulated in accumulator 120, converted to a real sealer in block 122 and summed over the correlation period in summer 114.
  • FIG 7 another option for performing phase rotation correction for the searcher is shown in which the despeading code is multiplied with the phase rotation estimate and the result is then correlated with the received chip rate samples. This modified despreading code is then used in the searcher in an otherwise conventional fashion.
  • the invention as described is applicable to CDMA systems and to DS spread spectrum systems in general which include a reverse link pilot channel.
  • a reverse link pilot channel for example as in the case with IS-95, then an estimate of the data symbols may be used to perform the frequency offset estimation.
  • a block detector 148 processes the fast Hadamard transformer outputs, and based on block detection results, block 150 selects the appropriate one of the 64 possible detection results and outputs this to the remainder of the frequency offset correction circuitry previously discussed with reference to Figure 1.
  • the block detector 148 may be implemented in accordance with co-pending Application No. 09/216972 filed December 21, 1998 entitled “Block Detection Receiver" assigned to the same assignee as this application and hereby incorporate by reference in its entirety.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

L'invention concerne des procédés et des appareils évaluant l'évaluation et la correction du décalage de fréquence d'une manière qui est appropriée pour des milieux mettant en oeuvre des vitesses élevées. L'invention concerne également un appareil et un procédé de correction du décalage de fréquence permettant d'évaluer une correction du décalage de fréquence à partir d'une séquence désétalée de sortie de doigts. L'appareil comprend une fonction de corrélation conçue pour effectuer une corrélation entre une séquence d'entrée qui est une fonction de la séquence désétalée de sortie de doigts et une version retardée de la séquence d'entrée pendant une période de mise à jour, en vue de produire une sortie de corrélation. L'appareil comprend également une fonction de détermination du décalage de fréquence instantané permettant de déterminer un décalage de fréquence instantané en tant que fonction de la sortie de corrélation. Dans la plupart des cas, la correction du décalage de fréquence est évaluée à partir d'une pluralité de séquences désétalées de sortie de doigts. Dans un tel contexte, une pluralité de fonctions de corrélation est prévue, chacune des fonctions étant conçue pour effectuer une corrélation respective sur des signaux d'entrée respectif, chaque signal étant une fonction d'une séquence désétalée de sortie de doigts respective, de manière à obtenir une pluralité correspondante de sorties de corrélation, la corrélation étant effectuée entre le signal d'entrée respectif et une version retardée du signal d'entrée respectif. Un combineur combine la pluralité de sorties d'autocorrélation, en vue de produire une sortie de corrélation combinée, et une fonction de détermination du décalage de fréquence instantané détermine un décalage de fréquence instantané en tant que fonction de la sortie de corrélation combinée. De manière à éliminer une variabilité à court terme dans l'évaluation, l'appareil peut également comprendre un filtre passe-bas conçu pour effectuer un filtrage passe-bas sur le décalage de fréquence instantané, en vue d'obtenir un décalage de fréquence filtré.
PCT/CA2001/001247 2000-09-28 2001-09-07 Procede et systeme d'evaluation de la correction du decalage de frequence et de la rotation de phase dans des systemes cdma WO2002027956A2 (fr)

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Application Number Priority Date Filing Date Title
AU2001287452A AU2001287452A1 (en) 2000-09-28 2001-09-07 Method and system for estimating frequency offset and phase rotation correction in cdma systems
EP01966908A EP1325564A2 (fr) 2000-09-28 2001-09-07 Procede et systeme d'evaluation de la correction du decalage de frequence et de la rotation de phase dans des systemes cdma

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US09/671,254 2000-09-28

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008118985A1 (fr) * 2007-03-26 2008-10-02 Qualcomm Incorporated Estimateur de décalage de fréquence amélioré
US8331492B2 (en) * 2002-07-04 2012-12-11 Intel Mobile Communications GmbH Device and method for determining the deviation of the carrier frequency of a mobile radio device from the carrier frequency of a base station
CN111935050A (zh) * 2020-06-17 2020-11-13 中国船舶重工集团公司第七一五研究所 一种基于相位搜索的单载波频域均衡水声通信系统残余相偏修正方法

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US5361276A (en) * 1993-09-13 1994-11-01 At&T Bell Laboratories All digital maximum likelihood based spread spectrum receiver
US5659573A (en) * 1994-10-04 1997-08-19 Motorola, Inc. Method and apparatus for coherent reception in a spread-spectrum receiver

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5361276A (en) * 1993-09-13 1994-11-01 At&T Bell Laboratories All digital maximum likelihood based spread spectrum receiver
US5659573A (en) * 1994-10-04 1997-08-19 Motorola, Inc. Method and apparatus for coherent reception in a spread-spectrum receiver

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8331492B2 (en) * 2002-07-04 2012-12-11 Intel Mobile Communications GmbH Device and method for determining the deviation of the carrier frequency of a mobile radio device from the carrier frequency of a base station
WO2008118985A1 (fr) * 2007-03-26 2008-10-02 Qualcomm Incorporated Estimateur de décalage de fréquence amélioré
US8457178B2 (en) 2007-03-26 2013-06-04 Qualcomm Incorporated Frequency offset estimator
CN111935050A (zh) * 2020-06-17 2020-11-13 中国船舶重工集团公司第七一五研究所 一种基于相位搜索的单载波频域均衡水声通信系统残余相偏修正方法
CN111935050B (zh) * 2020-06-17 2022-07-05 中国船舶重工集团公司第七一五研究所 一种基于相位搜索的单载波频域均衡水声通信系统残余相偏修正方法

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EP1325564A2 (fr) 2003-07-09
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