WO2002027780A1 - Resin-sealed semiconductor device, and die bonding material and sealing material for use therein - Google Patents

Resin-sealed semiconductor device, and die bonding material and sealing material for use therein Download PDF

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Publication number
WO2002027780A1
WO2002027780A1 PCT/JP2001/008559 JP0108559W WO0227780A1 WO 2002027780 A1 WO2002027780 A1 WO 2002027780A1 JP 0108559 W JP0108559 W JP 0108559W WO 0227780 A1 WO0227780 A1 WO 0227780A1
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WO
WIPO (PCT)
Prior art keywords
sealing material
die
semiconductor device
mpa
peak temperature
Prior art date
Application number
PCT/JP2001/008559
Other languages
French (fr)
Japanese (ja)
Inventor
Kazuhiko Kurafuchi
Naoya Suzuki
Masaaki Yasuda
Tatsuo Kawata
Hiroyuki Sakai
Masao Kawasumi
Original Assignee
Hitachi Chemical Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co., Ltd. filed Critical Hitachi Chemical Co., Ltd.
Priority to US10/381,034 priority Critical patent/US6774501B2/en
Priority to KR10-2003-7004525A priority patent/KR100535848B1/en
Priority to AU2001290314A priority patent/AU2001290314A1/en
Priority to JP2002531477A priority patent/JP3702877B2/en
Publication of WO2002027780A1 publication Critical patent/WO2002027780A1/en

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    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
    • C08G59/00—Polycondensates containing more than one epoxy group per molecule; Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups
    • C08G59/18—Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing
    • C08G59/20—Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing characterised by the epoxy compounds used
    • C08G59/22—Di-epoxy compounds
    • C08G59/30—Di-epoxy compounds containing atoms other than carbon, hydrogen, oxygen and nitrogen
    • C08G59/302—Di-epoxy compounds containing atoms other than carbon, hydrogen, oxygen and nitrogen containing sulfur
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L63/00—Compositions of epoxy resins; Compositions of derivatives of epoxy resins
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    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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Definitions

  • the present invention relates to a resin-encapsulated semiconductor device that suppresses warpage of a semiconductor chip, and is excellent in temperature cyclability and solderability. More particularly, the present invention relates to a resin-encapsulated semiconductor device using a copper lead frame. The present invention relates to a device and a die bonding material and a sealing material used for the device.
  • a semiconductor chip such as an LSI is electrically sealed with a lead frame and then sealed with a sealing material for protection from an external environment to form a package.
  • a typical example of a package is a dual in-line package (DIP).
  • DIP is a pin insertion type, and a semiconductor device is attached by inserting pins into a mounting board.
  • a typical example of a surface mount type package is a quad flat package ⁇ (QFP).
  • QFP quad flat package ⁇
  • the QFP is designed to be fixed directly to the surface of the mounting board by soldering, etc., and has the advantages that the package can be made thinner and that it can be mounted on both sides of the mounting board, reducing the occupied area. I have.
  • a semiconductor chip 11 is mounted via a die pound material 12 on a die pound pad 15 located substantially at the center of the lead frame. After the lead 16 and the chip 11 are electrically connected with the gold wire 14, the whole is sealed with the sealing material 13.
  • the packaged (resin-sealed semiconductor device) 10 package is solder-mounted on a printed wiring board (not shown) and is actually used.
  • the problem during the manufacturing process of such a package, and the subsequent stages of mounting and use, is that after the dip material hardens when the chip 11 is fixed to the pad 15 as shown in Figure 1B.
  • Fig. 1C cracks 17 in the package due to high-temperature reflow and temperature cycling during mounting and use, and peeling 18a and 18b, as shown in Fig. 1C.
  • chip warpage in the package manufacturing process is due to thermal stress caused by the difference in physical properties between the semiconductor chip 11 and the lead frame (die pond pad) 15.
  • the difference in the coefficient of thermal expansion from the semiconductor chip is large, and the semiconductor chip 11 is likely to be warped. In the worst case, the semiconductor chip itself will be damaged. If the semiconductor chip 11 adhered to the lead frame is transported in the rack with warpage remaining, it may cause a transport jam and a wiring error in the next process.
  • the adhesive force of the sealing material 13 to the inner lead 16a ⁇ die bond pad 15 is reduced due to thermal stress due to heating and moisture absorption of the sealing material 13.
  • peeling 18a at the interface between the inner lead 16a and the sealing material 13 and peeling 18b at the interface between the die pond pad 15 and the sealing material 13 occur. Copper suffers from severe degradation of adhesion to the encapsulant after being subjected to the thermal history, and the effect is serious when a Cii lead frame is used.
  • FIG. 2 is an enlarged view of the peeling and cracks shown in FIG. 1C.
  • FIG. 2A in actual use, when subjected to thermal shock due to repeated temperature cycling, cracks 17 occur in the sealing material 13 starting from the end of the die pad 15. Such cracks are mainly caused by differences in the physical properties of the package components. Although it is due to stress, in the worst case, cracks may reach the surface of the resin-encapsulated semiconductor device. If cracks reach the package surface, moisture will enter the cracks, reducing the moisture resistance reliability. Also, as shown in FIG.
  • the present invention is intended to solve these problems, and overcomes the drawbacks of the conventional QFP. Even when a Cu lead frame is used, the warpage of the semiconductor chip after curing of the die bonding material is reduced, and It is an object of the present invention to provide a resin-encapsulated semiconductor device which has a high connection reliability between an inner lead and a die pond pad during mounting, and can suppress a crack originating from an end of the die bond pad during a temperature cycle. Aim.
  • a lead frame having a die pond pad and inner leads, a semiconductor chip installed on a die bond pad via a die bond material, and the semiconductor
  • a semiconductor device including a sealing material for sealing a chip and a lead frame, wherein the characteristics of the die bonding material and the sealing material satisfy a specific relationship.
  • the die pond pad Assuming that the shear strain energy of the sealing material to be cured is Ud, the properties of the cured dip pounder and the sealing material satisfy at least one of the following equations (1), (2), and (3).
  • ae Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to 25 ° C (1 to 1 )
  • ae z Average thermal expansion of the sealing material from the molding temperature of the semiconductor device to the peak temperature during solder mounting Coefficient (1Z ° C)
  • the flexural modulus of the die pound material at 25 is between lMPa and 30 OMPa. This effectively prevents the semiconductor chip from being warped at 25 ° C. after the die pond material is cured.
  • an inorganic filler contains 20 to 85% by weight, a resin component, and a low stress agent of 40 to 70% by weight of the entire resin component, and has a peak temperature at a solder mounting peak temperature.
  • a die pound material having a flexural modulus of 7 OMPa or less.
  • t-Bu represents a tertiary butyl group.
  • the encapsulant 25 bending ⁇ coefficient ° C shall have 26GPa or less, an average thermal expansion coefficient from the molding temperature to 25 of the semiconductor device is 0. 7 X 10 5 Z ° C or more, bending fracture at 25 ° C strength 12 ompA or more, bending modulus of at soldering peak temperature 65 ompA less, an average thermal Rise expansion coefficient from the molding temperature of the semiconductor device to a peak temperature soldering is below 5. 0X 10 5 Z ° C is there.
  • the shear strain energy of the inner lead and the sealing material at the peak temperature during solder mounting is 1.35 x 10 6 Nm or more, and the shear strain energy of the die bond pad and the sealing material at the peak temperature during solder mounting. Is 6.8 X 1 ( ⁇ 6 ⁇ ⁇ m or more.
  • FIG. 1 is a diagram showing problems that occur in the process of manufacturing, mounting, and using a resin-encapsulated semiconductor device.
  • FIG. 2 is a diagram showing cracks and peeling that occur in a resin-sealed semiconductor device.
  • Fig. 3 is a graph showing the relationship (25 ° C) between the flexural modulus (MPa) of the die pound material after curing at 25 ° C and the warpage (m) of the chip.
  • Figure 4 is a table showing the directionality of material properties (die pond material, encapsulant) required to reduce chip warpage and improve temperature cycle resistance.
  • Fig. 5 is a diagram for explaining the measurement of the reflow resistance of the sealing material.
  • Fig. 5A shows the test piece used for measurement
  • Fig. 5B shows the shear strain energy of the sealing material using this test piece.
  • Figure 5C shows that the load F applied to the sealing material is integrated with the displacement X.
  • 6 is a graph showing a shear strain energy U obtained by the following.
  • FIG. 6 is a partial cross-sectional view of a resin-sealed semiconductor device used for analyzing reflow resistance.
  • the semiconductor chip is fixed on a die pond pad via a die pond material, and after the hardening, the chip warp at 25 ° C is determined by the curing temperature and curing time of the die pond material, the semiconductor chip and the die pond pad. If it is assumed that the external dimensions of the material are constant, it is considered that (1) the elastic modulus of the die pound material is affected.
  • the inventors focused on this effect, and as a result of repeated research, among the modulus of the die pound material, the flexural modulus was the main factor of chip warpage, and after hardening, that is, the flexural modulus of the die pound material at 25 It has been found that by setting the coefficient at 300 MPa or less, the warpage of the chip can be suppressed.
  • the inorganic filler is 20 to 85% by weight, the resin component, It was discovered that chip warpage can be minimized by including a stress reducing agent that accounts for more than 40% by weight of the total resin component.
  • the dip pond material 20 to 85% by weight of an inorganic filler, a resin component, A resin containing a low-stressing agent occupying 70% by weight or less of the entire resin component is used.
  • the sealing material, the flexural modulus at 2 5 ° C 2 6 GP a below average thermal expansion coefficient from the molding temperature of the semiconductor device up to 2 5 ° C 0. 7 X 1 0- 5 / ° C Over 2 5 Use a material that has a bending rupture strength at ° C of 12 OMPa or more. The inventors have found that cracks at the edge of the die bond pad during temperature cycling can be suppressed by combining these die bond materials and the sealing material.
  • the details of the composition of the dip-bonding material and the sealing material satisfying this certain relationship will be described later.
  • the die bonding material 20 to 5% by weight of an inorganic filler, the resin component, and the entire resin component are used. And a low-stressing agent occupying 40% by weight or more of the above.
  • the sealing material a material containing an inorganic filler of 82 to 90% by weight and an epoxy resin represented by a specific chemical formula is used. The inventors have found that by combining these, the peeling of each part during solder mounting is suppressed.
  • copper alloys and iron-nickel alloys are widely used for lead frame materials (including die pond pads and inner-lead portions) used in semiconductor devices.
  • Different coefficient of thermal expansion of the lead frame of a material to be used for example, the thermal expansion coefficient of the copper alloy 1. 7 X 1 0- 5, that's iron one nickel alloys, 0. In 5 X 1 0 one 5 Z ° C is there.
  • the warpage of the semiconductor chip is also greatly affected by the thermal expansion coefficient of the lead frame, and becomes larger as the difference in the thermal expansion coefficient between the chip and the lead frame (particularly, the die pond pad portion) increases.
  • the warpage of the semiconductor chip element is small and does not pose a problem because the difference in thermal expansion coefficient from the semiconductor chip is small, but the electrical properties such as conductivity, the operating characteristics, and the heat dissipation Given this, there is an increasing demand for the use of copper alloy lead frames.
  • the warpage of the semiconductor chip becomes large due to a large difference in thermal expansion coefficient from the semiconductor chip.
  • Figure 3 shows the results of examining the relationship between chip warpage and the physical properties of the die bond material using a commercially available warpage deformation analysis tool. From this result, it can be seen that the warpage of the chip is hardly affected by the coefficient of thermal expansion of the die bond material and is greatly affected by the flexural modulus.
  • 8 mm X 10 mm X 0.28 mm chip 3 ⁇ 4 Using die pond materials with different bending stiffness coefficients, fix it on the die pond pad of the lead frame at 150 ° C for 1 hour curing condition. The warpage of the chip at 5 ° C was measured. Since the measured values agree well with the analysis results, it is only necessary to consider the flexural modulus of the die pond material when considering the warpage of the chip.
  • the bending elastic modulus of the die pound material was measured at 25 ° C according to JIS-K-6911. If the test piece is an 8 mm X 10 mm chip, the function and structure of the semiconductor chip will not be affected if the warpage of the chip does not exceed about 30. From the graph of Fig. 3, the bending elastic modulus Edt of the die pond material at 25 ° C can be set to 30 OMPa or less in order to keep the chip warpage within the range of 30 or less.
  • the die-bonding material having a flexural modulus Edt at 25 ° C of 30 OMPa or less may be in the form of a base or a film.
  • the composition is as follows: the inorganic filler is 20 to 85% by weight; It is preferable to include a resin component and 40% by weight or more of a low-stressing agent based on the entire resin component.
  • Inorganic fillers include fused silica, crystalline silica, spherical silica, alumina, calcium carbonate, zirconium silicate, calcium silicate, talc, clay, mai force, boron nitride, aluminum hydroxide, silver powder, copper powder, nickel powder And the like. If the amount of the inorganic filler in the die pond material is less than 20% by weight or more than 85% by weight, the workability when applying or attaching the die pond material to the die bond pad portion is reduced.
  • the die pond contains a curing agent and a curing accelerator, and a coupling agent, a reactive diluent, and the like are used as needed.
  • the low-stressing agent include butadiene-acrylonitrile copolymers, modified copolymers having an amino group, an epoxy group, or a hydroxyl group at the terminal or side chain thereof, butadiene such as acrylonitrile-butadiene-styrene copolymer, etc.
  • a silicone-based elastomer having an amino group, a hydroxyl group, an epoxy group, or a carboxyl group at a terminal or a side chain.
  • the die pond material used in the present embodiment includes, in addition to the low stress agent, A dropping agent may be blended.
  • a dropping agent may be blended.
  • the present invention is particularly suitably applied to a resin-sealed semiconductor device using a copper alloy lead frame.
  • a copper alloy lead frame whose surface is plated with any of silver, gold, and palladium.
  • thermal stress of the die bond pad end Vito
  • flexural breaking strength of the sealing material ilexural streng th
  • the thermal stress ⁇ at the end of the die pond pad is expressed as Ee, the elastic modulus at 25 ° C of the encapsulant, and the coefficient of thermal expansion at 25 ° C of the encapsulant.
  • Ee the thermal expansion coefficient of the lead frame, and is expressed by the following equation.
  • the number 1 in the subscript indicates that the parameter is set on the low temperature side (25 ° C or less).
  • Equation (7) shows that the thermal stress ⁇ generated at the end of the die pond pad is proportional to the characteristic.
  • the bending rupture strength (MPa) of the sealing material conforms to JIS K 691 1.
  • the following equation is obtained by performing a bending test.
  • the test piece is obtained by hardening and molding the sealing material to a predetermined size by a transfer press, and performing after-curing at 175 ° (:, 5 hours).
  • the inventors have conducted research on the relationship between the bending rupture strength and the characteristic value of the sealing material, and analyzed the experimental examples described later. As a result, the ratio of the bending rupture strength ( ⁇ !) To the property ( ⁇ b) was 0.2. By setting the following, we found that cracks at the end of the die pond pad that occur during temperature cycling can be suppressed.
  • the bending elastic modulus of the die pound material In order to set the ratio of the bending rupture strength b of the encapsulant to the characteristic ere (ie, eZ and b) to 0.2 or less, the bending elastic modulus of the die pound material must be increased from Equation (8).
  • small bending elastic modulus Ee t of the sealing member to increase the thermal expansion coefficient of Q! ei sealant, and it is necessary to increase the flexural breaking strength sigma! of the sealing material.
  • more than IMPa bending elastic modulus of the die-bonding material hereinafter 26GPa flexural modulus Ee t sealant, thermal expansion coefficient Monument sealant 0. 7X 1 0- 5 / ° C or more, the flexural breaking strength Si) of the sealing material, have to desirable to the 12 ompA or more.
  • Flexural breaking strength is less than 120 MP a sealant, thermal expansion coefficient of 0. 7 X 10 _ 5 Z ° C less than, the flexural modulus of the sealant is greater than 26 GPa, the flexural breaking strength and properties Since the ratio (hi / crb) may exceed 0.2, cracks cannot be sufficiently prevented.
  • the plating on the surface of the lead frame varies depending on the type of lead frame, but the cracks at the end of the die bond pad can be explained by the ratio of the rupture strength ff b of the sealing material to the characteristic (oe / ob).
  • Plating is not particularly limited. Therefore, generally, plating of silver, gold, palladium or the like may be used.
  • the inner lead part of the lead frame has a length of l mm to 20 mm, a width of 0.1 111 111 to 1 11111, a thickness of 1 to 0.5 mm, and a die pound pad part of 2 mm X Those having a thickness of 2 mm to 20 X 20 mm and a thickness of 0.1 mm to 0.5 mm are preferably used.For example, only the inner lead is adhered to improve the wire-to-bonding property. May be.
  • the bending elastic moduli E ei and Ed of the sealing material and the die pond material were determined by preparing a cured product of the sealing material and the die bond material at 25 ° C and according to JIS-K-6911. Obtained by testing.
  • the thermal expansion coefficient ae of the encapsulant is determined from the slope from the molding temperature of the semiconductor device to 25 ° C by preparing a cured encapsulant and measuring it using a thermomechanical analyzer.
  • a resin-encapsulated semiconductor device using a sealing material and a die-bonding material that satisfies the above relationship _ ⁇ ⁇ ) ⁇ 0.2 can be used even when subjected to severe thermal shock such as during a temperature cycle. Cracks at the end of the pound pad can be suppressed.
  • the die pond material that satisfies the above relationship may be in the form of a paste or a film.
  • the composition is such that the inorganic filler is 20 to 85% by weight, the resin component, and 70% of the total resin component.
  • the resin component may be an ordinary resin, and among them, cresol nopolak epoxy resin, bisphenol F epoxy resin, bisphenol AD epoxy resin, and acrylic resin are preferably used.
  • the amount of the inorganic filler is less than 20% by weight or more than 85% by weight of the entire die bonding material, workability in applying or attaching the die bonding material to the die bonding pad portion is reduced.
  • the thermal stress of the die pond pad is the flexural modulus of the die pond material. As the bending modulus of the die bond material becomes smaller, the thermal stress at the die bond pad edge increases, and the relationship of oe Z ff b ⁇ 0.2 cannot be satisfied.
  • the amount of the low stress agent is preferably set to 70% by weight or less of the entire resin component excluding the solvent and the inorganic filler. If it exceeds 70% by weight, the flexural modulus of the die bond material becomes extremely small, which is effective in preventing chip warpage. However, thermal stress at the end of the die pond pad during temperature cycling cannot be reduced. It is.
  • Figure 4 is a table showing the directionality of material properties (die pond material, encapsulant) required to reduce chip warpage and improve temperature cycle resistance. Since the semiconductor chip warpage is a stage before resin encapsulation, the parameters of the encapsulant are irrelevant. It is the properties of die pound material that affect both chip warpage and temperature cycling resistance. In order to minimize the warpage of the chip, it is desirable that the bending elastic modulus of the die pond material is low, but it is desirable that the temperature be high during a temperature cycle, as described above. Therefore, in order to maintain product reliability both after mounting the semiconductor chip on the die pond pad and during the temperature cycle after sealing with the sealing material, the range of the bending elastic modulus of the die bonding material is optimal. Must be set to
  • the bending elastic modulus of the die pound material is preferably IMPa or more and 30 OMPa or less, and the die bonding material that achieves such a bending elastic modulus is 40% or more and 70% of the entire resin component. It is preferable to include the following range of the low stress agent.
  • the sealing material used in the present invention is usually in the form of a powder or an evening bullet, has a flexural modulus of 26 GPa or less, a thermal expansion coefficient of 0.7 X 10 5 / ° C or more, If the flexural strength b is 12 OMPa or more, the main ingredient is not particularly limited. Preferred examples include biphenyl epoxy resins and cresol novolac epoxy resins.
  • the sealing material contains a hardening agent, a hardening accelerator, and an inorganic filler in addition to the main agent, and a flame retardant, a coupling agent, a wax, and the like are used as needed.
  • a rubber component such as silicone oil, silicone rubber, or synthetic rubber may be added to the sealing material used in the present invention, or an ion trapping agent may be added.
  • the method for sealing a semiconductor chip using such a sealing material is not particularly limited, and is used in ordinary transfer molding and the like. It can be performed by a known molding method as described below.
  • the resin-encapsulated semiconductor device obtained in this way is excellent in both the warpage of the semiconductor chip and the thermal cycle resistance, and can prevent cracks from being generated from the end of the die pond pad even under severe thermal shock. .
  • peeling of the interface between the inner lead and the sealing material and peeling of the interface between the die pond pad (back surface) and the sealing material become problems. Peeling is due to the adhesiveness (shear strain energy) between the inner lead and die pond pad and the sealing material after the sealing material has absorbed moisture, and the heat generated at the interface between these members and the sealing material. Affected by stress. Then, as described above, peeling can be eliminated by satisfying a certain relationship between the shear stress energy of each part and the sealing material at the peak temperature at the time of solder mounting and the thermal stress.
  • the thermal stress ⁇ i generated at the interface between the lead and the encapsulant during solder mounting is as follows: the elastic modulus of the encapsulant is Ee 2 , the thermal expansion coefficient is o; e 2 , the thermal expansion coefficient of the lead frame Is represented by the following equation.
  • the subscript number 2 indicates that the parameter is settled on the hot side.
  • aei, AED construction characteristics indicative of the thermal stress expressed by the physical properties of the material
  • kd 2 The ratio of flexural modulus of elasticity Ed 2 Daipondo material in soldering peak temperature for ⁇ coefficient IMP a (Ed 2> lMP a )
  • ⁇ Difference in thermal expansion coefficient between sealing material and lead frame at high temperature side.
  • .DELTA..tau 2 is the difference between the forming temperature and soldering peak temperature of the semiconductor device.
  • the thermal stress generated in the inner lead is proportional to the characteristic aei, and the thermal stress generated in the die pond pad is proportional to the characteristic aed.
  • the shear strain energy U (N-m) between the inner lead portion and the die pond pad portion of the lead frame and the sealing material at the peak temperature at the time of solder mounting is determined by the force applied when the sealing material is sheared (that is, Load) and the resulting displacement.
  • the heat of the shear adhesion tester set to the peak temperature at the time of solder mounting was used. Leave on the plate 22 for 20 seconds, then apply a load to the sealing material 13 while moving the test head 21 at 50 m / s, and load F (N) and displacement X (m) of the sealing material 13 Is calculated from the following equation.
  • the shear strain energy U S F ⁇ dx Equation (16)
  • the shear strain energy U is the value obtained by integrating the load F with the displacement X as shown by the hatched area in FIG. 5C.
  • the test piece shown in Fig. 5A is a lead frame 20 with the same material and the same specifications as the inner lead part and die pond pad. It is obtained by curing and molding to a diameter of 7 mm and after-curing at 175 ° C for 5 hours.
  • the moisture absorption time of the semiconductor device is t 1 ()
  • the moisture absorption time of the test piece is t 2 (h)
  • the thickness of the sealing material from the semiconductor device surface to the inner lead portion and the die bond pad portion is hi (mm).
  • the moisture absorption time t 2 of the test piece is determined.
  • the actual semiconductor device has a moisture absorption time t1 of 168 hours
  • the thickness h1 of the encapsulant from the semiconductor device surface to the inner lead portion is 0.625 mm as shown in Fig. 6, and the test sample is sealed.
  • the moisture absorption time t2 of the test piece is determined to be about 280 hours from equation (17).
  • the shear strain energy Ui of the sealing material for the inner lead and the sealing strain Ud of the sealing material for the die pond pad are set high. It is necessary to lower the characteristics aei and ffed. However, even if the shear strain energies Ui and Ud are high, if the characteristics ei and aed are high, the inner lead portion and die pad portion may peel off. On the other hand, even if the shear strain energies Ui and Ud are low, if the characteristics aei and oed are low, the inner lead portion and die pond pad portion may not peel off. Therefore, it is important to set the shear strain energies Ui and Ud at the inner lead portion and die bond pad portion and the corresponding characteristic values aei and ed in a well-balanced manner.
  • the inventors repeated research on the relationship between the shear strain energies Ui (N-m) and Ud (Nm) and the characteristics ⁇ ei (MPa) and aed (MPa), and performed the experimental analysis described below. As a result,
  • the ratio ( ⁇ / ⁇ ) of the shear strain energy Ui of the sealing material to the inner lead portion and the characteristic aei ( ⁇ / ⁇ ) is 2.0X10-6 or more, and the ratio of the shear strain energy Ud of the sealing material to the die pond pad and the characteristic aed ( to be order the UdZaed) to 4. 69X 10- 6 or more, from the results of experiments analyzes described below, the following condition is derived.
  • a resin-encapsulated semiconductor device manufactured using a die-pound material and an encapsulant satisfying such conditions can be used for the inner lead of a lead frame even at high temperatures such as when soldering to a printed wiring board. Interface and sealing material, Peeling at the interface between the pad and the sealing material can be effectively prevented, and the reliability of the product is improved.
  • Flexural modulus of Daipondo material in soldering peak temperature exceeds the 7 ompA
  • flexural modulus of the sealant is greater than 65 ompA
  • flexural modulus of the sealant is greater than 65 ompA, the thermal expansion coefficient of the sealing material 5.
  • Exceeded 0X 10- 5 Z ° C, and shear strain E Nerugi one sealing material for the inner lead portions There 1. less than 35 X 10_ 6 N ⁇ m, the ratio of shear strain observed energy Ui and characteristics aei inner first lead portion (UiZaei) is 2. summer less than 0 X 10- 6, In'na one Li one de The peeling of the part cannot be sufficiently suppressed.
  • the shear strain energy of the sealing material for the inner lead and die bond pad varies depending on the plating on the surface of the lead frame. However, even if the plating is different, the peeling of the inner lead and the die pound pad is the shear strain energy Ui. Since it can be explained by the ratio of Ud, characteristic ⁇ , and aed, the plating on the surface of the lead frame is not particularly limited, and plating containing any of silver, gold, and palladium is generally used.
  • the bending elastic modulus of the die pond material and the sealing material is measured according to JI SK-6911 under the atmosphere of the peak temperature (for example, 245 ° C) at the time of mounting the die pond material and the hardened sealing material. Obtained by:
  • the thermal expansion coefficient is obtained by preparing a cured encapsulant and performing measurement using a thermomechanical analyzer, and obtaining the slope from the molding temperature of the resin-encapsulated semiconductor device to the peak temperature during solder mounting.
  • the sealing material that satisfies the above-described conditions is usually in the form of a powder or a tablet.
  • the main component of the sealing material is not particularly limited, but a phenyl type epoxy resin ⁇ cresol novolak type epoxy resin or the like is preferably used.
  • the epoxy resin represented by the following general formula (I) has a low flexural modulus at high temperatures and can reduce the thermal stress in the inner leads and die pond pads. Can be.
  • the content be at least 10% by weight, more preferably at least 20% by weight, of the entire resin component in the sealing material. If the content is less than 10% by weight, the elasticity cannot be sufficiently reduced, and the thermal stress in the inner lead portion and the die pond pad portion cannot be reduced.
  • the sealing material contains a curing agent, a curing accelerator, and an inorganic filler in addition to the main agent, and a flame retardant, a coupling agent, a wax, and the like are used as needed.
  • the blending amount of the inorganic filler is preferably set at 80% by weight or more and less than 95% by weight of the whole sealing material. Particularly preferred is the range from 82% to 90% by weight. If the amount is less than 80% by weight, the shear adhesion after moisture absorption is reduced due to an increase in the saturated water absorption of the sealing material, and the thermal stress increases due to a large thermal expansion coefficient.
  • the content exceeds 95% by weight, the viscosity of the encapsulant during transfer molding increases, so that wire flow and molding defects are likely to occur, and the bending stress coefficient of the cured encapsulant increases, resulting in thermal stress. Is increased.
  • a low stress agent such as silicone oil, silicone rubber, or synthetic rubber may be added to the sealing material, or an ion trapping agent may be added.
  • a stress reducing agent is added, the thermal coefficient of each part can be reduced because the elasticity coefficient of the sealing material can be reduced.
  • the amount of the low-stressing agent is preferably set to 5% by weight or more of the entire resin component.
  • the method of sealing the semiconductor chip with such a sealing material is not particularly limited, and it can be performed by a known molding method such as that used in ordinary transfer molding.
  • die pond materials satisfying the above conditions are usually in the form of a paste or a film. It is preferable that the blending amount of the inorganic filler is set to 20 to 85% by weight of the whole die pond material, and the blending amount of the low stress agent is set to 40% by weight of the whole resin component.
  • Epoxy resin (trade name, manufactured by Toto Kasei)
  • EXA-830CRP Bisphenol F-type epoxy resin
  • CTBNX-1009SP carboxyl-terminated butadiene atarilonitrile rubber, low stress agent Ube Industries, Ltd.
  • the semiconductor chip was placed on a dip pad of a lead frame using a die pond material having the composition shown in Table 4, and fixed at 150 ° C. for 1 hour.
  • the semiconductor chip used had an external dimension of 8. OmmXI O. Omm, a thickness of 0.28 mm, a lead frame made of copper alloy, and a silver-plated inner lead.
  • the warpage of the semiconductor chip thus obtained was measured at 25 ° C.
  • the warpage of the semiconductor chip was measured by using a surface roughness meter and running 9 mm on the top surface of the chip. The results are shown in Tables 6-9 below.
  • the semiconductor chip is molded by transfer molding at 175 ° C, 6.9MPa, 90 seconds, and after-cured at 175 ° C, 5 hours for resin sealing.
  • a type semiconductor device was obtained.
  • This semiconductor device is an 80-pin QFP with external dimensions of 14 mm X 2 Omm and a thickness of 1.4 mm. Specifically, it is the same as the semiconductor device shown in FIG. 6, and the thickness of the sealing material from the surface of the sealing material to the inner lead portion is 0.625 mm, and the thickness of the sealing material from the surface of the sealing material to the die pound pad portion. The thickness of the sealing material is 0.475 mm.
  • the solder mountability test conforms to JEDEC (Joint Electron Device Engineering COUDCil) LEVEL 1, and the obtained semiconductor device is subjected to 168 hours of moisture absorption at 85 ° C and 85% 11 for 11 hours. The test was performed at a temperature of 245 ° C and three repetitions. After that, the peeling of the inner lead part and the die pond pad part was observed with an ultrasonic imaging device.
  • JEDEC Joint Electron Device Engineering COUDCil
  • the temperature cycling resistance test was repeated 100,000 cycles in accordance with the MIL standard (STD-883E condit ionC), with one cycle of 15 minutes at 150 ° C and 15 minutes at 65 ° C. Then, the cracks at the end of the die pond pad were observed by cross-sectional observation.
  • Tables 6 to 9 show the results of measuring the cracks at the end of the die pond pad after 1000 temperature cycles, together with the warpage of the semiconductor chip.
  • Table 10 shows the results of measuring the peeling of the inner lead after the solder mountability test.
  • Tables 11, 11, and 13 show the results of measuring the peeling of the die pound pad after the solder mountability test. Show. Test for measuring the shear strain energy between the inner lead and the sealing material The moisture absorption time of the specimen was 168 hours for the semiconductor device, the thickness of the sealing material from the surface of the sealing material to the inner part was 0.625 mm, and the thickness of the sealing material of the test piece was 1. Since it is 0 mm, the measurement was performed in 280 hours using the equation (17).
  • the moisture absorption time of the test piece was 168 hours for the semiconductor device, and the encapsulant from the surface of the encapsulant to the die pond pad was 168 hours. Since the thickness of the test piece was 0.475 mm and the thickness of the sealing material of the test piece was 1.0 mm, the test was performed in 375 hours using equation (17).
  • the peeling of the inner lead after the solder mountability test depends on the parameter ratio of equation (2) for the sealing material (when the value of UiZ and eD is greater than 2.0X1O- 6. Peeling of the inner first lead portion does not occur.
  • the parameter Isseki ratio UiZ shed ei
  • peeling occurs between the sealing material and the inner lead portion.
  • Parameter ratio (oe / o) related to crack at the edge of die pond pad during temperature cycling is 0.2 or less.
  • the warpage of the chip is small, cracks at the end of the die pond pad, peeling of the die pond pad portion, and peeling of the inner lead portion are eliminated.
  • a resin-encapsulated semiconductor device having excellent temperature cycle resistance and solderability can be obtained.
  • the optimal physical condition of the die pond material and the sealing material is specified as follows. Can be.
  • the bending elastic modulus of the die pound material after curing at 25 ° C. is 1 to 300 MPa
  • the properties of the die pound material and the sealing material after curing are:
  • inorganic filler 20-85% by weight of inorganic filler, resin, resin component A die pond material containing 40 to 70% by weight of a low-stress agent, an epoxy resin represented by the general formula (I) and an inorganic filler, wherein the content of the inorganic filler is 82
  • the resin-encapsulated semiconductor device of the present invention suppresses the warpage of the semiconductor chip, and does not generate cracks at the end of the die pond pad even under severe conditions during a temperature cycle. Furthermore, even when soldering to a printed circuit board, etc., the inner leads and die pond pads do not peel off, and the operation is excellent. In particular, when applied to a surface mount type package such as QFP, the semiconductor chip is small in warpage, has excellent temperature cycle resistance and solder mountability, and is optimal.
  • the die pond material and the encapsulant of the present invention prepare the die pond material, the encapsulant, and the lead frame from the beginning, assemble the resin-encapsulated semiconductor device, and warp the semiconductor chip, solder mountability, and endurance.
  • the reliability results can be predicted from the physical properties of the sealing material and dip pound material without evaluating the temperature cycling properties, and the development cycle of die bonding materials for semiconductor devices and sealing materials can be significantly shortened. it can.

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Abstract

A resin-sealed semiconductor device which comprises a lead frame having a die bonding pad and an inner lead, a semiconductor chip installed on the die bonding pad via a die bonding material and a sealing material for sealing the semiconductor chip and the lead frame, wherein properties of the die bonding material and the sealing material after curing satisfies the following formulae: σe ≤ 0.2 X σb formula (1) Ui ≥ 2.0 X 10-6 X σei formula (2) Ud ≥ 4.69 X 10-6 X σed formula (3), wherein σb(Mpa) represents the flexural strength at break of the sealing material at 25 °, Ui(N • m) and Ud(N • m) represent shear strain energies of the sealing material at a soldering temperature for the inner lead and the die bonding pad, respectively, at a peak temperature during soldering, where σe = (1/log(kd¿1?)) X Ee1 X (αm -αe1) X Δ T1 formula (4), σei = Ee2 X (αe2 - αm) X ΔT2 formula (5), σed = log(kd2) X Ee2 X (αe2 - αm) X ΔT2 formula (6), kd1: a ratio of the flexural modulus Ed1(Mpa) of the die bonding material at 25 ° to 1 Mpa of elastic modulus (Ed1 > 1 Mpa), kd2: a ratio of the flexural modulus Ed2(Mpa) of the die bonding material at a peak temperature during soldering to 1 Mpa of elastic modulus (Ed2 > 1 Mpa), Ee1: a flexural modulus (Mpa) of the sealing material at 25 °, Ee2: a flexural modulus (Mpa) of the sealing material at a peak temperature during soldering, αe1: an average thermal expansion coefficient (1/°) of the sealing material from the forming temperature for the semiconductor to room temperature (25°), αe2: an average thermal expansion coefficient (1/°)of the sealing material from the forming temperature for the semiconductor to a peak temperature during soldering, αm: a thermal expansion coefficient (1/°) of the lead frame, ΔT1: the difference (°)between the forming temperature for the semiconductor and the low temperature side temperature in the temperature cycle, and ΔT2: the difference (°)between the forming temperature for the semiconductor and the peak temperature during soldering.

Description

明 細 書 樹脂封止型半導体装置、 これに用いるダイボンド材および封止材 発明の関連する技術分野  Description Resin-encapsulated semiconductor device, die-bonding material used therefor, and encapsulating material Related technical field of the invention
本発明は、 半導体チップの反り変形が抑制され、 かつ、 温度サイクル性と、 は んだ実装性に優れた樹脂封止型半導体装置に関し、 特に銅リ一ドフレームを用い た樹脂封止型半導体装置と、 これに用いるダイボンド材および封止材に関する。 技術背景  The present invention relates to a resin-encapsulated semiconductor device that suppresses warpage of a semiconductor chip, and is excellent in temperature cyclability and solderability. More particularly, the present invention relates to a resin-encapsulated semiconductor device using a copper lead frame. The present invention relates to a device and a die bonding material and a sealing material used for the device. Technology background
L S I等の半導体チップは、 リードフレームとの電気的接合をとつた後、 外部 環境からの保護を目的として封止材により封止され、 パッケージとしての形にな る。 パッケージの代表例として、 デュアルインラインパッケージ （D I P ) があ る。 この D I Pは、 ピン挿入型であり、 実装基板にピンを挿入することにより半 導体装置を取り付ける。 最近、 L S Iの高集積化や高速化に加えて、 電子装置自 体の小型化や高機能化の要求から、 高密度での実装が進んでいる。 このため、 D I Pのようなピン揷入型のパッケージに加えて、 表面実装型パッケージも多ピン 用途のパッケージの主流になってきている。  A semiconductor chip such as an LSI is electrically sealed with a lead frame and then sealed with a sealing material for protection from an external environment to form a package. A typical example of a package is a dual in-line package (DIP). This DIP is a pin insertion type, and a semiconductor device is attached by inserting pins into a mounting board. Recently, high-density mounting is advancing due to the demand for smaller and more sophisticated electronic devices in addition to the higher integration and higher speed of LSI. For this reason, in addition to pin-in packages such as DIP, surface mount packages are becoming the mainstream package for multi-pin applications.
表面実装型パッケージの代表例として、 クアツドフラットパッケー^ (Q F P ) がある。 Q F Pは、 実装基板の表面に、 直接はんだ等によって固定するように 設計されており、 パッケージを薄くできるとともに、 実装基板に対して両面実装 が可能であり、 占有面積を小さくできるという利点を備えている。  A typical example of a surface mount type package is a quad flat package ^ (QFP). The QFP is designed to be fixed directly to the surface of the mounting board by soldering, etc., and has the advantages that the package can be made thinner and that it can be mounted on both sides of the mounting board, reducing the occupied area. I have.
Q F Pは、 図 1 Aに示すように、 リードフレームのほぼ中央部に位置するダイ ポンドパッド 1 5上に、 半導体チップ 1 1がダイポンド材 1 2を介して搭載され ている。 リード 1 6とチップ 1 1とが金ワイヤ 1 4で電気接続された後、 全体が 封止材 1 3で封止される。 封止されてパッケージ （樹脂封止型半導体装置） 1 0 の形態になったものがプリント配線基板 （不図示） 上にはんだ実装され、 実際に 使用される。 このようなパッケージの製造過程と、 その後の実装、 使用の段階で問題になる のが、 図 1 Bに示すように、 ヂップ 1 1をパッド 1 5に固定するときに生じるダ ィポンド材硬^後のチップの反りと、 図 1 Cに示すように、 実装、 使用段階での 高温リフローや温度サイクルによるパッケージ内でのクラック 1 7、 はく離 1 8 a、 1 8 bである。 In the QFP, as shown in FIG. 1A, a semiconductor chip 11 is mounted via a die pound material 12 on a die pound pad 15 located substantially at the center of the lead frame. After the lead 16 and the chip 11 are electrically connected with the gold wire 14, the whole is sealed with the sealing material 13. The packaged (resin-sealed semiconductor device) 10 package is solder-mounted on a printed wiring board (not shown) and is actually used. The problem during the manufacturing process of such a package, and the subsequent stages of mounting and use, is that after the dip material hardens when the chip 11 is fixed to the pad 15 as shown in Figure 1B. As shown in Fig. 1C, cracks 17 in the package due to high-temperature reflow and temperature cycling during mounting and use, and peeling 18a and 18b, as shown in Fig. 1C.
まず、 パッケージ製造工程におけるチップの反りは、 半導体チップ 1 1とリ一 ドフレーム （ダイポンドパッド） 1 5の物性の違いに起因する熱応力による。 特 に銅 （C u) のリードフレームを使用する場合、 半導体チップとの熱膨張率の差 が大きく、 半導体チップ 1 1に反りが発生しやすい。 最悪の場合、 半導体チップ 自体が破損してしまう。 リードフレームに接着された半導体チップ 1 1に反りが 残ったままラック内を搬送されると、 搬送ジャムの原因になり、 さらに、 次工程 でのワイヤリングエラーの原因になる。  First, chip warpage in the package manufacturing process is due to thermal stress caused by the difference in physical properties between the semiconductor chip 11 and the lead frame (die pond pad) 15. Particularly when a copper (Cu) lead frame is used, the difference in the coefficient of thermal expansion from the semiconductor chip is large, and the semiconductor chip 11 is likely to be warped. In the worst case, the semiconductor chip itself will be damaged. If the semiconductor chip 11 adhered to the lead frame is transported in the rack with warpage remaining, it may cause a transport jam and a wiring error in the next process.
次に実装、 使用段階で、 パッケージ 1 0がマザ一ボードにはんだ実装されると きに、 リフローで高温にさらされる。 はんだ実装で通常用いられる赤外線リフロ 一装置等では、 半導体装置は最高で 2 1 5 °C〜2 4 5 °Cに加熱される。 はんだ実 装では、 錫一鉛共晶はんだが広く用いられていたが、 最近、 鉛は環境に悪影響を 及ぼすことから、 鉛を使用しない鉛フリーはんだの開発が進められている。 鉛フ リーはんだは、 錫—鉛共晶はんだに比べ融点が高いために、 はんだ実装時に半導 体装置は 2 4 5で〜 2 8 0 °Cまでにも加熱されることになる。 このリフロー工程 で、 加熱による熱応力と、 封止材 1 3の吸湿により、 インナーリード 1 6 aゃダ ィボンドパッド 1 5に対する封止材 1 3の接着力が低下する。 接着力が低下する と、 インナーリード 1 6 aと封止材 1 3の界面のはく離 1 8 aや、 ダイポンドパ ッド 1 5と封止材 1 3の界面のはく離 1 8 bが発生する。 銅は、 熱履歴を受けた 後の封止材との密着性の劣化がはげしく、 C iiリードフレームを用いた場合、 そ の影響は深刻である。  Next, during the mounting and use stages, when the package 10 is solder-mounted on the motherboard, it is exposed to high temperatures by reflow. In an infrared reflow device usually used for solder mounting, a semiconductor device is heated to a maximum of 215 ° C to 245 ° C. Tin-lead eutectic solder has been widely used in solder mounting, but lead has a negative impact on the environment. Recently, lead-free solders that do not use lead are being developed. Since the melting point of lead-free solder is higher than that of tin-lead eutectic solder, the semiconductor device is heated to 245 ° C to 245 ° C during solder mounting. In this reflow step, the adhesive force of the sealing material 13 to the inner lead 16a ゃ die bond pad 15 is reduced due to thermal stress due to heating and moisture absorption of the sealing material 13. When the adhesive strength is reduced, peeling 18a at the interface between the inner lead 16a and the sealing material 13 and peeling 18b at the interface between the die pond pad 15 and the sealing material 13 occur. Copper suffers from severe degradation of adhesion to the encapsulant after being subjected to the thermal history, and the effect is serious when a Cii lead frame is used.
図 2は、 図 1 Cに示すはく離、 クラックの拡大図である。 図 2 Aに示すよう に、 実際の使用時に、 温度サイクルの繰り返しによる熱衝撃を受けると、 ダイポ ンドパッド 1 5の端部を起点として、 封止材 1 3にクラック 1 7が生じる。 この ようなクラックは、 主としてパッケ一ジ構成材料の物性の相違によつて生じる熱 応力によるものであるが、 最悪の場合、 クラックが樹脂封止型半導体装置の表面 にまで到達することがある。 クラックがパッケージ表面に達した場合には、 クラ ックから水分が進入し、 耐湿信頼性が低下する。 また、 図 2 Bに示すように、 ィ ンナーリード 1 6 aと封止材 1 3との間にはく離 1 8 aがあると、 その後に繰り 返される使用時の温度サイクルによって、 金ワイヤ 1 4の亀裂 1 9の原因となり 、 最悪の場合、 断線することがある。 一方、 ダイポンドパッド 1 5と封止材 1 3 の界面でのはく離 1 8 bもまた、 その後の温度サイクルによって、 ダイポンドパ ッド 1 5の角から延びるクラック 1 7の原因になる。 FIG. 2 is an enlarged view of the peeling and cracks shown in FIG. 1C. As shown in FIG. 2A, in actual use, when subjected to thermal shock due to repeated temperature cycling, cracks 17 occur in the sealing material 13 starting from the end of the die pad 15. Such cracks are mainly caused by differences in the physical properties of the package components. Although it is due to stress, in the worst case, cracks may reach the surface of the resin-encapsulated semiconductor device. If cracks reach the package surface, moisture will enter the cracks, reducing the moisture resistance reliability. Also, as shown in FIG. 2B, if there is a peel 18 a between the inner lead 16 a and the sealing material 13, the temperature cycle during use that is repeated thereafter causes the gold wire 14 to In the worst case, a break may occur, causing a crack 19. On the other hand, delamination 18 b at the interface between die pond pad 15 and encapsulant 13 also causes cracks 17 extending from the corners of die pond pad 15 due to subsequent temperature cycling.
これらの問題に対する解決策として、 吸湿による接着力の低下を抑えるために 、 半導体装置自体を防湿梱包し、 マザ一ボードへの表面実装の直前に開封して使 用する方法や、 表面実装の直前に半導体装置を 1 0 0 °Cで 2 4時間乾燥させ、 そ の後はんだ実装を行なう方法が提案、 実施されている。  As a solution to these problems, in order to suppress the decrease in adhesive strength due to moisture absorption, the semiconductor device itself is packed in a moisture-proof package and opened and used just before surface mounting on the motherboard. In recent years, a method of drying a semiconductor device at 100 ° C. for 24 hours and then performing solder mounting has been proposed and implemented.
しかしながら、 このような前処理方法によれば、 製造工程が長くなる上、 手間 がかかるという問題がある。 本発明は、 これら問題を解決するためのものであつ て、 従来の Q F Pの欠点を克服し、 C uリードフレームを使用した場合にも、 ダ ィボンド材硬化後の半導体チップの反りを小さく、 はんだ実装時のィンナーリ一 ドとダイポンドパッドの接続信頼性を高く、 さらには温度サイクル時のダイボン ドパッド端部を起点としたクラックを抑制することのできる樹脂封止型半導体装 置を提供することを目的とする。 発明の開示 上記目的を達成するため、 本発明のひとつの側面として、 ダイポンドパッドお よびインナーリードを有するリードフレームと、 ダイボンドパッド上にダイボン ド材を介して設置される半導体チップと、 前記半導体チップおよびリードフレー ムを封止する封止材とを含み、 前記ダイボンド材と封止材の特性が特定の関係を 満たす半導体装置を提供する。 この半導体装置は、 2 5 °Cでの封止材の曲げ破断 強度をび b 、 はんだ実装時ピーク温度でのインナ一リードに対する封止材のせん 断歪みエネルギーを Ui 、 はんだ実装時ピーク温度でのダイポンドパッドに対す る封止材のせん断歪みエネルギーを Udとすると、 硬化後のダイポンド材および封 止材の特性が、 以下の式 （1) 式 （2) 、 式 （3) の少なくともひとつを満た す。 However, according to such a pretreatment method, there is a problem that a manufacturing process becomes long and labor is required. The present invention is intended to solve these problems, and overcomes the drawbacks of the conventional QFP. Even when a Cu lead frame is used, the warpage of the semiconductor chip after curing of the die bonding material is reduced, and It is an object of the present invention to provide a resin-encapsulated semiconductor device which has a high connection reliability between an inner lead and a die pond pad during mounting, and can suppress a crack originating from an end of the die bond pad during a temperature cycle. Aim. DISCLOSURE OF THE INVENTION As one aspect of the present invention, in order to achieve the above object, a lead frame having a die pond pad and inner leads, a semiconductor chip installed on a die bond pad via a die bond material, and the semiconductor A semiconductor device including a sealing material for sealing a chip and a lead frame, wherein the characteristics of the die bonding material and the sealing material satisfy a specific relationship. In this semiconductor device, the bending rupture strength of the encapsulant at 25 ° C and b, the shear strain energy of the encapsulant against the inner lead at the peak temperature during solder mounting, Ui, and the peak temperature during solder mounting, The die pond pad Assuming that the shear strain energy of the sealing material to be cured is Ud, the properties of the cured dip pounder and the sealing material satisfy at least one of the following equations (1), (2), and (3).
σ e ≤ 0. 2 X σ b 式 （ 1 ) Ui ≥2. 0 X 10"6 X aei 式 （2)σ e ≤ 0.2 X σ b Equation (1) Ui ≥ 2.0 X 10 " 6 X aei Equation (2)
Ud ≥4. 69 X 1 O-6 X aed 式 （3) し し し、 Ud ≥4.69 X 1 O -6 X aed Equation (3)
ae =(1/1 o g (kd,)) Ee^ (am- e^ ΧΔΤ, 式 （4) aei = Ee2 X ( ae2— am) X ΔΤ2 式 (5) aed= 1 o g (kd2) XEe2 X (ae2- am) ΧΔΤ2 式 （6) kdt：弾性係数 IMP aに対する 25 °Cでのダイポンド材の曲げ弾性係数 E （Mae = (1/1 og (kd,)) Ee ^ (am- e ^ ΧΔΤ, Equation (4) aei = Ee 2 X (ae 2 — am) X ΔΤ 2 Equation (5) aed = 1 og (kd 2 ) XEe 2 X (ae 2 -am) ΧΔΤ 2 Equation (6) kd t : Modulus of elasticity of die pound material at 25 ° C against elastic modulus IMP a E (M
Pa)の比 （Ε(^〉1ΜΡ&) Pa) ratio (Ε (^〉 1ΜΡ &)
kd2：弾性係数 IMP aに対するはんだ実装時ピーク温度でのダイポンド材の曲 げ弹性係数 E d2 (MP a)の比 （Ed2〉lMP a) kd 2 : The ratio of the elastic modulus ED a to the bending coefficient E d 2 (MP a) of the die pound material at the peak temperature during soldering (Ed 2 〉 lMP a)
Ee1： 25 °Cでの封止材の曲げ弹性係数 （MP a) Ee 1 : Flexural modulus of sealant at 25 ° C (MPa)
Ee2：はんだ実装時ピーク温度での封止材の曲げ弾性係数 （MP a) Ee 2 : Flexural modulus of sealing material at peak temperature during solder mounting (MPa)
ae,：半導体装置の成形温度から 25 °Cまでの封止材の平均熱膨張係数（1ノ1 ) aez：半導体装置の成形温度からはんだ実装時ピーク温度までの封止材の平均熱 膨張係数 （1Z°C) ae ,: Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to 25 ° C (1 to 1 ) ae z : Average thermal expansion of the sealing material from the molding temperature of the semiconductor device to the peak temperature during solder mounting Coefficient (1Z ° C)
am : リードフレームの熱膨張係数 （1/°C) am: Thermal expansion coefficient of lead frame (1 / ° C)
ΔΤ,：半導体装置成形温度と温度サイクル時の低温側温度との差 CC)  ΔΤ ,: Difference between semiconductor device molding temperature and low-temperature temperature during temperature cycle CC)
ΔΤ2：半導体装置成形温度とはんだ実装時ピーク温度との差 （°C) ΔΤ 2 : Difference between semiconductor device molding temperature and peak temperature during solder mounting (° C)
好ましくは、 25ででのダイポンド材の曲げ弾性係数 は、 lMP a〜30 OMP aである。 これによつて、 ダイポンド材硬化後において、 25°Cでの半導 体チップの反りが効果的に防止できる。  Preferably, the flexural modulus of the die pound material at 25 is between lMPa and 30 OMPa. This effectively prevents the semiconductor chip from being warped at 25 ° C. after the die pond material is cured.
本発明の別の側面では、 無機質充填剤を 20〜85重量％と、 樹脂成分と、 こ の樹脂成分全体の 40〜70重量％の低応力化剤とを含み、 はんだ実装時ピーク 温度での曲げ弾性係数が 7 OMPa以下であるダイポンド材を提供する。  According to another aspect of the present invention, an inorganic filler contains 20 to 85% by weight, a resin component, and a low stress agent of 40 to 70% by weight of the entire resin component, and has a peak temperature at a solder mounting peak temperature. Provide a die pound material having a flexural modulus of 7 OMPa or less.
本発明のさらに別の側面では、 下記の一般式 （I) で表されるエポキシ樹脂と 、 無機質充填剤を 82〜 90重量％とを含み、 半導体装置の樹脂封止に用いられ る封止材を提供する （一般式 （I) 中、 t— Buは、 ターシャリーブチル基を示 す） 。 In still another aspect of the present invention, an epoxy resin represented by the following general formula (I): And 82 to 90% by weight of an inorganic filler to provide a sealing material used for resin sealing of semiconductor devices. (In the general formula (I), t-Bu represents a tertiary butyl group.) ).
Figure imgf000008_0001
この封止材は、 25°Cでの曲げ弹性係数が 26GPa以下、 半導体装置の成形温度 から 25 までの平均熱膨張係数が 0. 7 X 10 5Z°C以上、 25 °Cにおける曲 げ破断強度が 12 OMPa以上、 はんだ実装時ピーク温度での曲げ弾性係数が 65 OMPa以下、 半導体装置の成形温度からはんだ実装時ピーク温度までの平均熱膨 張係数が 5. 0X 10 5Z°C以下である。 また、 はんだ実装時ピーク温度でのィ ンナーリ―ドと封止材のせん断歪みエネルギーが 1. 35 X 10 6 N · m以上、 はんだ実装時ピーク温度でのダイボンドパッドと封止材のせん断歪みエネルギー は 6. 8 X 1 (Γ6Ν · m以上である。
Figure imgf000008_0001
The encapsulant 25 bending弹性coefficient ° C shall have 26GPa or less, an average thermal expansion coefficient from the molding temperature to 25 of the semiconductor device is 0. 7 X 10 5 Z ° C or more, bending fracture at 25 ° C strength 12 ompA or more, bending modulus of at soldering peak temperature 65 ompA less, an average thermal Rise expansion coefficient from the molding temperature of the semiconductor device to a peak temperature soldering is below 5. 0X 10 5 Z ° C is there. In addition, the shear strain energy of the inner lead and the sealing material at the peak temperature during solder mounting is 1.35 x 10 6 Nm or more, and the shear strain energy of the die bond pad and the sealing material at the peak temperature during solder mounting. Is 6.8 X 1 (Γ 6 Ν · m or more.
本発明のその他の特徴、 効果は、 以下で詳細に述べる実施の形態からいっそう 明確になるものである。 図面の簡単な説明  Other features and effects of the present invention will become more apparent from the embodiments described in detail below. BRIEF DESCRIPTION OF THE FIGURES
図 1は、 樹脂封止型半導体装置の製造、 実装、 使用過程で生じる問題を示す図 である。  FIG. 1 is a diagram showing problems that occur in the process of manufacturing, mounting, and using a resin-encapsulated semiconductor device.
図 2は、 樹脂封止型半導体装置に生じるクラック、 はく離を示す図である。 図 3は、 25°Cでの硬化後のダイポンド材の曲げ弾性係数 （MPa) とチップ の反り （ m) の関係 （25°C) を示すグラフである。  FIG. 2 is a diagram showing cracks and peeling that occur in a resin-sealed semiconductor device. Fig. 3 is a graph showing the relationship (25 ° C) between the flexural modulus (MPa) of the die pound material after curing at 25 ° C and the warpage (m) of the chip.
図 4は、 チップの反りを低減し、 耐温度サイクル性を向上させるために必要と される材料物性 （ダイポンド材、 封止材） の方向性を示す表である。  Figure 4 is a table showing the directionality of material properties (die pond material, encapsulant) required to reduce chip warpage and improve temperature cycle resistance.
図 5は、 封止材の耐リフロー性の測定を説明するための図であり、 図 5Aは測 定に用いる試験片を、 図 5 Bはこの試験片を用いた封止材のせん断歪みエネルギ —の測定方法を、 図 5Cは、 封止材.に印加される荷重 Fを変位 Xで積分すること により得られるせん断歪みエネルギー Uを表わすグラフである。 Fig. 5 is a diagram for explaining the measurement of the reflow resistance of the sealing material. Fig. 5A shows the test piece used for measurement, and Fig. 5B shows the shear strain energy of the sealing material using this test piece. Figure 5C shows that the load F applied to the sealing material is integrated with the displacement X. 6 is a graph showing a shear strain energy U obtained by the following.
図 6は、 耐リフロー性の分析に用いる樹脂封止型半導体装置の部分断面図であ る。  FIG. 6 is a partial cross-sectional view of a resin-sealed semiconductor device used for analyzing reflow resistance.
発明の実施の形態 本発明の実施の形態を詳細に述べる前に、 上述したチップの反り、 クラック、 部材はく離という問題を解決する原理について述べる。  DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Before describing embodiments of the present invention in detail, a principle for solving the above-described problems of chip warpage, cracks, and member peeling will be described.
まず、 半導体チップをダイポンドパッド上にダイポンド材を介して固定し、 硬 化した後の 2 5 °Cでのチップの反りは、 ダイポンド材の硬化温度および硬化時間 と、 半導体チップおよびダイポンドパッドの外形寸法が一定であると仮定するな らば、 ( 1 ) ダイポンド材の弾性係数、 に影響されると考えられる。 発明者らは この影響に着目し、 研究を重ねた結果、 ダイポンド材の弹性係数の中でも、 曲げ 弹性係数がチップ反りの主因子であり、 硬化後、 すなわち 2 5ででのダイポンド 材の曲げ弹性係数を 3 0 0 M P a以下とすることにより、 チップの反りを抑制で きることを突き止めた。 曲げ弾性係数が 3 0 O M P a以下となるようなダイボン ド材を実現する組成の詳細については後述するが、 発明者等は、 無機質充填剤を 2 0〜8 5重量％と、 樹脂成分と、 樹脂成分全体の 4 0重量％以上を占める低応 力化剤とを含むことによって、 チップの反りを最小にできることを発見しだ。 次に、 温度サイクル、 すなわち低温と高温との繰り返しによる熱衝撃によって ダイボンドバッド端部に生じるクラックは、 （2 ) ダイポンドパッド端部の熱応 力、 （3 ) 封止材の曲げ破断強度、 に影響を受けると考えられる。 発明者らは、 これらの影響に着目し、 研究を重ねた結果、 温度サイクル時のダイボンドパッド 端部のクラックは、 ダイポンドパッド端部の熱応力と封止材の曲げ破断強度が一 定の関係を満足するように設定することにより、 防止できることを突き止めた。 この一定の関係を満足することのできるダイポンド材と封止材の組成の詳細につ いては後述するが、 ダイポンド材としては、 無機質充填剤を 2 0〜8 5重量％と 、 樹脂成分と、 樹脂成分全体の 7 0重量％以下を占める低応力化剤とを含むもの を用いる。 封止材としては、 2 5 °Cでの曲げ弾性係数を 2 6 G P a以下、 半導体 装置の成形温度から 2 5 °Cまでの平均熱膨張係数を 0 . 7 X 1 0— 5/°C以上、 2 5 °Cでの曲げ破断強度を 1 2 O M P a以上であるものを用いる。 発明者等は、 これ らのダイボンド材と封止材を組み合わせることによって、 温度サイクル時のダイ ボンドパッド端部のクラックを抑えることができることを発見した。 First, the semiconductor chip is fixed on a die pond pad via a die pond material, and after the hardening, the chip warp at 25 ° C is determined by the curing temperature and curing time of the die pond material, the semiconductor chip and the die pond pad. If it is assumed that the external dimensions of the material are constant, it is considered that (1) the elastic modulus of the die pound material is affected. The inventors focused on this effect, and as a result of repeated research, among the modulus of the die pound material, the flexural modulus was the main factor of chip warpage, and after hardening, that is, the flexural modulus of the die pound material at 25 It has been found that by setting the coefficient at 300 MPa or less, the warpage of the chip can be suppressed. The details of the composition for realizing a die bond material having a flexural modulus of 30 OMPa or less will be described later. However, the inventors have found that the inorganic filler is 20 to 85% by weight, the resin component, It was discovered that chip warpage can be minimized by including a stress reducing agent that accounts for more than 40% by weight of the total resin component. Next, cracks that occur at the die bond pad end due to thermal cycling, that is, thermal shock due to the repetition of low and high temperatures, are: (2) thermal stress at the die pond pad end, (3) bending rupture strength of the sealing material, It is thought to be affected by The inventors focused on these effects and conducted repeated research.As a result, cracks at the end of the die bond pad during temperature cycling showed that the thermal stress at the end of the die bond pad and the bending rupture strength of the sealing material were constant. We found out that setting them to satisfy the relationship can prevent them. The details of the composition of the die pond material and the sealing material that can satisfy this certain relationship will be described later. As the dip pond material, 20 to 85% by weight of an inorganic filler, a resin component, A resin containing a low-stressing agent occupying 70% by weight or less of the entire resin component is used. The sealing material, the flexural modulus at 2 5 ° C 2 6 GP a below average thermal expansion coefficient from the molding temperature of the semiconductor device up to 2 5 ° C 0. 7 X 1 0- 5 / ° C Over 2 5 Use a material that has a bending rupture strength at ° C of 12 OMPa or more. The inventors have found that cracks at the edge of the die bond pad during temperature cycling can be suppressed by combining these die bond materials and the sealing material.
はんだ実装時に発生するィンナ一リード ;部やダイボンドパッド部のはく離は、 ( 4 ) 封止材吸湿後の各部と封止材の接着性、 （5 ) ダイポンド材ゃ封止材の構 成材料とリードフレームの材料物性の相違により生じる熱応力、 に影響を受ける と考えられる。 本発明者らはこれらの影響に着目し、 研究を重ねた結果、 はんだ 実装時のインナーリード部やダイポンドパッド部のはく離は、 吸湿後のはんだ実 装時ピーク温度における各部と封止材の接着性 （せん断歪みエネルギー） と、 リ —ドフレームと構成材料の材料物性の相違により生じる熱応力が、 一定の関係を 満足することにより向上できることを突き止めた。 この一定の関係を満足するダ ィポンド材および封止材の組成の詳細については後述するが、 ダイボンド材とし て、 無機質充填剤を 2 0〜8 '5重量％と、 樹脂成分と、 樹脂成分全体の 4 0重量 %以上を占める低応力化剤とを含むものを用いる。 封止材としては、 無機質充填 剤を 8 2〜9 0重量％と、 特定の化学式で表わされるエポキシ樹脂を含むものを 用いる。 発明者等は、 これらを組み合わせることによって、 はんだ実装時の各部 のはく離が抑制されることを発見した。 In'na one generated during soldering lead; parts and delamination of the die bonding pad unit (4) each unit and adhesive sealing material after the sealing material moisture, and (5) configuring material Daipondo material Ya sealant It is considered to be affected by the thermal stress caused by the difference in the material properties of the lead frame. The present inventors have focused on these effects and conducted repeated studies.As a result, the peeling of the inner leads and die pond pads during solder mounting was caused by the peeling of each part and the sealing material at the peak temperature during solder mounting after moisture absorption. It has been found that the adhesiveness (shear strain energy) and the thermal stress caused by the difference in the physical properties of the lead frame and the constituent materials can be improved by satisfying a certain relationship. The details of the composition of the dip-bonding material and the sealing material satisfying this certain relationship will be described later. However, as the die bonding material, 20 to 5% by weight of an inorganic filler, the resin component, and the entire resin component are used. And a low-stressing agent occupying 40% by weight or more of the above. As the sealing material, a material containing an inorganic filler of 82 to 90% by weight and an epoxy resin represented by a specific chemical formula is used. The inventors have found that by combining these, the peeling of each part during solder mounting is suppressed.
これらのことから、 半導体装置が、 半導体装置の製造、 プリント配線基板への 実装、 使用の全過程を通して、 チップの反りや、 クラック、 はく離を防止して動 作の信頼性を維持するためには、  Based on these facts, it is important for semiconductor devices to prevent chip warpage, cracks and peeling, and maintain reliable operation throughout the entire process of manufacturing, mounting on printed wiring boards, and using semiconductor devices. ,
( 1 ) 2 5 °Cでのダイポンド材の曲げ弾性係数  (1) Flexural modulus of die pond at 25 ° C
( 2 ) 温度サイクル時のダイボンドパッド端部の熱応力  (2) Thermal stress at die bond pad edge during temperature cycle
( 3 ) 温度サイクル時の封止材の曲げ破断強度  (3) Bending rupture strength of sealing material during temperature cycle
( 4 ) はんだ実装時の封止材とリードフレーム （インナーリード部、 ダイポンド パッド部） とのせん断歪みエネルギー  (4) Shear strain energy between the sealing material and the lead frame (inner lead, die pond pad) during solder mounting
( 5 ) はんだ実装時の封止材とリードフレーム （インナーリード部、 ダイボンド パッド部） の界面に発生する熱応力  (5) Thermal stress generated at the interface between the sealing material and the lead frame (inner lead, die bond pad) during solder mounting
のすベてを考慮すればよい。 It is only necessary to consider all the factors.
以下、 これらの要因について、 詳述する。 く半導体チップの反りを低減するためのダイポンド材 > Hereinafter, these factors will be described in detail. Die pond material to reduce warpage of semiconductor chip>
まず、 半導 チップの反りはダイポンド材の弾性係数に大きく影響を受ける点 について詳述する。  First, the fact that the warpage of the semiconductor chip is greatly affected by the elastic modulus of the die pond material will be described in detail.
半導体装置に用いられるリードフレーム材 （ダイポンドパッド部およびインナ —リード部を含む） には、 一般に銅合金や、 鉄一ニッケル合金が広く用いられて いる。 使用される素材によってリードフレームの熱膨張係数が異なり、 たとえば 銅合金の熱膨張係数は 1 . 7 X 1 0— 5 、 鉄一ニッケル合金だと、 0 . 5 X 1 0一5 Z°Cである。 半導体チップの反りは、 リードフレームの熱膨張係数にも大き く影響を受け、 チップとリードフレーム （特にダイポンドパッド部） との熱膨張 係数差が大きいほど大きくなる。 In general, copper alloys and iron-nickel alloys are widely used for lead frame materials (including die pond pads and inner-lead portions) used in semiconductor devices. Different coefficient of thermal expansion of the lead frame of a material to be used, for example, the thermal expansion coefficient of the copper alloy 1. 7 X 1 0- 5, that's iron one nickel alloys, 0. In 5 X 1 0 one 5 Z ° C is there. The warpage of the semiconductor chip is also greatly affected by the thermal expansion coefficient of the lead frame, and becomes larger as the difference in the thermal expansion coefficient between the chip and the lead frame (particularly, the die pond pad portion) increases.
リードフレームに鉄—ニッケル合金を用いた場合、 半導体チップとの熱膨張係 数差が小さいために半導体チップ素子の反りは小さく問題とはならないが、 導電 性などの電気特性や動作特性、 放熱性を考えると、 銅合金のリ一ドフレームを用 いることへの要請が高まっている。 しかしながら、 銅合金のリードフレームを用 いた場合、 半導体チップとの熱膨張係数差が大きいために、 半導体チップの反り は大きくなる。  When an iron-nickel alloy is used for the lead frame, the warpage of the semiconductor chip element is small and does not pose a problem because the difference in thermal expansion coefficient from the semiconductor chip is small, but the electrical properties such as conductivity, the operating characteristics, and the heat dissipation Given this, there is an increasing demand for the use of copper alloy lead frames. However, when a copper alloy lead frame is used, the warpage of the semiconductor chip becomes large due to a large difference in thermal expansion coefficient from the semiconductor chip.
半導体装置において、 銅合金のリードフレームに、 シリコンを主体とする半導 体チップを搭載する場合、 チップとリードフレームとの物性はほぼ特定されるこ とになる。 そこで、 半導体チップとダイボンドパッドとを接着するダイポンド材 の特性を調整することによって、 チップの反りは抑制されるはずである。  In a semiconductor device, when a semiconductor chip mainly composed of silicon is mounted on a copper alloy lead frame, the physical properties of the chip and the lead frame are almost specified. Therefore, by adjusting the characteristics of the die pond material for bonding the semiconductor chip and the die bond pad, the warpage of the chip should be suppressed.
図 3に、 市販の反り変形解析ツールを用いてチップの反りとダイボンド材の物 性の関係について調べた結果を示す。 この結果から、 チップの反りはダイボンド 材の熱膨張係数にほとんど影響を受けず、 曲げ弾性係数に大きく影響を受けるこ とがわかる。 実際に 8 mmX 1 0 mmX 0 . 2 8 mmのチップ¾曲げ弹性係数の 異なるダイポンド材を用いて、 リードフレームのダイポンドパッド上に 1 5 0 °C 、 1時間の硬化条件で固定し、 2 5 °Cでのチップの反りを測定した。 測定値は解 析結果とよく一致することから、 チップの反りを考えるときに、 ダイポンド材の 曲げ弾性係数だけを考えればよいことになる。 なお、 ダイポンド材の曲げ弾性係 数は、 2 5 °C下、 J I S - K - 6 9 1 1に準じて測定した。 8 mmX 1 0 mmのチップを試験片とした場合、 チップの反りが 3 0 程度 までなら半導体チップの機能、 構造に影響を与えない。 チップの反りを 3 0 以下の範囲に抑えるには、 図 3のグラフより、 2 5 °Cでのダイポンド材の曲げ弾 性係数 Edtを 3 0 O M P a以下に設定すればよい。 Figure 3 shows the results of examining the relationship between chip warpage and the physical properties of the die bond material using a commercially available warpage deformation analysis tool. From this result, it can be seen that the warpage of the chip is hardly affected by the coefficient of thermal expansion of the die bond material and is greatly affected by the flexural modulus. Actually, 8 mm X 10 mm X 0.28 mm chip ¾ Using die pond materials with different bending stiffness coefficients, fix it on the die pond pad of the lead frame at 150 ° C for 1 hour curing condition. The warpage of the chip at 5 ° C was measured. Since the measured values agree well with the analysis results, it is only necessary to consider the flexural modulus of the die pond material when considering the warpage of the chip. The bending elastic modulus of the die pound material was measured at 25 ° C according to JIS-K-6911. If the test piece is an 8 mm X 10 mm chip, the function and structure of the semiconductor chip will not be affected if the warpage of the chip does not exceed about 30. From the graph of Fig. 3, the bending elastic modulus Edt of the die pond material at 25 ° C can be set to 30 OMPa or less in order to keep the chip warpage within the range of 30 or less.
2 5 °Cでの曲げ弹性係数 Edtが 3 0 O M P a以下であるダイボンド材は、 ベー ス卜状でもフィルム状でもよいが、 その組成として、 無機質充填剤を 2 0〜8 5 重量％と、 樹脂成分と、 樹脂成分全体の 4 0重量％以上の低応力化剤とを含むの が好ましい。  The die-bonding material having a flexural modulus Edt at 25 ° C of 30 OMPa or less may be in the form of a base or a film. The composition is as follows: the inorganic filler is 20 to 85% by weight; It is preferable to include a resin component and 40% by weight or more of a low-stressing agent based on the entire resin component.
無機質充填剤としては、 溶融シリカ、 結晶シリガ、 球状シリカ、 アルミナ、 炭 酸カルシウム、 ケィ酸ジルコニウム、 ケィ酸カルシウム、 タルク、 クレー、 マイ 力、 窒化ホウ素、 水酸化アルミニウム、 銀粉、 銅粉、 ニッケル粉等が挙げられる 。 ダイポンド材中の無機質充填剤の量が 2 0重量％未満、 8 5重量％を超えると 、 ダイポンド材をダイボンドパッド部に塗布する際、 あるいは貼り付ける際の作 業性が低下してくる。  Inorganic fillers include fused silica, crystalline silica, spherical silica, alumina, calcium carbonate, zirconium silicate, calcium silicate, talc, clay, mai force, boron nitride, aluminum hydroxide, silver powder, copper powder, nickel powder And the like. If the amount of the inorganic filler in the die pond material is less than 20% by weight or more than 85% by weight, the workability when applying or attaching the die pond material to the die bond pad portion is reduced.
樹脂成分としては、 クレゾールノポラック型エポキシ樹脂、 ビスフエノール F 型エポキシ樹脂、 ビスフエノール AD型エポキシ樹脂、 アクリル樹脂等が好適に 用いられる。 ダイポンド材中には、 これらの主剤以外に、 硬化剤、 硬化促進剤が 含有され、 必要に応じてカップリング剤、 反応性希釈剤等が併せて用いられる。 低応力化剤としては、 ブタジエン 'アクリロニトリル系共重合体やそれらの末 端または側鎖にアミノ基、 エポキシ基、 力ルポキシル基を有する変性共重合体、 ァクリロニトリル ·ブタジエン ·スチレン共重合体等のブタジエン系可撓化剤、 末端または側鎖にアミノ基、 水酸基、 エポキシ基、 カルボキシル基を有するシリ コーン系のエラストマ一等が挙げられる。 低応力化剤を配合することによって、 ダイポンド材の曲げ弾性係数を小さくでき、 半導体チップをダイポンドパッド部 に固定した際の半導体チップの反りを低減することができる。 低応力化剤の配合 量は樹脂成分全体の 4 0重量％以上に設定するのが好ましい。 4 0重量％未満で はダイボンド材の曲げ弾性係数を十分に小さくできず、 半導体チップの反りを低 減することができないからである。  As the resin component, cresol nopolak type epoxy resin, bisphenol F type epoxy resin, bisphenol AD type epoxy resin, acrylic resin and the like are preferably used. In addition to these main ingredients, the die pond contains a curing agent and a curing accelerator, and a coupling agent, a reactive diluent, and the like are used as needed. Examples of the low-stressing agent include butadiene-acrylonitrile copolymers, modified copolymers having an amino group, an epoxy group, or a hydroxyl group at the terminal or side chain thereof, butadiene such as acrylonitrile-butadiene-styrene copolymer, etc. And a silicone-based elastomer having an amino group, a hydroxyl group, an epoxy group, or a carboxyl group at a terminal or a side chain. By adding a stress reducing agent, the bending elastic modulus of the die pond material can be reduced, and the warpage of the semiconductor chip when the semiconductor chip is fixed to the die pond pad portion can be reduced. The amount of the low-stressing agent is preferably set to 40% by weight or more of the entire resin component. If the amount is less than 40% by weight, the flexural modulus of the die bond material cannot be sufficiently reduced, and the warpage of the semiconductor chip cannot be reduced.
本実施形態に用いられるダイポンド材には、 低応力化剤に加えて、 イオントラ ップ剤を配合してもよい。 このような組成のダイポンド材を用いることにより、 ダイボンド材硬化後の半導体チップの反りを抑制することができる。 The die pond material used in the present embodiment includes, in addition to the low stress agent, A dropping agent may be blended. By using the die pond material having such a composition, the warpage of the semiconductor chip after the die bond material is cured can be suppressed.
本発明は、 特に銅合金のリードフレームを用いる樹脂封止型半導体装置に好適 に適用される。 実施形態においては、 特に、 銅合金のリードフレームの表面に、 銀、 金、 パラジウムのいずれかでめっきしたものを用いると好ましい。  The present invention is particularly suitably applied to a resin-sealed semiconductor device using a copper alloy lead frame. In the embodiment, it is particularly preferable to use a copper alloy lead frame whose surface is plated with any of silver, gold, and palladium.
<温度サイクル時のクラックを防止するためのダイボンド材と封止材> <Die bond material and sealing material to prevent cracks during temperature cycling>
温度サイクルにより発生するクラックは、 上述したように、 ダイポンドパッド 端部の熱応力 （thermal stress) びと、 封止材の曲げ破断強度 （ilexural streng th) abとに影響を受ける。 Cracks generated by thermal cycling, as described above, thermal stress of the die bond pad end (thermal stress) Vito, flexural breaking strength of the sealing material (ilexural streng th) affected and a b.
ダイポンドパッド端部の熱応力 σは、 封止材の 25°Cでの弹性係数 （elastic m odulus) を Ee, 、 封止材の 25 °Cでの熱膨張係数 （coefficient of thermal exp ansion) を ae^ リードフレームの熱膨張係数を amとすると、 次式で表される。 なお、 下付きの数字 1は、 低温側 （25°C以下） でのパラメ一夕であることを示 す。  The thermal stress σ at the end of the die pond pad is expressed as Ee, the elastic modulus at 25 ° C of the encapsulant, and the coefficient of thermal expansion at 25 ° C of the encapsulant. Where ae ^ is the thermal expansion coefficient of the lead frame, and is expressed by the following equation. The number 1 in the subscript indicates that the parameter is set on the low temperature side (25 ° C or less).
a = kx ae 式 （7) ae = (1/ 1 o g (kd,) ) X Ee【 X ad X ΔΊ^ 式 （8) ad = ai— αθ[ 式 ( 9) k：パッケージ構造やリ一ドフレーム構造によって決まる係数、  a = kx ae Equation (7) ae = (1/1 og (kd,)) X Ee [X ad X ΔΊ ^ Equation (8) ad = ai—αθ [Equation (9) k: Package structure or lead Coefficients determined by the frame structure,
ae ：構成材料の物性によって表される熱応力の指標となる特性、 ae: Characteristic of thermal stress represented by physical properties of constituent materials,
kd,：弾性係数 IMP aに対する 25°Cでのダイポンド材 （硬化後） の曲げ弾性 係数 Ed, (Ed,>lMP a) の比 kd ,: Ratio of flexural modulus Ed, (Ed,> lMPa) of die pound material (after hardening) at 25 ° C to modulus IMP a
ad ： リードフレームと封止材の熱膨張係数の差 （am — ae,) ad: Difference between the thermal expansion coefficient of the lead frame and the sealing material (am — ae,)
Δ Tt：半導体装置の成形温度と温度サイクル時低温側との差 ΔT t : Difference between the molding temperature of the semiconductor device and the low temperature side during the temperature cycle
である。 It is.
式 （7) からダイポンドパッド端部に発生する熱応力 σは、 特性 に比例す ることがわかる。  Equation (7) shows that the thermal stress σ generated at the end of the die pond pad is proportional to the characteristic.
—方、 封止材の曲げ破断強度 (MP a) は、 J I S— K— 691 1に準じ て曲げ試験を行うことによって次式から得られる。 試験片は封止材をトランスフ ァ一プレスにより所定の大きさに硬化成形し、 175° (：、 5時間のアフターキュ ァを行なうことによって得られる。 The bending rupture strength (MPa) of the sealing material conforms to JIS K 691 1. The following equation is obtained by performing a bending test. The test piece is obtained by hardening and molding the sealing material to a predetermined size by a transfer press, and performing after-curing at 175 ° (:, 5 hours).
a = (3XLXP) / (2XWXH2) 式 （10) ここで、 Lはスパン （mm) 、 Pは荷重 （N) 、 Wは試験片幅 （mm) 、 Hは試 験片厚さ （mm) 、 測定温度は室温の 25 °Cである。 a = (3XLXP) / (2XWXH 2 ) Equation (10) where L is span (mm), P is load (N), W is specimen width (mm), and H is specimen thickness (mm). The measurement temperature is 25 ° C at room temperature.
温度サイクル時に生じるダイポンドパッド端部のクラックを抑えるためには、 封止材の曲げ破断強度 を大きくし、 ダイポンドパッドに生じる熱応力、 すな わち特性値び e を小さくすることが必要となる。 しかし、 曲げ破断強度び b が高 くても、 特性値 も大きければ、 ダイポンドパッド端部にクラックが生じる。 逆に、 曲げ破断強度 CTb が多少低くても、 特性値 も小さければ、 ダイポンド パッド端部にクラックは生じない。 したがって、 封止材の曲げ破断強度 と特 性値 をバランス良く設定することが重要となる。  In order to suppress cracks at the edge of the die pond pad that occur during temperature cycling, it is necessary to increase the bending rupture strength of the encapsulant and reduce the thermal stress that occurs in the die pond pad, that is, the characteristic value e. Becomes However, even if the flexural rupture strength and b are high, if the characteristic value is large, cracks occur at the end of the die pond pad. Conversely, even if the bending rupture strength CTb is somewhat low, if the characteristic value is small, cracks do not occur at the die pond pad end. Therefore, it is important to set the bending rupture strength and characteristic value of the sealing material in a well-balanced manner.
発明者等は、 封止材の曲げ破断強度 と特性値 の関係について研究を重 ね、 後述する実験例を分析した結果、 曲げ破断強度 σ!) と特性 の比 （σεΖσ b) を 0. 2以下に設定することによって、 温度サイクル時に生じるダイポンドパ ッド端部のクラックを抑えられることを発見した。  The inventors have conducted research on the relationship between the bending rupture strength and the characteristic value of the sealing material, and analyzed the experimental examples described later. As a result, the ratio of the bending rupture strength (σ!) To the property (σεΖσb) was 0.2. By setting the following, we found that cracks at the end of the die pond pad that occur during temperature cycling can be suppressed.
封止材の曲げ破断強度び b と特性 ere の比 （び eZび b ) を 0.. 2以下に設定す るためには、 式 （8) から、 ダイポンド材の曲げ弾性係数 £： を大きく、 封止材 の曲げ弾性係数 Eetを小さく、 封止材の熱膨張係数 Q!eiを大きくし、 かつ、 封止材 の曲げ破断強度 σ!) を大きくする必要がある。 具体的には、 後述する実験分析に 基づいて決定されるように、 ダイボンド材の曲げ弾性係数 を IMPa以上、 封 止材の曲げ弾性係数 Eetを 26GPa以下、 封止材の熱膨張係数ひ を 0. 7X 1 0— 5/°C以上、 封止材の曲げ破断強度 σΐ) を、 12 OMPa以上とするのが望まし い。 In order to set the ratio of the bending rupture strength b of the encapsulant to the characteristic ere (ie, eZ and b) to 0.2 or less, the bending elastic modulus of the die pound material must be increased from Equation (8). small bending elastic modulus Ee t of the sealing member, to increase the thermal expansion coefficient of Q! ei sealant, and it is necessary to increase the flexural breaking strength sigma!) of the sealing material. Specifically, as determined on the basis of experimental analysis to be described later, more than IMPa bending elastic modulus of the die-bonding material, hereinafter 26GPa flexural modulus Ee t sealant, thermal expansion coefficient Monument sealant 0. 7X 1 0- 5 / ° C or more, the flexural breaking strength Si) of the sealing material, have to desirable to the 12 ompA or more.
封止材の曲げ破断強度が 120 M P a未満、 熱膨張係数が 0. 7 X 10 _ 5 Z°C未 満、 封止材の曲げ弾性係数が 26 GPaを超えると、 曲げ破断強度 と特性 の比 （ひ e /crb ) が 0. 2を超えて大きくなる場合があるので、 クラックを十 分に防止することができなくなる。 リードフレーム表層のめっきは、 リードフレームの種類によって異なるが、 ダ ィボンドパッド端部のクラックは、 封止材の曲げ破断強度 ff b と特性 の比 （ o e / o b ) で説明できることから、 リードフレーム表層のめっきは特に制限さ れるわけではない。 したがって、 一般的に銀、 金、 パラジウムなどのめっきを用 いればよい。 通常、 リードフレームのインナ一リ一ド部は長さ l mmから 2 0 m m、 幅 0 . 1 111111から1 1 1111、 厚さ 1から 0 . 5 mmの範囲、 ダイポンドパ ッド部は外形 2 mmX 2 mmから 2 0 X 2 0 mm、 厚さ 0 . 1 mmから 0 . 5 m mの範囲のものが好適に用いられ、 例えば、 ワイヤ一ボンディング性を向上させ るためインナ一リード部にのみめつきをする場合がある。 Flexural breaking strength is less than 120 MP a sealant, thermal expansion coefficient of 0. 7 X 10 _ 5 Z ° C less than, the flexural modulus of the sealant is greater than 26 GPa, the flexural breaking strength and properties Since the ratio (hi / crb) may exceed 0.2, cracks cannot be sufficiently prevented. The plating on the surface of the lead frame varies depending on the type of lead frame, but the cracks at the end of the die bond pad can be explained by the ratio of the rupture strength ff b of the sealing material to the characteristic (oe / ob). Plating is not particularly limited. Therefore, generally, plating of silver, gold, palladium or the like may be used. Normally, the inner lead part of the lead frame has a length of l mm to 20 mm, a width of 0.1 111 111 to 1 11111, a thickness of 1 to 0.5 mm, and a die pound pad part of 2 mm X Those having a thickness of 2 mm to 20 X 20 mm and a thickness of 0.1 mm to 0.5 mm are preferably used.For example, only the inner lead is adhered to improve the wire-to-bonding property. May be.
なお、 封止材およびダイポンド材の曲げ弾性係数 Eei、 Ed,は、 封止材とダイボ ンド材の硬化物を作製し、 2 5 °C下、 J I S - K- 6 9 1 1に準じて試験するこ とにより得られる。 封止材の熱膨張係数 a e,は、 封止材硬化物を作製し、 熱機械 分析装置を用いて測定を行ない、 半導体装置の成形温度から 2 5 °Cまでの傾きか ら求められる。 The bending elastic moduli E ei and Ed of the sealing material and the die pond material were determined by preparing a cured product of the sealing material and the die bond material at 25 ° C and according to JIS-K-6911. Obtained by testing. The thermal expansion coefficient ae of the encapsulant is determined from the slope from the molding temperature of the semiconductor device to 25 ° C by preparing a cured encapsulant and measuring it using a thermomechanical analyzer.
上述した関係 _ σ Ι)≤0 . 2を満たすような封止材およびダイボンド材を用 いる樹脂封止型半導体装置は、 温度サイクル時におけるような過酷な熱衝撃を受 けた場合においても、 ダイポンドパッド端部のクラックを抑えることができる。 上記の関係を満たすダイポンド材は、 ペースト状であってもフィルム状であつ てもよいが、 その組成は、 無機質充填剤を 2 0〜8 5重量％、 樹脂成分、 樹脂成 分全体の 7 0重量％以下の低応力化剤を含み、 硬化剤、 硬化促進剤、 必要に応じ てカップリング剤、 反応性希釈剤、 溶剤等が併せて用いられる。 また、 イオント ラップ剤を配合してもよい。 このうち、 無機質充填剤と低応力化剤の種類につい ては、 半導体チップの反りと関連して上述したダイポンド材で使用される無機質 充填剤および低応力化剤と同様のものを用いる。 樹脂成分は、 通常の樹脂でよい が、 中でもクレゾ一ルノポラック型エポキシ樹脂、 ビスフエノール F型エポキシ 樹脂、 ビスフエノール AD型エポキシ樹脂、 アクリル樹脂が好適に用いられる。 無機質充填剤の配合量がダイボンド材全体の 2 0重量％未満、 8 5重量％を超 えると、 ダイボンド材をダイボンドパッド部に塗布または貼り付ける際の作業性 が低下する。 一方、 ダイポンドパッド部の熱応力はダイポンド材の曲げ弾性係数 に影響を受け、 ダイボンド材の曲げ弹性係数が小さくなるに従って、 ダイボンド パッド端部の熱応力は増大し、 o e Z ff b≤0 . 2の関係を満たすことができなく なる。 このことから、 低応力化剤の配合量は溶剤と無機質充填剤を除いた樹脂成 分全体の 7 0重量％以下に設定するのが好ましい。 7 0重量％を超えると、 ダイ ボンド材の曲げ弾性係数が著しく小さくなり、 チップの反り防止には有効である が、 温度サイクル時のダイポンドパッド端部の熱応力を低減することができない からである。 A resin-encapsulated semiconductor device using a sealing material and a die-bonding material that satisfies the above relationship _ σ Ι) ≤ 0.2 can be used even when subjected to severe thermal shock such as during a temperature cycle. Cracks at the end of the pound pad can be suppressed. The die pond material that satisfies the above relationship may be in the form of a paste or a film. The composition is such that the inorganic filler is 20 to 85% by weight, the resin component, and 70% of the total resin component. It contains a low-stressing agent of not more than weight%, and a curing agent, a curing accelerator, a coupling agent, a reactive diluent, a solvent and the like are used in combination as required. Moreover, you may mix | blend an ion trap agent. Among these, the types of the inorganic filler and the stress reducing agent are the same as the inorganic filler and the stress reducing agent used in the die pond described above in relation to the warpage of the semiconductor chip. The resin component may be an ordinary resin, and among them, cresol nopolak epoxy resin, bisphenol F epoxy resin, bisphenol AD epoxy resin, and acrylic resin are preferably used. If the amount of the inorganic filler is less than 20% by weight or more than 85% by weight of the entire die bonding material, workability in applying or attaching the die bonding material to the die bonding pad portion is reduced. On the other hand, the thermal stress of the die pond pad is the flexural modulus of the die pond material. As the bending modulus of the die bond material becomes smaller, the thermal stress at the die bond pad edge increases, and the relationship of oe Z ff b≤0.2 cannot be satisfied. For this reason, the amount of the low stress agent is preferably set to 70% by weight or less of the entire resin component excluding the solvent and the inorganic filler. If it exceeds 70% by weight, the flexural modulus of the die bond material becomes extremely small, which is effective in preventing chip warpage. However, thermal stress at the end of the die pond pad during temperature cycling cannot be reduced. It is.
図 4は、 チップの反りを低減し、 耐温度サイクル性を向上させるために必要と される材料物性 （ダイポンド材、 封止材） の方向性を示す表である。 半導体チッ プの反りに関しては、 樹脂封止をする前の段階なので、 封止材のパラメ一夕は無 関係である。 チップ反りと、 耐温度サイクル性の双方に影響を与えるのが、 ダイ ポンド材の特性である。 チップの反りを小さく抑えるには、 ダイポンド材の曲げ 弾性係数は低いほうが望ましいが、 温度サイクル時には、 上述したように、 高い ほうが望ましい。 このため、 ダイポンドパッドへの半導体チップ搭載後と、 封止 材で封止した後の温度サイクル時の双方において、 製品の信頼性を維持するには 、 ダイボンド材の曲げ弾性係数の範囲を最適に設定する必要がある。  Figure 4 is a table showing the directionality of material properties (die pond material, encapsulant) required to reduce chip warpage and improve temperature cycle resistance. Since the semiconductor chip warpage is a stage before resin encapsulation, the parameters of the encapsulant are irrelevant. It is the properties of die pound material that affect both chip warpage and temperature cycling resistance. In order to minimize the warpage of the chip, it is desirable that the bending elastic modulus of the die pond material is low, but it is desirable that the temperature be high during a temperature cycle, as described above. Therefore, in order to maintain product reliability both after mounting the semiconductor chip on the die pond pad and during the temperature cycle after sealing with the sealing material, the range of the bending elastic modulus of the die bonding material is optimal. Must be set to
すなわち、 ダイポンド材の曲げ弾性係数は、 I M P a以上、 3 0 O M P a以下 であるのが好ましく、 このような曲げ弾性係数を実現するダイボンド材は、 樹脂 成分全体の 4 0 %以上、 7 0 %以下の範囲の低応力化剤を含むと好ましい。  That is, the bending elastic modulus of the die pound material is preferably IMPa or more and 30 OMPa or less, and the die bonding material that achieves such a bending elastic modulus is 40% or more and 70% of the entire resin component. It is preferable to include the following range of the low stress agent.
一方、 本発明に用いる封止材は、 通常、 粉末状もしくは夕ブレット状になって おり、 曲げ弾性係数が 2 6 G P a以下、 熱膨張係数が 0 . 7 X 1 0 5 /°C以上、 曲 げ破断強度び b が 1 2 O M P a以上であれば、 その主剤は、 特に制限するものでな い。 好適に用いられる例として、 ビフエニル型エポキシ樹脂やクレゾールノボラ ック型エポキシ樹脂が挙げられる。 封止材には、 主剤以外に、 硬化剤、 硬化促進 剤、 無機質充填剤が含有され、 必要に応じて難燃剤、 カップリング剤、 ワックス 等が併せて用いられる。 本発明に用いられる封止材には、 上記以外にシリコーン オイル及びシリコーンゴム、 合成ゴム等のゴム成分を配合したりイオントラップ 剤を配合してもよい。 このような封止材を用いての半導体チップを封止する方法 については、 特に制限するものではなく、 通常のトランスファー成形等に見られ るような公知のモ一ルド方法により行なうことができる。 On the other hand, the sealing material used in the present invention is usually in the form of a powder or an evening bullet, has a flexural modulus of 26 GPa or less, a thermal expansion coefficient of 0.7 X 10 5 / ° C or more, If the flexural strength b is 12 OMPa or more, the main ingredient is not particularly limited. Preferred examples include biphenyl epoxy resins and cresol novolac epoxy resins. The sealing material contains a hardening agent, a hardening accelerator, and an inorganic filler in addition to the main agent, and a flame retardant, a coupling agent, a wax, and the like are used as needed. In addition to the above, a rubber component such as silicone oil, silicone rubber, or synthetic rubber may be added to the sealing material used in the present invention, or an ion trapping agent may be added. The method for sealing a semiconductor chip using such a sealing material is not particularly limited, and is used in ordinary transfer molding and the like. It can be performed by a known molding method as described below.
こうして得られる樹脂封止型半導体装置は、 半導体チップの反り、 耐温度サイ クル性ともに優れ、 過酷な熱衝撃を受けた場合においてもダイポンドパッド端部 からクラックが生じるのを防止することができる。  The resin-encapsulated semiconductor device obtained in this way is excellent in both the warpage of the semiconductor chip and the thermal cycle resistance, and can prevent cracks from being generated from the end of the die pond pad even under severe thermal shock. .
<はんだ実装時のはく離を防止するための封止材とダイボンド材> <Sealing material and die bonding material to prevent peeling during solder mounting>
はんだ実装時には、 インナーリード部と封止材の界面のはく離、 ダイポンドパ ッド部 （裏面） と封止材の界面とのはく離が問題になる。 はく離は、 封止材吸湿 後のインナ一リード部やダイポンドパッド部と封止材との間の接着性 （せん断歪 みエネルギー） 、 およびこれらの部材と封止材との界面に発生する熱応力に影響 される。 そして、 上述したように、 はんだ実装時ピーク温度での各部位と封止材 のせん断歪みエネルギーと、 熱応力とが一定の関係を満足することによって、 は く離を解消することができる。  At the time of solder mounting, peeling of the interface between the inner lead and the sealing material and peeling of the interface between the die pond pad (back surface) and the sealing material become problems. Peeling is due to the adhesiveness (shear strain energy) between the inner lead and die pond pad and the sealing material after the sealing material has absorbed moisture, and the heat generated at the interface between these members and the sealing material. Affected by stress. Then, as described above, peeling can be eliminated by satisfying a certain relationship between the shear stress energy of each part and the sealing material at the peak temperature at the time of solder mounting and the thermal stress.
はんだ実装時におけるィンナ一リード部と封止材の界面に発生する熱応力 σ i は、 封止材の弾性係数を Ee2、 熱膨張係数を o;e2、 リ一ドフレームの熱膨張係数を am とすると次式で表される。 下付きの数字 2は、 高温側でのパラメ一夕である ことを示す。 The thermal stress σ i generated at the interface between the lead and the encapsulant during solder mounting is as follows: the elastic modulus of the encapsulant is Ee 2 , the thermal expansion coefficient is o; e 2 , the thermal expansion coefficient of the lead frame Is represented by the following equation. The subscript number 2 indicates that the parameter is settled on the hot side.
σ i = k X aei 式 、丄 1ノ ひ ei = Ee2 X ad X ΔΤ2 式 （1 2) ad = ae2 ― am 式 (1 3) ダイポンドパッド部と封止材の界面に発生する熱応力 ad は、 次式で表される。 ad =k X aed 式 （14) aed = l o g (kd2) X Ee2 X ad X AT2 式 （1 5) ここで、 σ i = k X aei equation, 丄 1 no ei = Ee 2 X ad X ΔΤ 2 equation (1 2) ad = ae 2 ― am equation (1 3) Generated at the interface between the die pad pad and the sealing material The thermal stress ad is expressed by the following equation. ad = k X aed formula (14) aed = log (kd 2 ) X Ee 2 X ad X AT 2 formula (15)
k：パッケージ構造やリードフレーム構造によって決まる係数  k: Coefficient determined by package structure and lead frame structure
aei、 aed：構成材料の物性によって表される熱応力の指標となる特性 kd2 ：弹性係数 IMP aに対するはんだ実装時ピーク温度でのダイポンド材の 曲げ弾性係数 Ed2 の比 （Ed2>lMP a)aei, AED: construction characteristics indicative of the thermal stress expressed by the physical properties of the material kd 2: The ratio of flexural modulus of elasticity Ed 2 Daipondo material in soldering peak temperature for弹性coefficient IMP a (Ed 2> lMP a )
ά： 高温側での封止材とリードフレームとの熱膨張係数差、. ΔΤ2：半導体装置の成形温度とはんだ実装時ピーク温度の差 である。 ά: Difference in thermal expansion coefficient between sealing material and lead frame at high temperature side. .DELTA..tau 2: is the difference between the forming temperature and soldering peak temperature of the semiconductor device.
インナ一リード部に発生する熱応力は、 特性 aei に比例し、 ダイポンドパッド 部に発生する熱応力は、 特性 aed に比例する。  The thermal stress generated in the inner lead is proportional to the characteristic aei, and the thermal stress generated in the die pond pad is proportional to the characteristic aed.
一方、 はんだ実装時ピーク温度におけるリードフレームのインナーリード部や ダイポンドパッド部と、 封止材とのせん断歪みエネルギー U (N -m) は、 封止 材のせん断時に印加されている力 （すなわち荷重） と、 それによる変位とから求 められる。 具体的には、 図 5 Aに示す試験片を作製し、 所定の条件で吸湿を行な つた後、 図 5 Bに示すように、 はんだ実装時ピーク温度に設定したせん断接着力 試験機の熱板 22の上に 20秒間放置し、 その後、 テストヘッド 21を毎秒 50 mで移動させながら、 封止材 13に荷重を加え、 荷重 F (N) と、 封止材 13 の変位 X (m) を測定して、 次式から求められる。  On the other hand, the shear strain energy U (N-m) between the inner lead portion and the die pond pad portion of the lead frame and the sealing material at the peak temperature at the time of solder mounting is determined by the force applied when the sealing material is sheared (that is, Load) and the resulting displacement. Specifically, after preparing the test piece shown in Fig. 5A and performing moisture absorption under the specified conditions, as shown in Fig. 5B, the heat of the shear adhesion tester set to the peak temperature at the time of solder mounting was used. Leave on the plate 22 for 20 seconds, then apply a load to the sealing material 13 while moving the test head 21 at 50 m / s, and load F (N) and displacement X (m) of the sealing material 13 Is calculated from the following equation.
U= S F · dx 式 （16) 換言すれば、 せん断歪みエネルギー Uは、 図 5 Cの斜線領域で示すように、 荷 重 Fを変位 Xで積分した値である。  U = S F · dx Equation (16) In other words, the shear strain energy U is the value obtained by integrating the load F with the displacement X as shown by the hatched area in FIG. 5C.
図 5 Aに示す試験片は、 インナーリ一ド部やダイポンドパッドと、 材質、 めつ き仕様が同じであるリードフレーム 20上に、 封止材 13をトランスファ一プレ スにより高さ lmm、 3. 7 mm径の大きさに硬化成形し、 175°C、 5時間の アフターキュアを行なうことによって得られる。  The test piece shown in Fig. 5A is a lead frame 20 with the same material and the same specifications as the inner lead part and die pond pad. It is obtained by curing and molding to a diameter of 7 mm and after-curing at 175 ° C for 5 hours.
また、 半導体装置の吸湿時間を t 1 ( ) 、 試験片の吸湿時間を t 2 (h) 、 半導体装置表面からィンナ一リード部やダイボンドパッド部までの封止材の厚さ を hi (mm) 、 試験片の封止材の厚さを h 2 (mm) とすると、 F i c kの拡 散方程式を用いて、 これらのパラメ一夕の間に以下の関係式が得られる。  Further, the moisture absorption time of the semiconductor device is t 1 (), the moisture absorption time of the test piece is t 2 (h), and the thickness of the sealing material from the semiconductor device surface to the inner lead portion and the die bond pad portion is hi (mm). Assuming that the thickness of the sealing material of the test piece is h 2 (mm), the following relational expression is obtained between these parameters using Fick's diffusion equation.
t 1/t 2 = 0. 92X (h l/h2) 2 + 0. 24 式 （17) この関係式から、 試験片の吸湿時間 t 2が決定される。 たとえば、 実際の半導 体装置の吸湿時間 t 1が 168時間、 半導体装置表面からインナーリード部まで の封止材の厚さ h 1が図 6に示すように 0. 625 mm、 試験片の封止材の厚さ h 2が図 5 Aに示すように 1. 0mmのとき、 式 （17) から試験片の吸湿時間 t 2は約 280時間と決定される。 はんだ実装時に生じるィンナーリード部及びダイボンドパッド部のはく離を抑 えるためには、 インナーリード部に対する封止材のせん断歪みエネルギー Ui、 お よびダイポンドパッド部に対する封止材のせん断歪みエネルギー Ud を高く設定 し、 特性 aei、 ffedを低くすることが必要となる。 しかし、 せん断歪みエネルギ 一 Ui 、 Udが高くても、 特性び ei、 aed も高ければ、 インナーリード部やダイ ポンドパッド部は、 はく離する場合がある。 一方、 せん断歪みエネルギー Ui 、 Ud が低くても、 特性 aei、 oedが低ければ、 インナーリード部やダイポンドパ ッド部は、 はく離しない場合がある。 したがって、 インナ一リード部やダイボン ドパッド部でのせん断歪みエネルギー Ui 、 Udと、 対応する特性値 aei、 ひ edを バランス良く設定することが重要となる。 t 1 / t 2 = 0.92X (hl / h2) 2 + 0.24 Equation (17) From this relational equation, the moisture absorption time t 2 of the test piece is determined. For example, the actual semiconductor device has a moisture absorption time t1 of 168 hours, the thickness h1 of the encapsulant from the semiconductor device surface to the inner lead portion is 0.625 mm as shown in Fig. 6, and the test sample is sealed. When the thickness h2 of the stopper is 1.0 mm as shown in Fig. 5A, the moisture absorption time t2 of the test piece is determined to be about 280 hours from equation (17). In order to suppress the peeling of the inner lead and die bond pad that occurs during solder mounting, the shear strain energy Ui of the sealing material for the inner lead and the sealing strain Ud of the sealing material for the die pond pad are set high. It is necessary to lower the characteristics aei and ffed. However, even if the shear strain energies Ui and Ud are high, if the characteristics ei and aed are high, the inner lead portion and die pad portion may peel off. On the other hand, even if the shear strain energies Ui and Ud are low, if the characteristics aei and oed are low, the inner lead portion and die pond pad portion may not peel off. Therefore, it is important to set the shear strain energies Ui and Ud at the inner lead portion and die bond pad portion and the corresponding characteristic values aei and ed in a well-balanced manner.
発明者等は、 せん断歪みエネルギー Ui (N - m) 、 Ud (N · m) と、 特性 σ ei (MP a) 、 aed (MP a) の関係について研究を重ね、 後述する実験分析を 行った結果、  The inventors repeated research on the relationship between the shear strain energies Ui (N-m) and Ud (Nm) and the characteristics σ ei (MPa) and aed (MPa), and performed the experimental analysis described below. As a result,
•せん断歪みエネルギー Uiと特性 σεϊの比 （UiZaei) ≥2. 0X 10一6 'せん断歪みエネルギー Udと特性 aedの比 （UdZaed) ≥4. 69 X 10"6 に設定することによって、 はんだ実装時に生じるィンナ一リ一ド部ゃダイポンド パッド部のはく離を抑えられることが分かつた。 • By setting the ratio of shear strain energy Ui and characteristics σεϊ (UiZaei) ≥2. 0X 10 one 6 'ratio of shear strain energy Ud and characteristics aed (UdZaed) ≥4. To 69 X 10 "6, during soldering It has been found that the peeling of the inner lead portion and the die pond pad portion can be suppressed.
ィンナーリード部に対する封止材のせん断歪みエネルギー Ui と特性 aeiの比 (υΐ/σθΐ) を 2. 0X 10-6以上、 ダイポンドパッド部に対する封止材のせん 断歪みエネルギー Ud と特性 aedの比 （UdZaed) を 4. 69X 10— 6以上にす るためには、 後述する実験分析の結果から、 以下の条件が導かれる。 The ratio (υΐ / σθΐ) of the shear strain energy Ui of the sealing material to the inner lead portion and the characteristic aei (υΐ / σθΐ) is 2.0X10-6 or more, and the ratio of the shear strain energy Ud of the sealing material to the die pond pad and the characteristic aed ( to be order the UdZaed) to 4. 69X 10- 6 or more, from the results of experiments analyzes described below, the following condition is derived.
はんだ実装時ピーク温度でのダイポンド材の曲げ弾性係数 （Ed2) ≤70MPa はんだ実装時ピーク温度での封止材の曲げ弹性係数 （Ee2) ≤65 OMPa はんだ実装時ピーク温度での封止材の熱膨張係数 （ae2) ≤5.0 X 10"5/oC · 封止材のせん断歪みエネルギー （Ui) ≥1. 35X 10'6N - m Flexural modulus of die pond material at peak temperature during soldering (Ed 2 ) ≤70MPa Flexibility of sealing material at peak temperature at solder mounting (Ee 2 ) ≤65 OMPa Sealing material at peak temperature at solder mounting Coefficient of thermal expansion (ae 2 ) ≤5.0 X 10 " 5 / o C · Shear strain energy (Ui) of sealing material ≥1.35X 10 ' 6 N-m
封止材のせん断歪みエネルギー （Ud) ≥6. 8 X 10'6N · m Shear strain energy (Ud) of sealing material ≥6.8 X 10 ' 6 N · m
このような条件を満たすダイポンド材および封止材を使用して製造される樹脂 封止型半導体装置は、 プリント配線基板へのはんだ実装におけるような高温下で あっても、 リードフレームのインナ一リード部と封止材の界面や、 ダイポンドパ ッド部と封止材の界面でのはく離を効果的に防止することができ、 製品の信頼性 が向上する。 A resin-encapsulated semiconductor device manufactured using a die-pound material and an encapsulant satisfying such conditions can be used for the inner lead of a lead frame even at high temperatures such as when soldering to a printed wiring board. Interface and sealing material, Peeling at the interface between the pad and the sealing material can be effectively prevented, and the reliability of the product is improved.
はんだ実装時ピーク温度でのダイポンド材の曲げ弾性係数が 7 OMPaを超え、 封止材の曲げ弾性係数が 65 OMPaを超え、 封止材の熱膨張係数が 5. 0 X 1 0— 5/°Cを超え、 かつダイポンドパッド部に対する封止材のせん断歪みエネルギ 一が 6. 8X 10 6Ν ·πι未満になると、 ダイボンドパッド部でのせん断歪みェ ネルギー Ud と特性び edの比 （Ud/ひ ed) が 4. 69 X 10 6より小さくなり、 ダイポンドパッド部のはく離を十分に抑えることができない。 Flexural modulus of Daipondo material in soldering peak temperature exceeds the 7 ompA, flexural modulus of the sealant is greater than 65 ompA, thermal expansion coefficient of the encapsulant 5. 0 X 1 0- 5 / ° When C exceeds and the shear strain energy of the sealing material with respect to the die pond pad becomes less than 6.8 × 10 6 Ν · πι, the ratio of the shear strain energy Ud to the die bond pad and the characteristic and ed (Ud / Ed) is smaller than 4.69 X 10 6 , and the peeling of the die pond pad cannot be sufficiently suppressed.
同様に、 封止材の曲げ弾性係数が 65 OMPaを超え、 封止材の熱膨張係数が 5 . 0X 10— 5Z°Cを超え、 かつインナーリード部に対する封止材のせん断歪みェ ネルギ一が 1. 35 X 10_6N · m未満になると、 インナ一リード部のせん断歪 みエネルギー Ui と特性 aeiの比 （UiZaei) が 2. 0 X 10— 6より小さくなつ て、 ィンナ一リ一ド部のはく離を十分に抑えることができない。 Similarly, flexural modulus of the sealant is greater than 65 ompA, the thermal expansion coefficient of the sealing material 5. Exceeded 0X 10- 5 Z ° C, and shear strain E Nerugi one sealing material for the inner lead portions There 1. less than 35 X 10_ 6 N · m, the ratio of shear strain observed energy Ui and characteristics aei inner first lead portion (UiZaei) is 2. summer less than 0 X 10- 6, In'na one Li one de The peeling of the part cannot be sufficiently suppressed.
ィンナーリード部やダイボンドパッド部に対する封止材のせん断歪みエネルギ 一は、 リードフレーム表層のめっきによって変化するが、 めっきが異なる場合で も、 インナーリード部やダイポンドパッド部のはく離は、 せん断歪みエネルギー Ui 、 Ud と特性 σεί、 aedの比で説明できることから、 リードフレーム表層の めっきは特に制限するものでなく、 一般的に銀、 金、 パラジウムのいずれかを含 むめつきが用いられる。  The shear strain energy of the sealing material for the inner lead and die bond pad varies depending on the plating on the surface of the lead frame. However, even if the plating is different, the peeling of the inner lead and the die pound pad is the shear strain energy Ui. Since it can be explained by the ratio of Ud, characteristic σεί, and aed, the plating on the surface of the lead frame is not particularly limited, and plating containing any of silver, gold, and palladium is generally used.
なお、 ダイポンド材と封止材の曲げ弾性係数は、 ダイポンド材及び封止材硬化 物を作製し、 実装時ピーク温度 （例えば 245°C) 雰囲気下、 J I S-K-69 11に準じて試験を行なうことによって得られる。 熱膨張係数は、 封止材硬化物 を作製し、 熱機械分析装置を用いて測定を行ない、 樹脂封止型半導体装置の成形 温度からはんだ実装時ピーク温度までの傾きから求められる。  The bending elastic modulus of the die pond material and the sealing material is measured according to JI SK-6911 under the atmosphere of the peak temperature (for example, 245 ° C) at the time of mounting the die pond material and the hardened sealing material. Obtained by: The thermal expansion coefficient is obtained by preparing a cured encapsulant and performing measurement using a thermomechanical analyzer, and obtaining the slope from the molding temperature of the resin-encapsulated semiconductor device to the peak temperature during solder mounting.
上述した条件を満たす封止材は、 前述したように、 通常、 粉末状もしくはタブ レット状 なっている。 封止材の主剤は、 特に制限するものではないが、 ピフエ ニル型エポキシ樹脂ゃクレゾールノボラック型エポキシ樹脂等が好適に用いられ る。 さらに、 下記の一般式 （I) で表されるエポキシ樹脂は高温下での曲げ弾性 係数が小さく、 インナーリード部やダイポンドパッド部の熱応力を低減すること ができる。 As described above, the sealing material that satisfies the above-described conditions is usually in the form of a powder or a tablet. The main component of the sealing material is not particularly limited, but a phenyl type epoxy resin ゃ cresol novolak type epoxy resin or the like is preferably used. In addition, the epoxy resin represented by the following general formula (I) has a low flexural modulus at high temperatures and can reduce the thermal stress in the inner leads and die pond pads. Can be.
Figure imgf000021_0001
封止材に式 （I ) のエポキシ樹脂を用いる場合は、 封止材中の樹脂成分全体の 1 0重量％以上、 より好ましくは 2 0重量％以上含有させることが望ましい。 1 0重量％未満では、 十分な低弾性化が図れず、 インナーリード部やダイポンドパ ッド部の熱応力を低減することができないからである。
Figure imgf000021_0001
When the epoxy resin of the formula (I) is used as the sealing material, it is desirable that the content be at least 10% by weight, more preferably at least 20% by weight, of the entire resin component in the sealing material. If the content is less than 10% by weight, the elasticity cannot be sufficiently reduced, and the thermal stress in the inner lead portion and the die pond pad portion cannot be reduced.
封止材は、 主剤以外に硬化剤、 硬化促進剤、 無機質充填剤を含有し、 必要に応 じて難燃剤、 カップリング剤、 ワックス等が併せて用いられる。 無機質充填剤の 配合量は、 封止材全体の 8 0重量％以上、 9 5重量％未満に設定するのが好まし い。 特に好適なのは 8 2重量％から 9 0重量％の範囲である。 8 0重量％未満で は、 封止材の飽和吸水率が増加することによつて吸湿後のせん断接着性が低下す るとともに、 熱膨張係数が大きくなるため熱応力が増加する。 一方、 9 5重量％ を超えるとトランスファ一成形時の封止材の粘度が高くなることによりワイヤー 流れや成形不良が生じ易くなるとともに、 封止材硬化物の曲げ弹性係数が大きく なるため熱応力が増加するからである。  The sealing material contains a curing agent, a curing accelerator, and an inorganic filler in addition to the main agent, and a flame retardant, a coupling agent, a wax, and the like are used as needed. The blending amount of the inorganic filler is preferably set at 80% by weight or more and less than 95% by weight of the whole sealing material. Particularly preferred is the range from 82% to 90% by weight. If the amount is less than 80% by weight, the shear adhesion after moisture absorption is reduced due to an increase in the saturated water absorption of the sealing material, and the thermal stress increases due to a large thermal expansion coefficient. On the other hand, if the content exceeds 95% by weight, the viscosity of the encapsulant during transfer molding increases, so that wire flow and molding defects are likely to occur, and the bending stress coefficient of the cured encapsulant increases, resulting in thermal stress. Is increased.
さらに、 封止材には、 上記以外にシリコーンオイル及びシリコーンゴム、 合成 ゴム等の低応力化剤を配合し、 またはイオントラップ剤を配合してもよい。 低応 力化剤を配合した場合、 封止材の弹性係数を小さくできることから各部の熱応力 を低減できる。 低応力化剤の配合量は、 樹脂成分全体の 5重量％以上に設定する のが好ましい。 このような封止材で半導体チップを封止する方法は、 特に制限さ れず、 通常のトランスファ一成形等に見られるような公知のモールド方法により 行なうことができる。  Further, in addition to the above, a low stress agent such as silicone oil, silicone rubber, or synthetic rubber may be added to the sealing material, or an ion trapping agent may be added. When a stress reducing agent is added, the thermal coefficient of each part can be reduced because the elasticity coefficient of the sealing material can be reduced. The amount of the low-stressing agent is preferably set to 5% by weight or more of the entire resin component. The method of sealing the semiconductor chip with such a sealing material is not particularly limited, and it can be performed by a known molding method such as that used in ordinary transfer molding.
上述した条件を満たすダイポンド材は、 前述したように、 通常、 ペースト状や フィルム状になっている。 無機質充填剤の配合量を、 ダイポンド材全体の 2 0 ~ 8 5重量％、 低応力化剤の配合量を、 樹脂成分全体の 4 0重量％に設定するのが 好ましい。 以上に述べたダイボンド材および封止材を組み合わせることによつて半導体チ ップの反り、 耐温度サイクル性、 はんだ実装性のすべてに優れた半導体装置を得 ることができる。 く実施例 （Example) > As described above, die pond materials satisfying the above conditions are usually in the form of a paste or a film. It is preferable that the blending amount of the inorganic filler is set to 20 to 85% by weight of the whole die pond material, and the blending amount of the low stress agent is set to 40% by weight of the whole resin component. By combining the die bond material and the sealing material described above, it is possible to obtain a semiconductor device excellent in all of the warpage of the semiconductor chip, the temperature cycle resistance, and the solder mountability. Example>
以下に、 具体的な実施例を記載する。  Hereinafter, specific examples will be described.
表 1に示す原材料を用い、 表 2に示す配合で A〜 Jの封止材を準備し、 一方、 表 3に示す原材料を用い、 表 4に示す配合で I〜！ Vのダイボンド材を準備した。 【表 1】 封止材原材料  Using the raw materials shown in Table 1, the encapsulants A to J were prepared with the composition shown in Table 2. On the other hand, the raw materials shown in Table 3 were used, and the I-! V die bonding material was prepared. [Table 1] Raw materials for sealing materials
Figure imgf000022_0001
Figure imgf000022_0001
【表 2】 封止材の配合 封止材 [Table 2] Formulation of sealing material Sealing material
原材! ½  Raw materials!
A B C D E F G H I J  A B C D E F G H I J
エポキシ榭脂 -1 · _ ― ― ― 一 一 一 ― 85.0 42.5 エポキシ榭脂- 2 一 _ 一 ― ― ― 42.5 エポキシ樹脂- 3 85.0 85.0 85.0 85.0 85.0 85.0 ― ― _ ― エポキシ樹脂 -4 ― ― _ _ 一 _ 85.0 85.0 ― 一 硬化剤 65.0 65.0 65.0 65.0 65.0 65.0 81.2 81.2 81.5 78.9 硬化促進剤 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 2.0 3.0 難燃剤 15.0 15.0 15.0 15.0 15.0 15.0 15.0 15.0 15.0 15.0 難燃助剤 6.0 15.0 6.0 15.0 6.0 15.0 6.0 6.0 6.0 6.0 低応力化剤 15.0 15.0 15.0  Epoxy resin-1------------------------------------------------------------------------------42.5 Epoxy resin-2-1-1---42.5 Epoxy resin-3 85.0 85.0 85.0 85.0 85.0 85.0-----Epoxy resin-4------ 1 _ 85.0 85.0-1 Curing agent 65.0 65.0 65.0 65.0 65.0 65.0 81.2 81.2 81.5 78.9 Curing accelerator 3.0 3.0 3.0 3.0 3.0 3.0 3.0 3.0 2.0 3.0 Flame retardant 15.0 15.0 15.0 15.0 15.0 15.0 15.0 15.0 15.0 15.0 Flame retardant 6.0 15.0 6.0 15.0 6.0 15.0 6.0 6.0 6.0 6.0 Low stress agent 15.0 15.0 15.0
離型剤 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 着色剤 2.6 2.6 2.6 2.6 2.6 2.6 2.6 2.6 2.6 2.6 カップリング剤 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 無機質充填剤 (球状） 740 800 1044 1129 1392 1505 1514 703 1132 1123  Release agent 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Colorant 2.6 2.6 2.6 2.6 2.6 2.6 2.6 2.6 2.6 2.6 Coupling agent 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 Inorganic filler (spherical) 740 800 1044 1129 1392 1505 1514 703 1132 1123
【表 3】 ダイボンド材の原材料】 原材料 化合物の名称及びその特性 [Table 3] Raw materials for die bonding materials] Raw materials Names of compounds and their properties
YDCN702S (クレゾ一ルノボラック型エポキシ樹脂、 YDCN702S (Cresol novolak epoxy resin,
1 1
エポキシ樹脂 東都化成株式会社製商品名）  Epoxy resin (trade name, manufactured by Toto Kasei)
EXA- 830CRP (ビスフエノール F型エポキシ樹脂、 EXA-830CRP (Bisphenol F-type epoxy resin,
2 Two
大日本インキ化学工業株式会社製商品名）  (Product name made by Dainippon Ink and Chemicals, Inc.)
VR-9300 (フエノールノボラック樹脂、  VR-9300 (phenolic novolak resin,
硬化剤 三井東圧化学株式会社製商品名）  Curing agent Mitsui Toatsu Chemical Co., Ltd. product name)
硬化促進剤 · イミダゾ一ル類  Curing accelerator · Imidazoles
CTBNX-1009SP (カルボキシル基末端ブタジエンアタリロニトリルゴム、 低応力化剤 宇部興産株式会社製商品名）  CTBNX-1009SP (carboxyl-terminated butadiene atarilonitrile rubber, low stress agent Ube Industries, Ltd.)
反応性希釈剤 t-フ'チルフエュルグリシシ '/レエ -テル (旭電化工業株式会社製）  Reactive diluent t-Filtylfurglycish '/ Ray-Tel (Asahi Denka Kogyo Co., Ltd.)
溶剤 酢酸一 2 (2—エトキシエトキシ)ェチル  Solvent Monoacetic acid 2 (2-ethoxyethoxy) ethyl
無機質充填剤 灰白色鱗片状銀粉 【表 4】 ダイポンド材の配合 Inorganic filler Gray white flaky silver powder [Table 4] Composition of die pound material
Figure imgf000024_0001
表 4に示す配合のダイポンド材を用いて、 半導体チップをリードフレームのダ ィポンドパッド上に配置し、 150°C、 1時間の硬化を行なって固定した。 半導 体チップは、 外形寸法が 8. OmmXI O. Omm、 厚みが 0. 28mm、 リー ドフレームは銅合金であり、 インナ一リード先端部に銀めつきを施したものを用 いた。 リードフレームの熱膨張係数は 1. 7 X 10— 5Z°C、 インナーリード部の 長さは 2mm〜5. 6mm、 幅が 0. 185mm、 厚さが 0. 15mm、 ダイポ ンドパッド部の外形寸法は 8. 4mmX 10. 4mm, 厚みが 0. 15 mmであ る。
Figure imgf000024_0001
The semiconductor chip was placed on a dip pad of a lead frame using a die pond material having the composition shown in Table 4, and fixed at 150 ° C. for 1 hour. The semiconductor chip used had an external dimension of 8. OmmXI O. Omm, a thickness of 0.28 mm, a lead frame made of copper alloy, and a silver-plated inner lead. Thermal expansion coefficient of the lead frame 1. 7 X 10- 5 Z ° C , the length of the inner lead portion 2mm~5. 6mm, width of 0. 185 mm, is 0. 15 mm thickness, outer dimensions of the dipole Ndopaddo portion Is 8.4 mm X 10.4 mm and 0.15 mm thick.
このようにして得られた半導体チップの、 25 °Cでの半導体チップの反り測定 を行なった。 半導体チップの反りは表面粗さ計を用い、 チップ上面部 9mmを走 查することにより測定した。 結果は、 以下の表 6〜9に示す。  The warpage of the semiconductor chip thus obtained was measured at 25 ° C. The warpage of the semiconductor chip was measured by using a surface roughness meter and running 9 mm on the top surface of the chip. The results are shown in Tables 6-9 below.
その後、 表 2に示す封止材を用いて、 半導体チップを 175°C、 6. 9MPa、 90秒のトランスファー成形でモールドし、 175°C、 5時間のアフターキュア を行なうことにより、 樹脂封止型半導体装置を得た。 この半導体装置は、 80ピ ン QFPで外形寸法が 14mmX 2 Omm、 厚みが 1. 4mmである。 具体的に は、 図 6に示す半導体装置と同様であり、 封止材表面からインナ一リード部まで の封止材の厚さは 0. 625 mm、 封止材表面からダイポンドパッド部までの封 止材の厚さは 0. 475mmである。  After that, using the sealing material shown in Table 2, the semiconductor chip is molded by transfer molding at 175 ° C, 6.9MPa, 90 seconds, and after-cured at 175 ° C, 5 hours for resin sealing. A type semiconductor device was obtained. This semiconductor device is an 80-pin QFP with external dimensions of 14 mm X 2 Omm and a thickness of 1.4 mm. Specifically, it is the same as the semiconductor device shown in FIG. 6, and the thickness of the sealing material from the surface of the sealing material to the inner lead portion is 0.625 mm, and the thickness of the sealing material from the surface of the sealing material to the die pound pad portion. The thickness of the sealing material is 0.475 mm.
半導体装置を作製した際の、 封止材八〜 Jとダイボンド材 I〜！ Vの組み合わせ は、 表 5に示すとおりである。 40種類のサンプルをそれぞれ 5個ずつ作製し、 各種類での実験を、 実験例.1〜40とした < Encapsulating materials 8-J and die bonding materials I-when manufacturing semiconductor devices! The combinations of V are as shown in Table 5. We made 5 samples of each of the 40 samples, The experiments for each type are shown in Experimental Examples 1 to 40.
【表 5】  [Table 5]
Figure imgf000025_0001
表 5に示す樹脂封止型半導体装置の各サンプルを使用して、 はんだ実装性試験 と、 耐温度サイクル性試験を行なった。
Figure imgf000025_0001
Using each sample of the resin-encapsulated semiconductor device shown in Table 5, a solder mountability test and a temperature cycle resistance test were performed.
はんだ実装性試験は、 JEDEC (Joint Electron Device Engineering COUDC il) LEVEL 1に準拠し、 得られた半導体装置を 85 °C、 85% 11下で168時 間の吸湿を行なった後、 はんだ実装時ピーク温度 245°C、 繰り返し回数 3回で 行なった。 その後、 超音波探査映像装置で、 インナ一リード部とダイポンドパッ ド部のはく離を観察した。  The solder mountability test conforms to JEDEC (Joint Electron Device Engineering COUDCil) LEVEL 1, and the obtained semiconductor device is subjected to 168 hours of moisture absorption at 85 ° C and 85% 11 for 11 hours. The test was performed at a temperature of 245 ° C and three repetitions. After that, the peeling of the inner lead part and the die pond pad part was observed with an ultrasonic imaging device.
耐温度サイクル性試験は、 M I L規格 （STD— 883E c ond i t i o nC) に準拠し 150°Cで 15分、 一 65 °Cで 15分を 1サイクルとし、 100 0サイクル繰り返した。 その後、 断面観察によりダイポンドパッド端部のクラッ クを観察した。  The temperature cycling resistance test was repeated 100,000 cycles in accordance with the MIL standard (STD-883E condit ionC), with one cycle of 15 minutes at 150 ° C and 15 minutes at 65 ° C. Then, the cracks at the end of the die pond pad were observed by cross-sectional observation.
表 6〜表 9に、 半導体チップの反りと併せて、 温度サイクル 1000サイクル 後のダイポンドパッド端部におけるクラックを測定した結果を示す。 表 10に、 はんだ実装性試験後のィンナーリ一ド部のはく離を測定した結果を、 表 1 1、 表 12、 表 13に、 はんだ実装試験後のダイポンドパッド部のはく離を測定した結 果を示す。 インナーリード部と封止材のせん断歪みエネルギーを測定する際の試 験片の吸湿時間は、 半導体装置の吸湿時間が 168時間、 封止材表面からインナ ド部までの封止材の厚さが 0. 625 mm、 試験片の封止材の厚さが 1. 0mmであることから、 式 （17) を用いて 280時間で行なった。 同様に、 ダ ィポンドパッド部と封止材のせん断歪みエネルギーを測定する際の試験片の吸湿 時間は、 半導体装置の吸湿時間が 168時間、 封止材表面からダイポンドパッド 部までの封止材の厚さが 0. 475mm、 試験片の封止材の厚さが 1. 0 mmで あることから、 式 （17) を用いて 375時間で行なった。 Tables 6 to 9 show the results of measuring the cracks at the end of the die pond pad after 1000 temperature cycles, together with the warpage of the semiconductor chip. Table 10 shows the results of measuring the peeling of the inner lead after the solder mountability test.Tables 11, 11, and 13 show the results of measuring the peeling of the die pound pad after the solder mountability test. Show. Test for measuring the shear strain energy between the inner lead and the sealing material The moisture absorption time of the specimen was 168 hours for the semiconductor device, the thickness of the sealing material from the surface of the sealing material to the inner part was 0.625 mm, and the thickness of the sealing material of the test piece was 1. Since it is 0 mm, the measurement was performed in 280 hours using the equation (17). Similarly, when measuring the shear strain energy between the die pad and the encapsulant, the moisture absorption time of the test piece was 168 hours for the semiconductor device, and the encapsulant from the surface of the encapsulant to the die pond pad was 168 hours. Since the thickness of the test piece was 0.475 mm and the thickness of the sealing material of the test piece was 1.0 mm, the test was performed in 375 hours using equation (17).
【表 6】 サンプル 1 10 (チップの反り、 耐温度サイクル性） 実験例  [Table 6] Sample 1 10 (Chip warpage, temperature cycle resistance) Experimental example
5 10  5 10
Figure imgf000026_0001
Figure imgf000026_0001
【表 7】 サンプル 11 20 (チップの反り、 耐温度サイクル性） [Table 7] Sample 11 20 (Chip warpage, temperature cycle resistance)
Figure imgf000026_0002
Figure imgf000026_0002
【表 8】 サンプル 21 30 (チップの反り、 耐温度サイクル性）
Figure imgf000027_0001
ο τ〜τ 。乙べ 4 【ε ι：拏】
Figure imgf000027_0002
[Table 8] Sample 21 30 (Chip warpage, temperature cycle resistance)
Figure imgf000027_0001
ο τ ~ τ. Otobe 4 [ε ι: Halla]
Figure imgf000027_0002
(驄 >¾0) ？ 1一 π— ^Ο) ο τ〜ι: :<4 【Ο Ϊ拏】
Figure imgf000027_0003
(驄> ¾0)? 1 π— ^ Ο) ο τ〜ι:: <4 [Ο Ϊhara]
Figure imgf000027_0003
($l"ir^ -fr¾M ^ ^ ^^) o 〜 T S4乙く A 【6拏】
Figure imgf000027_0004
($ l "ir ^ -fr¾M ^ ^ ^^) o ~ T S4 Otaku A [6 Halla]
Figure imgf000027_0004
n  n
6SS80/I0df/X3d 08LLZ/Z0 OAV
Figure imgf000028_0001
6SS80 / I0df / X3d 08LLZ / Z0 OAV
Figure imgf000028_0001
【表 12】 サンプル 1 20 (ダイポンドパッド部のはく離） [Table 12] Sample 1 20 (peeling off of die pond pad)
Figure imgf000028_0002
Figure imgf000028_0002
【表 13】 サンプル 21〜30 (ダイポンドパッド部のはく離） [Table 13] Samples 21-30 (peeling off of die pond pad)
Figure imgf000028_0003
表 6〜9より、 ダイボンド材硬化後の半導体チップの反りは、 25°Cでのダイ ポンド材の曲げ弾性係数 （Ec が小さいほど少なく、 良好である。
Figure imgf000028_0003
From Tables 6 to 9, the warpage of the semiconductor chip after the die-bonding material is cured is smaller and better as the flexural modulus of the die-pound material at 25 ° C is smaller (Ec is smaller).
同じく、 表 6〜9より、 耐温度サイクル性試験後にダイポンドパッド端部に発 生するクラック数は、 式 （1) のパラメ一夕比 （σε/σ )) の値が 0. 2以下で あるときに、 クラックが発生せず、 良好であることが導がれる。 これに対し、 表 9の実験例 33〜37、 および 39では、 パラメ一夕比 （σεΖσ!)) が 0. 2を 超えており、 各実験例で 5個のサンプル中すベてのサンプルにクラックが発生し ている。 この結果から、 パラメ一夕比 （σεΖσί)) を 0. 2以下に抑えることに よって、 過酷な温度サイクルの繰り返しを経た後であっても、 クラックが生じな い良好な半導体装置を実現できることがわかる。 Similarly, according to Tables 6-9, after the temperature cycling test, When the value of the parameter ratio (σε / σ)) in equation (1) is less than 0.2, it can be understood that no cracks are generated and the number of cracks is good. On the other hand, in Experimental Examples 33 to 37 and 39 in Table 9, the parameter ratio (σεΖσ!)) Exceeded 0.2, and in each experimental example, all of the five samples Cracks are occurring. From these results, it can be concluded that by controlling the parameter ratio (σεΖσί)) to 0.2 or less, a good semiconductor device free from cracks can be realized even after repeated severe temperature cycles. Understand.
また、 表 10より、 はんだ実装性試験後のインナ一リード部のはく離は、 封止 材に関する式 （2) のパラメータ比 （UiZび eD の値が、 2. 0X 1 O— 6より大き い場合にインナ一リード部のはく離が生じない。 一方、 実験例 1、 2、 7、 8、 9、 10のように、 パラメ一夕比 (UiZひ ei) が 2. OX 10— 6未満であると、 封 止材とィンナーリ一ド部の間にはく離が発生する。 Also, from Table 10, the peeling of the inner lead after the solder mountability test depends on the parameter ratio of equation (2) for the sealing material (when the value of UiZ and eD is greater than 2.0X1O- 6. peeling of the inner first lead portion does not occur. on the other hand, as in experimental example 1, 2, 7, 8, 9, 10, the parameter Isseki ratio (UiZ shed ei) is less than 2. OX 10- 6 However, peeling occurs between the sealing material and the inner lead portion.
ダイポンドパッド部と封止材の間のはく離は、 表 11、 12、 13に示すよう に、 式 （3) のパラメータ比 （UdZ ed) の値が 4. 69 X 1 (Γ6より大きい場 合は、 はんだ実装性試験後においても、 はく離せずに良好である。 一方、 実験例 1、 2、 8、 9、 10、 11、 12、 18、 19、 20、 21、 22、 28に示 すように、 パラメ一夕比 （Ud/oed) が 4. 69X 10— 6未満だと、 ダイポンド パッド部ではく離が発生し、 半導体装置をプリン卜配線基板等にはんだ実装した 時点で、 欠陥が生じることがわかる。 Peeling between the die bond pad portion and the sealing member, as shown in Table 11, 12, 13, Equation (3) Parameter Ratio (UDZ ed) value 4. 69 X 1 (Γ 6 larger field In this case, it is good without peeling even after the solder mountability test, while Experimental Examples 1, 2, 8, 9, 10, 11, 12, 18, 19, 20, 21, 22, and 28 show. in Suyo, when it is less than 4. 69X 10- 6 parameters Isseki ratio (Ud / OED), when peeling occurs at Daipondo pad portion, and solder mounting the semiconductor device on the purine Bok wiring board or the like, defects It can be seen that it occurs.
これら実験結果から、 半導体チップの反り、 耐温度サイクル性、 はんだ実装性 のすべてに優れると考えられるダイボンド材と封止材を組み合わせとして、 表 5 に示すサンプルの中から、 サンプル 23, 24、 25、 26を選択し、 半導体チ ップの反り、 耐温度サイクル性、 及びはんだ実装性すベてを通して測定した。 結 果を表 14に示す。  From these experimental results, the combination of die bond material and encapsulant, which are considered to be excellent in all of the warpage, temperature cycling resistance, and solder mountability of the semiconductor chip, were selected from among the samples shown in Table 5 from samples 23, 24, and 25. And 26 were selected and measured through all of the semiconductor chip warpage, temperature cycle resistance, and solder mountability. Table 14 shows the results.
【表 14】
Figure imgf000030_0001
これら 4つのサンプルのいずれも、 [Table 14]
Figure imgf000030_0001
Each of these four samples
• 温度サイクル時のダイポンドパッド端部のクラックに関係するパラメータ比 （ oe/o ) が 0. 2以下  • Parameter ratio (oe / o) related to crack at the edge of die pond pad during temperature cycling is 0.2 or less.
• はんだ実装性試験後のインナーリード部のはく離に関係するパラメ一夕比 （U i/aei) の値が 2. 0 X 1 CT6以上 • The value of the parameter ratio (U i / aei) related to the separation of the inner lead after the solder mountability test is 2.0 X 1 CT 6 or more
• はんだ実装性試験後のダイポンドパッド部のはく離に関係するパラメ一夕比 （ • Parameters related to peeling of die pond pad after solder mountability test (
Ud/aed) の値が 4. 6 9 X 1 0— 6以上 Ud / aed value of) the 4. 6 9 X 1 0- 6 or more
という条件を満たし、 これらのダイポンド材と封止材とを組み合わせることによ り、 チップの反りが小さく、 ダイポンドパッド端部のクラック、 ダイポンドパッ ド部のはく離、 インナーリード部のはく離が解消され、 耐温度サイクル性、 はん だ実装性に優れた樹脂封止型半導体装置を得ることができる。  By combining these die pond materials and sealing materials, the warpage of the chip is small, cracks at the end of the die pond pad, peeling of the die pond pad portion, and peeling of the inner lead portion are eliminated. A resin-encapsulated semiconductor device having excellent temperature cycle resistance and solderability can be obtained.
以上から、 ダイポンド材と封止材の最適な物性条件を、 次のように特定すると ができる。 From the above, the optimal physical condition of the die pond material and the sealing material is specified as follows. Can be.
すなわち、 25°Cでの硬化後のダイポンド材の曲げ弾性係数が 1〜300MP aであり、 かつ硬化後のダイポンド材及び封止材の特性が、  In other words, the bending elastic modulus of the die pound material after curing at 25 ° C. is 1 to 300 MPa, and the properties of the die pound material and the sealing material after curing are:
ae ≤0. 2 X 式 （1)  ae ≤0.2 X expression (1)
Ui ≥2. 0 X 1 (Γ6 Xひ ei 式 （2) Ui ≥2.0 X 1 (Γ 6 X ei formula (2)
Ud ≥4. 69 X 10"6 X aed 式 （3) し し し、 Ud ≥4. 69 X 10 " 6 X aed Equation (3)
ae = (1/ 1 o g (kd,)) X Ee, X (am- ae,) X ae = (1/1 o g (kd,)) X Ee, X (am- ae,) X
σ ei = Ee2 X ( ae2— cum) X ΔΤ2 σ ei = Ee 2 X (ae 2 — cum) X ΔΤ 2
aed = l og (kd2) X Ee2 X (ae2- am) X ΔΤ2 aed = l og (kd 2 ) X Ee 2 X (ae 2 -am) X ΔΤ 2
ab： 25 °Cでの封止材の曲げ破断強度 （MP a) ab: Bending rupture strength of sealing material at 25 ° C (MPa)
Ui：はんだ実装時ピーク温度でのインナーリード部に対する封止材のせん断歪み エネルギー （N · m)  Ui: Shear strain energy of sealing material for inner lead at peak temperature during solder mounting (Nm)
Ud：はんだ実装時ピーク温度でのダイポンドパッド部に対する封止材のせん断歪 みエネルギー （N · m) Ud: Shear strain energy of sealant against die pond pad at peak temperature during solder mounting (Nm)
kd,：弾性係数 1 MP aに対する 25 °Cでのダイボンド材の曲げ弾性係数 E （Mkd ,: Flexural modulus E of the die bond material at 25 ° C for 1 MPa elastic modulus E (M
Pa) の比 （Ed1>lMPa) - kd2：弾性係数 1 MP aに対するはんだ実装時ピーク温度でのダイボンド材 Pa) ratio (Ed 1 > lMPa)-kd 2 : Die bond material at peak temperature during soldering for elastic modulus 1 MPa
の曲げ弾性係数 Ed2 (MP a) の比 （Ed2〉lMP a) Of the flexural modulus Ed 2 (MP a) of (Ed 2 〉 lMP a)
Ee,： 25 °Cでの封止材の曲げ弾性係数 （MP a) Ee ,: Flexural modulus of the encapsulant at 25 ° C (MPa)
Ee2：はんだ実装時ピーク温度での封止材の曲げ弹性係数 （MP a) Ee 2 : Flexural modulus of sealing material at peak temperature during solder mounting (MPa)
ae,：半導体装置成形温度 （ 175°C) から 25 までの封止材の平均熱膨張係 数 （1/°C) ae ,: Average thermal expansion coefficient (1 / ° C) of the encapsulant from semiconductor device molding temperature (175 ° C) to 25
ae2：半導体装置成形温度からはんだ実装時ピーク温度までの封止材の平均熱膨 張係数 （1/°C) ae 2 : Average thermal expansion coefficient of the sealing material from the semiconductor device molding temperature to the peak temperature during solder mounting (1 / ° C)
am: リードフレームの熱膨張係数 （1/°C) am: Thermal expansion coefficient of lead frame (1 / ° C)
△ Τι：半導体装置成形温度と温度サイクル時の低温側温度との差 （°C)  △ Τι: Difference between semiconductor device molding temperature and low-temperature temperature during temperature cycle (° C)
ΔΤ2：半導体装置成形温度とはんだ実装時ピーク温度との差 （°C) ΔΤ 2 : Difference between semiconductor device molding temperature and peak temperature during solder mounting (° C)
別の言い方をすれば、 無機質充填剤を 20〜85重量％と、 樹脂と、 樹脂成分 全体の 4 0〜7 0重量％の低応力化剤とを含むダイポンド材と、 一般式 （I ) で 表されるエポキシ樹脂と無機質充填剤を含み、 無機質充填剤の含有量が全体の 8 2〜9 0重量％に設定されている封止材を組み合わせることによって、 半導体チ ップの反り、 耐温度サイクル性、 及びはんだ実装性のすべてに優れた半導体装置 を実現できる。 In other words, 20-85% by weight of inorganic filler, resin, resin component A die pond material containing 40 to 70% by weight of a low-stress agent, an epoxy resin represented by the general formula (I) and an inorganic filler, wherein the content of the inorganic filler is 82 By combining the encapsulant set at up to 90% by weight, a semiconductor device excellent in all of the warpage of semiconductor chips, temperature cycle resistance, and solder mountability can be realized.
Figure imgf000032_0001
もっとも、 上述した式 （1 ) 、 ( 2 ) 、 ( 3 ) の少なくとも 2つの式を満たす 場合においても、 クラックの発生や、 封止材のはく離を防止することができる。 また、 ダイポンド材の 2 5 °Cでの曲げ弹性係数を I M P a〜3 0 O MP aの範囲 に設定することによって、 ダイポンドパッドへのチップ搭載後の 2 5ででのチッ プの反りを効果的に防止することができる。
Figure imgf000032_0001
However, even when at least two of the above-mentioned expressions (1), (2), and (3) are satisfied, the occurrence of cracks and the peeling of the sealing material can be prevented. In addition, by setting the flexural modulus at 25 ° C of the die pond material in the range of IMPa to 30 OMPa, the warpage of the chip at 25 after the chip is mounted on the die pond pad is reduced. It can be effectively prevented.
以上、 説明したように、 本発明の樹脂封止型半導体装置は、 半導体チップの反 りを抑え、 温度サイクル時における過酷な条件下においてもダイポンドパッド端 部のクラックを生じない。 さらに、 プリント配線基板等へのはんだ実装時におい ても、 インナーリ一ド部やダイポンドパッド部にはく離を生じることなく、 動作 の信頼性に優れる。 特に、 Q F Pのような表面実装型パッケージに適用した場合 に、 半導体チップの反りが小さく、 すぐれた耐温度サイクル性とはんだ実装性を 有し最適である。  As described above, the resin-encapsulated semiconductor device of the present invention suppresses the warpage of the semiconductor chip, and does not generate cracks at the end of the die pond pad even under severe conditions during a temperature cycle. Furthermore, even when soldering to a printed circuit board, etc., the inner leads and die pond pads do not peel off, and the operation is excellent. In particular, when applied to a surface mount type package such as QFP, the semiconductor chip is small in warpage, has excellent temperature cycle resistance and solder mountability, and is optimal.
また、 本発明のダイポンド材、 封止材を使用する場合は、 最初からダイポンド 材、 封止材、 リードフレームを準備し樹脂封止型半導体装置を組み立て、 半導体 チップの反り、 はんだ実装性、 耐温度サイクル性を評価しなくても、 封止材ゃダ ィポンド材の物性から信頼性結果を予測することができ、 半導体装置用ダイボン ド材、 封止材の開発サイクルを大幅に短縮することができる。  When using the die pond material and the encapsulant of the present invention, prepare the die pond material, the encapsulant, and the lead frame from the beginning, assemble the resin-encapsulated semiconductor device, and warp the semiconductor chip, solder mountability, and endurance. The reliability results can be predicted from the physical properties of the sealing material and dip pound material without evaluating the temperature cycling properties, and the development cycle of die bonding materials for semiconductor devices and sealing materials can be significantly shortened. it can.

Claims

求 の 範 囲 Range of request
1. 少なくとも 1つの半導体チップをリードフレームのダイポンドパッド上にダ ィポンド材を介して実装し、 封止材で封止した樹脂封止型半導体装置において、 硬化後のダイポンド材の 25 °Cでの曲げ弾性係数 Ed iは、 IMP a以上、 300 MP a以下であり、 かつ硬化後の封止材およびダイポンド材の特性が、 式 （1) を満たすことを特徴とする樹脂封止型半導体装置。 1. At least one semiconductor chip is mounted on a die pond pad of a lead frame via a dipstick material, and is sealed with a sealing material. The resin-encapsulated semiconductor device is characterized in that the flexural modulus Ed i of the resin is not less than IMPa and not more than 300 MPa, and the properties of the cured sealing material and die pound material satisfy formula (1). .
σβ ≤0.  σβ ≤0.
2 X ab 式 （1) ひ b： 25 °Cでの封止材の曲げ破断強度 (MP a) 2 X ab formula (1) b: bending rupture strength of sealing material at 25 ° C (MPa)
び e = (1/1 o g (kd!)) X Eet X (am- e{) X ATX And e = (1/1 og (kd!)) X Ee t X (am- e ( ) X AT X
kdt：弹性係数 1 MP aに対する 25 °Cでのダイボンド材の曲げ弾性係数 kd t : Flexural modulus of die-bonding material at 25 ° C for a modulus of elasticity of 1 MPa
(MP a) の比 （Ε(^>1ΜΡ a)  (MP a) ratio (Ε (^> 1ΜΡ a)
Ee!： 25 °Cでの封止材の曲げ弹性係数 （MP a)  Ee !: Flexural modulus of sealant at 25 ° C (MPa)
ae,：半導体装置の成形温度から 25 °Cまでの封止材の平均熱膨張係数 （1Z °C)  ae ,: Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to 25 ° C (1Z ° C)
am: リードフレームの熱膨張係数 （1Z°C) - am: Thermal expansion coefficient of lead frame (1Z ° C)-
ΔΤ;：半導体装置の成形温度と温度サイクル時の低温側温度との差 （°C) 2. 請求項 1に記載の樹脂封止型半導体装置において、 前記ダイポンド材は、 無 機質充填剤を 20 85重量％と、 樹脂成分と、 前記樹脂成分全体の 40 70 重量％の低応力化剤とを含むことを特徴とする。 .DELTA..tau;: in the resin sealing type semiconductor device according to the difference (° C) 2. Claim 1 the cold side temperature during the molding temperature and the temperature cycle of the semiconductor device, the Daipondo material, a non-machine fillers 20 85% by weight, a resin component, and 40 70% by weight of the total stress of the resin component.
3. 請求項 1に記載の樹脂封止型半導体装置において、 前記封止材の特性が、 (a) 25°Cでの曲げ弾性係数が 26 GP a以下 3. The resin-encapsulated semiconductor device according to claim 1, wherein the characteristics of the encapsulant are: (a) the flexural modulus at 25 ° C is 26 GPa or less.
(b) 半導体装置の成形温度から 25 °Cまでの平均熱膨張係数が 0.7X 10 5Z°C 以上 (b) The average coefficient of thermal expansion from the molding temperature of the semiconductor device to 25 ° C is 0.7X10 5 Z ° C or more.
(c) 25^での曲げ破断強度が 12 OMP a以上  (c) Flexural rupture strength at 25 ^ is over 12 OMPa
を満足することを特徴とする。 Is satisfied.
4. 請求項 1に記載の樹脂封止型半導体装置において、 前記リードフレームは銅 合金であり、 その表面の一部に銀、 金、 パラジウムから選択されるめつき層を有 することを特徴とする。 4. The resin-encapsulated semiconductor device according to claim 1, wherein the lead frame is made of a copper alloy, and has a plating layer selected from silver, gold, and palladium on a part of its surface. I do.
5. 半導体チップを封止材で封止した榭脂封止型半導体装置で用いられ、 前記半 導体チップをリードフレームのダイボンドパッド上に実装するためのダイボンド 材であって、 5. A die bonding material used in a resin-encapsulated semiconductor device in which a semiconductor chip is sealed with a sealing material, for mounting the semiconductor chip on a die bonding pad of a lead frame,
前記ダイポンド材の硬化後、 25 °Cでの曲げ弹性係数 Ed！は、 IMP a以上、 300MP a以下であり、  After curing of the die pond material, flexural modulus at 25 ° C Ed! Is IMPa or more and 300MPa or less,
前記ダイポンド材と前記封止材の硬化後の特性関係が式 (1) を満たすことを 特徴とするダイポンド材。  A characteristic relationship between the die pond material and the sealing material after curing satisfies Equation (1).
oe ≤0. 2 X o 式 （1) し し、  oe ≤0.2 Xo equation (1)
σΐ)： 25°Cでの封止材の曲げ破断強度 （MP a)  σΐ): Bending rupture strength of sealing material at 25 ° C (MPa)
ae = (1/1 o g (kd^) X X (am- ae,) X ΔΤ  ae = (1/1 o g (kd ^) X X (am- ae,) X ΔΤ
kdL：弾性係数 IMP aに対する 25 °Cでのダイポンド材の曲げ弾性係数 kd L : Modulus of elasticity of die pound material at 25 ° C against modulus of elasticity IMP a
(MP a) の比 （Ε^>1ΜΡ a)  (MP a) ratio (Ε ^> 1ΜΡ a)
Ee!： 25 °Cでの封止材の曲げ弾性係数 （MP a)  Ee !: Flexural modulus of the sealing material at 25 ° C (MPa)
ae, ：半導体装置の成形温度から 25 °Cまでの封止材の平均熱膨張係数 （ 1 / °C)  ae,: Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to 25 ° C (1 / ° C)
am:リードフレームの熱膨張係数 （1Z°C)  am: Thermal expansion coefficient of lead frame (1Z ° C)
ΔΤ,：半導体装置の成形温度と温度サイクル時の低温側温度との差 （°C) ΔΤ ,: Difference between the molding temperature of the semiconductor device and the lower temperature during the temperature cycle (° C)
6. 請求項 5に記載のダイポンド材であって、 無機質充填剤を 20〜 85重量％ と、 樹脂成分と、 前記榭脂成分全体の 40〜 70重量％の低応力化剤とを含み、 25 °Cでの曲げ弾性係数が IMP a以上、 300 MP a以下であることを特徴と する。 6. The die pond material according to claim 5, comprising: 20 to 85% by weight of an inorganic filler; a resin component; and 40 to 70% by weight of a total of the resin component; It is characterized by a flexural modulus at ° C of not less than IMPa and not more than 300 MPa.
, 5 , Five
32  32
7. リードフレームのダイポンドパッド上に、 ダイボンド材で実装された半導体 チップを封止して半導体装置を作製するための封止材であって、 7. A sealing material for manufacturing a semiconductor device by sealing a semiconductor chip mounted on a die bond pad of a lead frame with a die bonding material,
当該封止材と前記ダイポンド材の硬化後の特性関係が式 (1) を満たすことを 特徴とする封止材。  A sealing material characterized in that the property relationship between the sealing material and the die pound material after curing satisfies Expression (1).
oe ≤0. 2 X ab 式 （1) o ： 25 °Cでの封止材の曲げ破断強度 （MP a)  oe ≤0.2 X ab equation (1) o: Bending rupture strength of sealing material at 25 ° C (MPa)
σε = (1/1 og(kd))) X Ee】 X (am- } X 厶 σε = (1/1 og (kd))) X Ee] X (am- } X
kdL：弾性係数 1 MP aに対する 25 °Cでのダイボンド材の曲げ弾性係数0 (MP a) の比 （ただし、 Ed1>lMP a) kd L : Ratio of the flexural modulus of the die-bonding material at 25 ° C 0 (MPa) to the elastic modulus 1 MPa at Ed 1 > lMPa
Ee,： 25 °Cでの封止材の曲げ弹性係数 （MP a)  Ee ,: Flexibility of sealing material at 25 ° C (MPa)
ae,：半導体装置の成形温度から 25 °Cまでの封止材の平均熱膨張係数 （1ノ C)  ae ,: Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to 25 ° C (1 ° C)
am： リードフレームの熱膨張係数 （1Z°C)  am: Thermal expansion coefficient of lead frame (1Z ° C)
ΔΤ,：半導体装置の成形温度と温度サイクル時の低温側温度との差 （°C)  ΔΤ ,: Difference between the molding temperature of the semiconductor device and the lower temperature during the temperature cycle (° C)
8. 請求項 7に記載の封止材であって、 硬化後の特性が以下を満足することを特 徵とする。 8. The sealing material according to claim 7, wherein the properties after curing satisfy the following.
(a) 25 °Cでの曲げ弹性係数が 26 G P a以下 (a) Flexibility at 25 ° C is 26 GPa or less
0 (b) 半導体装置の成形温度から 25°Cまでの平均熱膨張係数が 0.7X 10— 5Z°C 以上 0 (b) an average thermal expansion coefficient from the molding temperature of the semiconductor device up to 25 ° C is 0.7X 10- 5 Z ° C or higher
(c) 25 °Cでの曲げ破断強度が 120 M P a以上  (c) Bending rupture strength at 25 ° C is 120 MPa or more
9. ダイポンドパッドおよびインナーリードを有するリードフレームと、9. a lead frame having a die pond pad and inner leads;
5 前記ダイポンドパッド上にダイポンド材を介して設置される半導体チップと、 前記半導体チップおよびリードフレームを封止する封止材と 5 a semiconductor chip placed on the die pond pad via a die pond material, and a sealing material for sealing the semiconductor chip and the lead frame.
を備え、 はんだ実装ピーク温度での前記インナ一リードに対する封止材のせん断 歪みエネルギーを Ui 、 はんだ実装ピ一ク温度での前記ダイポンドパッドに対す る封止材のせん断歪みエネルギーを Udとすると、 硬化後のダイボンド材および封 止材の特性が、 以下の式 （2) 、 式 （3) の少なくとも一方を満たすことを特徴 とする樹脂封止型半導体装置。 Where Ui is the shear strain energy of the sealing material with respect to the inner lead at the solder mounting peak temperature, and Ud is the shear strain energy of the sealing material with respect to the die pond pad at the solder mounting peak temperature. Die bond material after curing and sealing A resin-encapsulated semiconductor device, wherein the property of the stopper material satisfies at least one of the following expressions (2) and (3).
Ui ≥2. 0 X 1 0'6Xaei 式 （2)Ui ≥2.0 X 1 0 ' 6 Xaei Equation (2)
Ud ≥4. 69 X 1 0"6 X aed 式 （3) ここで、 Ud ≥4. 69 X 1 0 " 6 X aed Equation (3) where
σ ei = Ee2 X (ae2— am) X ΔΤ2 σ ei = Ee 2 X (ae 2 — am) X ΔΤ 2
σ ed= 1 ο g (kd2) X Ee2X ( ae2— am) ΧΔΤ2 σ ed = 1 ο g (kd 2 ) X Ee 2 X (ae 2 — am) ΧΔΤ 2
kd2：弾性係数 IMP に対するはんだ実装時ピーク温度におけるダイポンド 材の曲げ弾性係数 Ed 2 (MP a)の比 （Ed2〉lMP a) kd 2 : Ratio of flexural modulus Ed 2 (MPa) of die pound material at peak soldering temperature to modulus of elasticity IMP (Ed 2 〉 lMPa)
Ee2：はんだ実装時ピーク温度における封止材の曲げ弾性係数 （MP a) ae2：半導体装置の成形温度からはんだ実装時ピーク温度までの封止材の平均 熱膨張係数 （1Z°C) Ee 2 : Bending elastic modulus of the sealing material at the peak temperature at the time of solder mounting (MPa) ae 2 : Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to the peak temperature at the time of solder mounting (1Z ° C)
am：リードフレームの熱膨張係数 （1/°C)  am: Thermal expansion coefficient of lead frame (1 / ° C)
△ T2：半導体装置の成形温度とはんだ実装時ピーク温度との差 （°C) ΔT 2 : Difference between semiconductor device molding temperature and peak temperature during solder mounting (° C)
1 0. 請求項 9に記載の樹脂封止型半導体装置において、 前記ダイポンド材は、 無機質充填剤を 20〜 8 5重量％と、 樹脂成分と、 前記樹脂成分全体の 40〜 7 0重量％の低応力化剤とを含み、 硬化後のダイボンド材の特性が以下を満足する ことを特徴とする。 10. The resin-encapsulated semiconductor device according to claim 9, wherein the die pond material contains 20 to 85% by weight of an inorganic filler, a resin component, and 40 to 70% by weight of the entire resin component. It contains a low-stressing agent and the properties of the cured die bond material satisfy the following.
( 1 ) はんだ実装時ピーク温度での曲げ弾性係数が 70 MP a以下  (1) Flexural modulus at peak temperature during solder mounting is 70 MPa or less
1 1. 請求項 9に記載の樹脂封止型半導体装置において、 前記封止材は、 下記の 一般式 （I) で表されるエポキシ樹脂と無機質充填剤を含み、 無機質充填剤の含 有量が全体の 8 2〜90重量％であり、 硬化後の封止材の特性が、 1 1. The resin-encapsulated semiconductor device according to claim 9, wherein the encapsulant comprises an epoxy resin represented by the following general formula (I) and an inorganic filler, and a content of the inorganic filler. Of the encapsulant after curing is 82 to 90% by weight.
(1) はんだ実装時ピーク温度での曲げ弾性係数が 6 5 OMPa以下、  (1) The flexural modulus at peak temperature during solder mounting is 65 OMPa or less,
(2) 成形温度からはんだ実装時ピーク温度までの平均熱膨張係数が 5. 0 X 1 0一5 /°C以下、 (2) Average thermal expansion coefficient from the molding temperature to soldering peak temperature 5. 0 X 1 0 one 5 / ° C or less,
( 3 ) はんだ実装時ピーク温度でのィンナーリ一ドと封止材のせん断歪みエネル ギ一が 1. 3 5 X 1 0— 5N · m以上、 (4) はんだ実装時ピーク温度でのダイポンドパッドと封止材のせん断歪みエネ ルギ一が 6. 8 X 10— 6N · m以上、 (3) shear strain energy formic one In'nari one de and the sealing material in the soldering peak temperature 1. 3 5 X 1 0- 5 N · m or more, (4) shear strain energy conservation one die bond pad and the sealing material in the soldering peak temperature 6. 8 X 10- 6 N · m or more,
であることを特徴とする （一般式 （I) 中、 t— Buは、 ターシャリーブチル基 を示す） 。 (In the general formula (I), t-Bu represents a tertiary butyl group).
Figure imgf000037_0001
Figure imgf000037_0001
12. 請求項 9に記載の樹脂封止型半導体装置において、 前記リードフレームは 銅合金であり、 その表面の一部に、 銀、 金、 パラジウムから選択されるめつき層 を有することを特徴とする。 12. The resin-encapsulated semiconductor device according to claim 9, wherein the lead frame is made of a copper alloy, and has a plating layer selected from silver, gold, and palladium on a part of its surface. I do.
13. 半導体チップを封止材で封止した樹脂封止型半導体装置で、 前記半導体チ ップを、 ダイボンドパッドとィンナーリ一ドから成るリードフレームの前記ダイ ポンドパッド上に実装するためのダイポンド材であって、 13. A resin-encapsulated semiconductor device in which a semiconductor chip is encapsulated with an encapsulant. And
硬化後のはんだ実装時ピーク温度での当該ダイボンド材の曲げ弾性係数を E d2 、 弾性係数 IMP aに対する当該ダイポンド材の曲げ弾性係数 Ed2 (Ed2>l MP a) の比を kd2、 はんだ実装ピーク温度での前記インナ一リードに対する前 記封止材のせん断歪みエネルギーを Ui 、 はんだ実装ピーク温度での前記ダイポ ンドパッドに対する封止材のせん断歪みエネルギーを Udとしたときに、 当該ダイ ポンド材と前記封止材の硬化後の特性関係が、 以下の式 （2) 、 式 （3) の少な くとも一方を満たすことを特徴とするダイボンド材。 The bending elastic modulus of the die bond material at the peak temperature at the time of solder mounting after curing is E d 2 , and the ratio of the bending elastic modulus Ed 2 (Ed 2 > l MP a) of the die pound material to the elastic modulus IMP a is kd 2 , When the shear strain energy of the encapsulant for the inner lead at the solder mounting peak temperature is Ui and the shear strain energy of the encapsulant for the die pad at the solder mounting peak temperature is Ud, the die pound A die bond material characterized in that the property relationship between the material and the sealing material after curing satisfies at least one of the following formulas (2) and (3).
Ui ≥2. 0 X 10"6 X aei 式 （2)Ui ≥2.0 X 10 " 6 X aei formula (2)
Ud ≥4. 69X 10— 6 X aed 式 （3) ここで、 Ud ≥4. 69X 10— 6 X aed Equation (3) where:
aei = Ee2 X (ae2— am) X ΔΤ2 aei = Ee 2 X (ae 2 — am) X ΔΤ 2
aed= 1 ο g (kd2) XEe2x (ae2- am) ΧΔΤ2 aed = 1 ο g (kd 2 ) XEe 2 x (ae 2 -am) ΧΔΤ 2
Ee2：はんだ実装時ピ一ク温度における封止材の曲げ弾性係数 （MP a) ae2：半導体装置の成形温度からはんだ実装時ピーク温度までの封止材の平均 熱膨張係数 （1/°C) Ee 2 : Bending elastic modulus of sealing material at peak temperature during solder mounting (MPa) ae 2 : Average of sealing material from molding temperature of semiconductor device to peak temperature at solder mounting Thermal expansion coefficient (1 / ° C)
：リードフレームの熱膨張係数 （1/°C)  : Thermal expansion coefficient of lead frame (1 / ° C)
△ T2：半導体装置の成形温度とはんだ実装時ピーク温度との差 （°C)ΔT 2 : Difference between semiconductor device molding temperature and peak temperature during solder mounting (° C)
14. 請求項 1 3のダイポンド材であって、 無機質充填剤を 20〜 85重量％と 、 樹脂成分と、 前記榭脂成分全体の 40〜 70重量％の低応力化剤とを含み、 前 記硬化後のはんだ実装時ピーク温度での曲げ弾性係数 E d2が 7 0 MP a以下であ ることを特徴とする。 14. The die-pound material according to claim 13, comprising 20 to 85% by weight of an inorganic filler, a resin component, and 40 to 70% by weight of a low-stressing agent based on the whole resin component. flexural modulus E d 2 at soldering peak temperature after curing, characterized in 7 0 MP a less der Rukoto.
1 5. ダイポンドパッドおよびインナーリードを有するリードフレームの前記ダ ィポンドパッド上にダイポンド材で実装された半導体チップを封止して半導体装 置を作製するための封止材であって、 1 5. A sealing material for manufacturing a semiconductor device by sealing a semiconductor chip mounted on the die pad of a lead frame having a die pound pad and inner leads with a die pound material,
はんだ実装ピーク温度での前記ィンナ一リードに対する当該封止材のせん断歪 みエネルギ一を Ui 、 はんだ実装ピーク温度での前記ダイポンドパッドに対する 当該封止材のせん断歪みエネルギ一を Udとすると、 硬化後の当該封止材と前記ダ ィポンド材の特性関係が、 以下の式 （2) 、 式 （3) の少なくとも一方を満たす ことを特徴とする封止材。  Assuming that the shear strain energy of the sealing material with respect to the inner lead at the solder mounting peak temperature is Ui and the shear strain energy of the sealing material with respect to the die pond pad at the solder mounting peak temperature is Ud, curing is performed. A sealing material characterized in that the characteristic relationship between the sealing material and the dip pound material later satisfies at least one of the following expressions (2) and (3).
Ui ≥2. 0 X 1 0"6X aei 式 （2)Ui ≥2.0 X 1 0 " 6 X aei formula (2)
Ud ≥4. 6 9 X 1 0'6 X aed 式 （3) ここで、 Ud ≥4.6.9 X 1 0 ' 6 X aed Equation (3) where
σ ei = Ee2 X ( e2~ am) X ΔΤ2 σ ei = Ee 2 X (e 2 ~ am) X ΔΤ 2
aed= 1 o g (kd2) XEe2x (ae2- am) ΧΔΤ2 aed = 1 og (kd 2 ) XEe 2 x (ae 2 -am) ΧΔΤ 2
kd2：弾性係数 IMP aに対するはんだ実装時ピーク温度におけるダイポンド 材の曲げ弹性係数 Ed 2 (MP a)の比 （Ed2>lMP a) kd 2 : Ratio of flexural modulus Ed 2 (MP a) of die pound material at peak temperature during soldering to elastic modulus IMP a (Ed 2 > lMP a)
Ee2：はんだ実装時ピーク温度における封止材の曲げ弾性係数 （MP a) ae2：半導体装置の成形温度からはんだ実装時ピーク温度までの封止材の平均 熱膨張係数 （1Z°C) Ee 2 : Bending elastic modulus of the sealing material at the peak temperature at the time of solder mounting (MPa) ae 2 : Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to the peak temperature at the time of solder mounting (1Z ° C)
am : リードフレームの熱膨張係数 （1Z°C)  am: Thermal expansion coefficient of lead frame (1Z ° C)
ΔΤ2：半導体装置の成形温度とはんだ実装時ピーク温度との差 （°C) ΔΤ 2 : Difference between molding temperature of semiconductor device and peak temperature during solder mounting (° C)
16. 請求項 15に記載の封止材であって、 下記の一般式 (I) で表されるェポ キシ樹脂と無機質充填剤を含み、 無機質充填剤の含有量が全体の 82〜 90重量 %であり、 硬化後の特性として、 16. The sealing material according to claim 15, comprising an epoxy resin represented by the following general formula (I) and an inorganic filler, wherein the content of the inorganic filler is 82 to 90% by weight of the whole. %, And as properties after curing,
(1) はんだ実装時ピーク温度での曲げ弹性係数が 65 OMPa以下、  (1) The bending modulus at peak temperature during solder mounting is 65 OMPa or less,
(2) 成形温度からはんだ実装時ピーク温度までの平均熱膨張係数が 5. 0X 1 0一5 Z°C以下、 (2) Average thermal expansion coefficient from the molding temperature to soldering peak temperature 5. 0X 1 0 one 5 Z ° C or less,
( 3 ) はんだ実装時ピーク温度でのィンナーリ一ドと封止材のせん断歪みエネル ギ一が 1. 35 X 10— 6N · m以上、 (3) shear strain energy formic one In'nari one de and the sealing material in the soldering peak temperature 1. 35 X 10- 6 N · m or more,
(4) はんだ実装時ピーク温度でのダイボンドパッドと封止材のせん靳歪みエネ ルギ一が 6. 8 X 10— SN · m以上、 (4) The strain energy of the die bond pad and the sealing material at the peak temperature during solder mounting should be 6.8 x 10— S N
を満足することを特徴とする （一般式 （I) 中、 t一 Buは、 ターシャリープチ ル基を示す） 。 (In the general formula (I), t-Bu represents a tertiary butyl group).
Figure imgf000039_0001
Figure imgf000039_0001
17. ダイボンドパッドおよびィンナーリ一ドを有するリードフレームと、 前記ダイポンドパッド上にダイポンド材を介して設置される半導体チップと、 前記半導体チップおよびリードフレームを封止する封止材と 17. A lead frame having a die bond pad and an inner lead, a semiconductor chip installed on the die pond pad via a die pond material, and a sealing material for sealing the semiconductor chip and the lead frame.
を備え、 25 °Cでの封止材の曲げ破断強度を (MP a) 、 はんだ実装ピーク 温度での前記インナ一リードに対する封止材のせん断歪みエネルギーを Ui (N · m) 、 はんだ実装ピーク温度での前記ダイボンドパッドに対する封止材のせん断 歪みエネルギーを Ud (N - m) とすると、 硬化後のダイポンド材および封止材の 特性が、 以下の式 （1) 、 式 （2) 、 式 （3) を満たすことを特徴とする樹脂封 止型半導体装置。 The bending rupture strength of the sealing material at 25 ° C (MPa), the shear strain energy of the sealing material with respect to the inner lead at the solder mounting peak temperature Ui (Nm), the solder mounting peak Assuming that the shear strain energy of the sealing material with respect to the die bond pad at the temperature is Ud (N-m), the properties of the cured die pond material and the sealing material are represented by the following equations (1), (2), and (3). (3) A resin-sealed semiconductor device characterized by satisfying (3).
ae ≤ 0. 2 X ab 式 （1) ae ≤ 0.2 X ab Equation (1)
Ui ≥2. 0 X 10"6 X aei 式 （2) Ud ≥4. 6 9 X 1 0一 6 Xひ ed 式 （3) ここで、 Ui ≥2.0 X 10 " 6 X aei formula (2) Ud ≥4.6.6 X 10 6 X X ed Equation (3) where
oe =(1/ 1 o g (kd!)) XEe【X (am— ote ΧΔΊ\ 式 （4) aei = Ee2 X ( e2- am) X ΔΤ2 式 （5) aed= 1 o g (kd2) XEe2X (ae2— am) ΧΔΤ2 式 （6) kdi：弾性係数 IMP aに対する 2 5 °Cでのダイポンド材の曲げ弾性係数 Edoe = (1/1 og (kd!)) XEe [X (am— ote ΧΔΊ \ Equation (4) aei = Ee 2 X (e 2 -am) X ΔΤ 2 Equation (5) aed = 1 og (kd 2 ) XEe 2 X (ae 2 — am) ΧΔΤ 2 Equation (6) kdi: Modulus of elasticity of die pound material at 25 ° C with respect to modulus of elasticity IMP a Ed
(MP a)の比 （Edi :!]^? a) (MP a) ratio (Edi:!) ^? A)
kd2：弾性係数 IMP aに対するはんだ実装時ピーク温度でのダイポンド材の 曲げ弾性係数 Ed2(MP a)の比 （Ed2>lMP a) kd 2 : Ratio of flexural modulus Ed 2 (MPa) of die pound material at peak soldering temperature to modulus of elasticity IMP a (Ed 2 > lMPa)
Eel ： 2 5 Cでの封止材の曲げ弾性係数 （MP a) Ee l: flexural modulus of the sealing material in the 2 5 C (MP a)
Ee2：はんだ実装時ピーク温度での封止材の曲げ弾性係数 （MP a) aei：半導体装置の成形温度から室温 （2 5°C) までの封止材の平均熱膨張係 数 （1Z°C) Ee 2 : Bending elastic modulus of the sealing material at the peak temperature during solder mounting (MPa) a ei : Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to room temperature (25 ° C) (1Z ° C)
ae2：半導体装置の成形温度からはんだ実装時ピーク温度までの封止材の平均 熱膨張係数 （1Z°C) ae 2 : Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to the peak temperature during solder mounting (1Z ° C)
am：リードフレームの熱膨張係数 （1Z°C)  am: Thermal expansion coefficient of lead frame (1Z ° C)
ΔΤ,：半導体装置の成形温度と温度サイクル時の低温側との差 （°C)  ΔΤ ,: Difference between molding temperature of semiconductor device and low temperature side during temperature cycle (° C)
ΔΤ2：半導体装置の成形温度とはんだ実装時ピーク温度との差 （ ）ΔΤ 2 : Difference between semiconductor device molding temperature and peak temperature during solder mounting ()
1 8. 請求項 1 7に記載の樹脂封止型半導体装置において、 前記ダイポンド材は 、 無機質充填剤を 20〜8 5重量％と、 樹脂成分と、 前記樹脂成分全体の 40〜 7 0重量％の低応力化剤とを含み、 硬化後のダイポンド材の特性が、 18. The resin-encapsulated semiconductor device according to claim 17, wherein the die-pound material contains 20 to 85% by weight of an inorganic filler, a resin component, and 40 to 70% by weight of the entire resin component. And the properties of the cured dip pound material,
(1) 2 5 °Cでの曲げ弾性係数が 1 M P a以上、 30 0 M P a以下、  (1) Flexural modulus at 25 ° C is 1 MPa or more, 300 MPa or less,
(2) はんだ実装時ピ一ク温度での曲げ弾性係数が 7 OMP a以下  (2) Flexural modulus at peak temperature during solder mounting is 7 OMPa or less
であることを特徴とする。 It is characterized by being.
1 9. 請求項 1 7に記載の樹脂封止型半導体装置において、 前記封止材は、 下記 の一般式 （I) で表されるエポキシ樹脂と無機質充填剤を含み、 無機質充填剤の 含有量が全体の 82〜90重量％であり、 硬化後の封止材の特性が、 (1) 25 °Cでの曲げ弹性係数が 26 G P a以下、 1 9. The resin-encapsulated semiconductor device according to claim 17, wherein the encapsulant comprises an epoxy resin represented by the following general formula (I) and an inorganic filler, and a content of the inorganic filler. Is 82 to 90% by weight of the whole. (1) The flexural modulus at 25 ° C is 26 GPa or less,
(2) 半導体装置の成形温度から 25 °Cまでの平均熱膨張係数が 0.7X 10- °C 以上、  (2) The average thermal expansion coefficient from the molding temperature of the semiconductor device to 25 ° C is 0.7X 10- ° C or more,
(3) 25 での曲げ破断強度が 120 MP a以上、  (3) Flexural rupture strength at 25 is 120 MPa or more,
(4) はんだ実装時ピーク温度における曲げ弾性係数が 65 OMPa以下、 (4) The flexural modulus at peak temperature during solder mounting is 65 OMPa or less,
(5) 成形温度からはんだ実装時ピ一ク温度までの平均熱膨張係数が 5. 0X1 0一5/。 C以下、 (5) The average coefficient of thermal expansion from the molding temperature to the peak temperature during solder mounting is 5.0 × 10 15 /. C or less,
(6) はんだ実装時ピーク温度でのィンナーリードと封止材のせん断歪みエネル ギ一が 1. 35 X 10— 6N · m以上、 (6) shear strain energy formic one In'narido and the sealing material in the soldering peak temperature 1. 35 X 10- 6 N · m or more,
(7) はんだ実装時ピーク温度でのダイポンドパッドと封止材のせん断歪みエネ ルギ一が 6. 8 X 10_6N · m以上、 (7) shear strain energy conservation one die bond pad and the sealing material in the soldering peak temperature 6. 8 X 10_ 6 N · m or more,
であることを特徵とする （一般式 (I) 中、 t一 Buは、 夕一シャリーブチル基 を示す） 。 (In the general formula (I), t-Bu represents a Yuichi I-shary butyl group).
Figure imgf000041_0001
Figure imgf000041_0001
20.請求項 17に記載の樹脂封止型半導体装置において、 前記リードフレームは 銅合金であり、 その表面の一部に、 銀、 金、 パラジウムから選択されるめつき層 を有することを特徴とする。 20. The resin-encapsulated semiconductor device according to claim 17, wherein the lead frame is made of a copper alloy, and has a plating layer selected from silver, gold, and palladium on a part of its surface. I do.
21. 半導体チップを封止材で封止した樹脂封止型半導体装置で、 前記半導体チ ップを、 ダイポンドパッドおよびインナ一リードから成るリードフレームの前記 ダイポンドパッド上に実装するためのダイポンド材であって、 21. In a resin-sealed semiconductor device in which a semiconductor chip is sealed with a sealing material, a die pond for mounting the semiconductor chip on the die pond pad of a lead frame including a die pond pad and an inner lead. Wood,
25°Cでの当該ダイポンド材の曲げ弾性係数を Ec^ (MP a) 、 はんだ実装時 ピーク温度での当該ダイポンド材の曲げ弹性係数を Ed2 (MP a)、 弹性係数 1M Paに対する前記 25°Cでのダイポンド材の曲げ弾性係数 Edi (Ed^lMP a) の比を kdP 弾性係数 IMP aに対する前記はんだ実装時ピーク温度でのダイポ ンド材の曲げ弾性係数 Ed2(Ed2>lMP a)の比を kd2とし、 25 °Cでの前記封止材の曲げ破断強度を σ (MP a) 、 はんだ実装ピーク温度 での前記インナ一リードに対する前記封止材のせん断歪みエネルギーを Ui (N · m) 、 はんだ実装ピーク温度での前記ダイポンドパッドに対する封止材のせん断 歪みエネルギーを Ud (N - m) とすると、 The bending elastic modulus of the die pound material at 25 ° C is Ec ^ (MPa), the bending elasticity coefficient of the die pound material at the peak temperature at the time of solder mounting is Ed 2 (MPa), and the elasticity coefficient is 1 ° M. flexural modulus Edi of Daipondo material in C (Ed ^ lMP a) the ratio of kd P modulus flexural modulus of the dipole command material in the relative IMP a soldering peak temperature Ed 2 (Ed 2> lMP a ) Is kd 2 and The bending rupture strength of the sealing material at 25 ° C is σ (MPa), the shear strain energy of the sealing material with respect to the inner lead at the solder mounting peak temperature is Ui (Nm), and the solder mounting peak is If the shear strain energy of the encapsulant against the die pond pad at temperature is Ud (N-m),
当該ダイボンド材と前記封止材の硬化後の特性が、 以下の式 （1) 、 式 （2) 、 式 （3) を満たすことを特徴とするダイポンド材。  A die pound material characterized in that the properties after curing of the die bonding material and the sealing material satisfy the following formulas (1), (2), and (3).
oe ≤ 0. 2 X ab 式 （1) oe ≤ 0.2 X ab equation (1)
Ui ≥2. 0 X 10"6 X aei 式 （2)Ui ≥2.0 X 10 " 6 X aei formula (2)
Ud ≥4. 69 X 10"6 X aed 式 （3) ここで、 Ud ≥4. 69 X 10 " 6 X aed Equation (3) where:
oe
Figure imgf000042_0001
式 （4) aei = Ee2 X (ae2— am) X ΔΤ2 式 (5) aed= 1 o g (kd2) XEe2x (c¾e2- am) ΧΔΤ2 式 （6)oe
Figure imgf000042_0001
Equation (4) aei = Ee 2 X (ae 2 — am) X ΔΤ 2 Equation (5) aed = 1 og (kd 2 ) XEe 2 x (c¾e 2 -am) ΧΔΤ 2 Equation (6)
Ee,： 25 °Cでの封止材の曲げ弾性係数 （MP a) Ee ,: Flexural modulus of the encapsulant at 25 ° C (MPa)
Ee2：はんだ実装時ピーク温度での封止材の曲げ弹性係数 （MP a) Ee 2 : Flexural modulus of sealing material at peak temperature during solder mounting (MPa)
ae,：半導体装置の成形温度から室温 （25で） までの封止材の平均熱膨張係 数  ae ,: Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to room temperature (at 25)
ae2：半導体装置の成形温度からはんだ実装時ピーク温度までの封止材の平均 熱膨張係数 （1/°C) ae 2 : Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to the peak temperature at the time of solder mounting (1 / ° C)
am:リードフレームの熱膨張係数 （1Z°C)  am: Thermal expansion coefficient of lead frame (1Z ° C)
ΔΤ,：半導体装置の成形温度と温度サイクル時の低温側との差 （°C)  ΔΤ ,: Difference between molding temperature of semiconductor device and low temperature side during temperature cycle (° C)
ΔΤ2：半導体装置の成形温度とはんだ実装時ピーク温度との差 （°C) ΔΤ 2 : Difference between molding temperature of semiconductor device and peak temperature during solder mounting (° C)
2 2. 請求項 21に記載のダイボンド材であって、 無機質充填剤を 20〜85重 量％と、 樹脂成分と、 前記樹脂成分全体の 40〜70重量％の低応力化剤とを含 み、 硬化後の特性が 22. The die bonding material according to claim 21, comprising 20 to 85% by weight of an inorganic filler, a resin component, and 40 to 70% by weight of a low stress agent based on the entire resin component. The properties after curing
(1) 25 °Cでの曲げ弹性係数が IMP a以上、 300MP a以下、  (1) Flexural modulus at 25 ° C is IMPa or more, 300 MPa or less,
(2) はんだ実装時ピーク温度での曲げ弾性係数が 7 OMP a以下  (2) Flexural modulus at peak temperature during solder mounting is 7 OMPa or less
であることを特徴とする。 It is characterized by being.
23. ダイポンドパッドおよびインナ一リードを有するリードフレームの前記ダ ィポンドパッド上にダイポンド材で実装された半導体チップを、 封止材で封止し て樹脂封止型半導体装置を作製するための封止材であって、 23. Encapsulation for manufacturing a resin-encapsulated semiconductor device by encapsulating a semiconductor chip mounted on a dipond material on a dip pad of a lead frame having a die pond pad and an inner lead with a sealing material. Wood,
25°Cでの当該封止材の曲げ破断強度を σί) (MP a) 、 25 °Cでの当該封止 材の曲げ弾性係数を (MP a) 、 はんだ実装時ピーク温度での当該封止材の 曲げ弾性係数を Ee2 (MP a) 、 はんだ実装ピーク温度での前記インナ一リード に対する封止材のせん断歪みエネルギーを Ui (N · m) 、 はんだ実装ピーク温 度での前記ダイポンドパッドに対する封止材のせん断歪みエネルギーを Ud (N · m) とすると、 当該封止材と前記ダイポンド材の硬化後の特性関係が、 以下の式 (1) 、 式 （2) 、 式 （3) を満たすことを特徴とする封止材。 The bending rupture strength of the sealing material at 25 ° C is σί) (MPa), the bending elastic modulus of the sealing material at 25 ° C is (MPa), the sealing at the peak temperature during solder mounting. The flexural modulus of the material is Ee 2 (MPa), the shear strain energy of the sealing material with respect to the inner lead at the solder mounting peak temperature is Ui (Nm), and the die pound pad at the solder mounting peak temperature. Assuming that the shearing strain energy of the sealing material with respect to is Ud (N · m), the characteristic relationship between the sealing material and the die pound material after curing is expressed by the following equations (1), (2), and (3). A sealing material characterized by satisfying the following.
ae ≤0. 2 X ab 式 （1) ae ≤0.2 X ab equation (1)
Ui ≥2. 0 X 10— 6 X aei 式 （2)Ui ≥2.0 X 10— 6 X aei formula (2)
Ud ≥4. 69 X 10"6Xaed 式 （3) ここで、 Ud ≥4. 69 X 10 " 6 Xaed Equation (3) where
ae =(1/1 o g(kd1))XEelX(am-ae1)XAT1 式 （4) aei = Ee2 X ( e2~ am) X ΔΤ2 式 （5) aed= 1 o g (kd2) XEe2x ( e2~ am) ΧΔΤ2 式 （6) kd,：弾性係数 IMP aに対する 25 でのダイポンド材の曲げ弾性係数 ae = (1/1 og (kd 1 )) XEe l X (am-ae 1) XAT 1 Equation (4) aei = Ee 2 X (e 2 ~ am) X ΔΤ 2 Equation (5) aed = 1 og ( kd 2 ) XEe 2 x (e 2 ~ am) ΧΔΤ 2 Equation (6) kd, elastic modulus of elasticity of die pound material at 25 with respect to IMP a
(MP a)の比 （Ed^ IMP a)  (MP a) ratio (Ed ^ IMP a)
kd2 :弾性係数 1 MP aに対するはんだ実装時ピーク温度でのダイボンド材の 曲げ弹性係数 Ed2 (MP a)の比 (Ed2>lMP a) kd 2 : Ratio of flexural modulus Ed 2 (MPa) of die bond material at peak temperature during soldering to elastic modulus 1 MPa (Ed 2 > lMPa)
ae,：半導体装置の成形温度から室温 （25°C) までの封止材の平均熱膨張係 数 (1/°C) ae ,: Average thermal expansion coefficient (1 / ° C) of the sealing material from the molding temperature of the semiconductor device to room temperature (25 ° C)
e2：半導体装置の成形温度からはんだ実装時ピーク温度までの封止材の平均 熱膨張係数 （1Z°C) e 2 : Average thermal expansion coefficient of the sealing material from the molding temperature of the semiconductor device to the peak temperature during solder mounting (1Z ° C)
am: リードフレームの熱膨張係数 （1Z°C) am: Thermal expansion coefficient of lead frame (1Z ° C)
T,：半導体装置の成形温度と温度サイクル時の低温側との差 （°C)  T ,: Difference between molding temperature of semiconductor device and low temperature side during temperature cycle (° C)
ΔΤ2：半導体装置の成形温度とはんだ実装時ピーク温度との差 （°C) ΔΤ 2 : Difference between molding temperature of semiconductor device and peak temperature during solder mounting (° C)
24. 請求項 23に記載の封止材であって、 下記の一般式 (I) で表されるェポ キシ榭脂と無機質充填剤を含み、 無機質充填剤の含有量が全体の 82〜 90重量 %であり、 硬化後の特性が、 24. The sealing material according to claim 23, comprising an epoxy resin represented by the following general formula (I) and an inorganic filler, wherein the content of the inorganic filler is 82 to 90 in total. % By weight, and the properties after curing are
(1) 25°Cでの曲げ弾性係数が 26 GP a以下、  (1) The flexural modulus at 25 ° C is 26 GPa or less,
( 2 ) 半導体装置の成形温度から 25 °Cまでの平均熱膨張係数が 0.7 X 10— 5 /°C 以上、 (2) Average thermal expansion coefficient from the molding temperature of the semiconductor device up to 25 ° C is 0.7 X 10- 5 / ° C or more,
(3) 25。Cでの曲げ破 強度が 120 M P a以上、  (3) 25. Bending strength at C of 120 MPa or more,
(4) はんだ実装時ピーク温度における曲げ弾性係数が 65 OMPa以下、 (4) The flexural modulus at peak temperature during solder mounting is 65 OMPa or less,
( 5 ) 成形温度からはんだ実装時ピーク温度までの平均熱膨張係数が 5. 0X 1 0ー5ノで以下、 (5) average thermal expansion coefficient from the molding temperature to soldering peak temperature or less 5. 0X 1 0 -5 Bruno,
( 6 ) はんだ実装時ピーク温度でのィンナーリ一ドと封止材のせん断歪みエネル ギ一が 1. 35 X 10— 6N * m以上、 (6) shear strain energy formic one In'nari one de and the sealing material in the soldering peak temperature 1. 35 X 10- 6 N * m or more,
(7) はんだ実装時ピーク温度でのダイポンドパッドと封止材のせん断歪みエネ ルギ一が 6. 8 X 10—6N · m以上、 (7) shear strain energy conservation one die bond pad and the sealing material in the soldering peak temperature 6. 8 X 10- 6 N · m or more,
であることを特徴とする封止材 （一般式 （I) 中、 t一 Buは、 夕一シャリーブ チル基を示す） 。 . (In the general formula (I), t-Bu represents Yuichi Sharybutyl group). .
Figure imgf000044_0001
Figure imgf000044_0001
PCT/JP2001/008559 2000-09-29 2001-09-28 Resin-sealed semiconductor device, and die bonding material and sealing material for use therein WO2002027780A1 (en)

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US10/381,034 US6774501B2 (en) 2000-09-29 2001-09-28 Resin-sealed semiconductor device, and die bonding material and sealing material for use therein
KR10-2003-7004525A KR100535848B1 (en) 2000-09-29 2001-09-28 Resin-sealed Semiconductor Device, and Die Bonding Material and Sealing Material for Use Therein
AU2001290314A AU2001290314A1 (en) 2000-09-29 2001-09-28 Resin-sealed semiconductor device, and die bonding material and sealing materialfor use therein
JP2002531477A JP3702877B2 (en) 2000-09-29 2001-09-28 Resin-sealed semiconductor device, die-bonding material and sealing material used therefor

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JP2000-297835 2000-09-29
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JP2000311050 2000-10-11
JP2000-311050 2000-10-11
JP2000311047 2000-10-11
JP2000-311049 2000-10-11
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JP2009141030A (en) * 2007-12-05 2009-06-25 Nichia Corp Light emitting device
RU2705562C1 (en) * 2016-01-20 2019-11-08 Фабио ЛАРИЦЦА Modular system of electrical and electronic distribution on stages

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KR100541395B1 (en) * 2003-09-09 2006-01-11 삼성전자주식회사 Apparatus for stacking semiconductor chips on wafer, method using the apparatus, and semiconductor package manufactured thereby
JP4360240B2 (en) * 2004-03-22 2009-11-11 日立化成工業株式会社 Semiconductor device and multilayer substrate for semiconductor device
JP4421972B2 (en) * 2004-04-30 2010-02-24 日東電工株式会社 Manufacturing method of semiconductor devices
JP4255934B2 (en) * 2005-08-26 2009-04-22 シャープ株式会社 Semiconductor device and electronic device using the semiconductor device
JP2007214502A (en) * 2006-02-13 2007-08-23 Oki Electric Ind Co Ltd Semiconductor device and its manufacturing method
WO2008105169A1 (en) * 2007-02-28 2008-09-04 Sumitomo Bakelite Co., Ltd. Adhesive film for semiconductor and semiconductor device using the adhesive film
JP5245044B2 (en) * 2010-05-10 2013-07-24 日立化成株式会社 Epoxy resin composition for semiconductor encapsulation and semiconductor device using the same
US8796049B2 (en) * 2012-07-30 2014-08-05 International Business Machines Corporation Underfill adhesion measurements at a microscopic scale
US9196559B2 (en) 2013-03-08 2015-11-24 Taiwan Semiconductor Manufacturing Company, Ltd. Directly sawing wafers covered with liquid molding compound
CN113423753B (en) * 2019-02-21 2024-06-11 松下知识产权经营株式会社 Semiconductor packaging material and semiconductor device
CN111323432B (en) * 2020-03-23 2022-12-20 广东利扬芯片测试股份有限公司 Chip appearance defect recognition device and method and chip testing system and method

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JP2009070910A (en) * 2007-09-11 2009-04-02 Honda Motor Co Ltd Semiconductor device and its manufacturing method
JP2009141030A (en) * 2007-12-05 2009-06-25 Nichia Corp Light emitting device
RU2705562C1 (en) * 2016-01-20 2019-11-08 Фабио ЛАРИЦЦА Modular system of electrical and electronic distribution on stages

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KR20030038778A (en) 2003-05-16
JP3702877B2 (en) 2005-10-05
CN1466774A (en) 2004-01-07
CN1269198C (en) 2006-08-09
US6774501B2 (en) 2004-08-10
US20040000728A1 (en) 2004-01-01
KR100535848B1 (en) 2005-12-12
JPWO2002027780A1 (en) 2004-02-05
AU2001290314A1 (en) 2002-04-08

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