WO2002009151A2

WO2002009151A2 - Magnetoresistive structure

Info

Publication number: WO2002009151A2
Application number: PCT/US2001/022658
Authority: WO
Inventors: Jamal Ramdani; Kurt Eisenbeiser; Ravindranath Droopad; Jeffrey M. Finder
Original assignee: Motorola, Inc.
Priority date: 2000-07-24
Filing date: 2001-07-18
Publication date: 2002-01-31
Also published as: AU2001276979A1; TW503459B; WO2002009151A3

Abstract

Magnetoresistive materials can be grown overlying a semiconductor substrate (22) by first growing an accommodating buffer layer (24) on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer (28) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Description

MAGNETORESISTIVE STRUCTURE

Field of the Invention

This invention relates generally to magnetoresistive devices and to a method for their fabrication, and more specifically to colossal magnetoresistive devices and a method for their fabrication, and even more specifically to a structure and process for monolithically integrating colossal magnetoresistive materials with a semiconductor substrate .

Background of the Invention

The electrical resistance in a class of materials called perovskites can be reduced by nearly 10,000 times in the presence of a magnetic field. This effect, known as colossal magnetoresistance (CMR) , occurs at temperatures near 250 K where the material's electrical resistance suddenly plummets. The most widely known CMR materials contain a manganese atom at the centre of each cubic perovskite structure (e.g., a compound of lanthanum, calcium, manganese and oxygen) . However, in recent years CMR has been found in other compounds such as pyrochlores, chalcogenides spinels and silver chalcogenides . Because CMR materials respond so strongly to magnetic fields, they typically make good magnetic field sensors for use in, among other things, computers (e.g., read/write heads for computer disc drives) . Information is stored on computer disc drives in patterns of microscopic magnetized regions. To retrieve this information, read heads detect the regions of magnetization on the spinning disc and change their electrical resistance accordingly. The heads that use magnetoresistance operate faster and better than traditional "inductive read heads" and thus allow for increased information storage on a disc. For example, disc drives having CMR material heads can store about 16 billion bits of information per disc drive. Presently, CMR material suitable for electronic devices is typically grown on oxide substrates such as strontium titanium oxide and lanthanum aluminum oxide. Semiconductor discrete devices and integrated circuits are typically fabricated from silicon, at least in part because of the availability of inexpensive, high quality monocrystalline silicon substrates. Integration of a CMR sensor and a silicon based integrated circuit is difficult, expensive and labor extensive. Current techniques of integration include gluing the oxide substrate to the silicon substrate or alternatively, incorporating a chip-to-chip connection between the oxide substrate and the silicon substrate. If a layer of CMR material could be realized on a bulk wafer such as a silicon wafer, monolithic integration of magnetoresistive devices and silicon-based integrated circuitry could be achieved.

Accordingly, a need exists for a magnetoresistive structure, and in particular a CMR structure, and process that provides monolithic integration of magnetoresistive materials on a silicon substrate.

Brief Description of the Drawings

The present invention is illustrated by way of example and not limitation in the accompanying figures, in which like references indicate similar elements, and in which: FIGS. 1, 2, 4-6 illustrate schematically, in cross section, device structures in accordance with various embodiments of the invention; and

FIG. 3 illustrates graphically the relationship between maximum attainable film thickness and lattice mismatch between a host crystal and a grown crystalline overlayer .

Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.

Detailed Description of the Drawings

FIG. 1 illustrates schematically, in cross section, a portion of a magnetoresistive structure 20 in accordance with an embodiment of the invention. Magnetoresistive structure 20 includes a monocrystalline substrate 22, an accommodating buffer layer 24 comprising a monocrystalline material, and a layer 26 of a magnetoresistive material. In this context, the term "monocrystalline" shall have the meaning commonly used within the semiconductor industry. The term shall refer to materials that are a single crystal or that are substantially a single crystal and shall include those materials having a relatively small number of defects such as dislocations and the like as are commonly found in substrates of silicon or germanium or mixtures of silicon and germanium and epitaxial layers of such materials commonly found in the semiconductor industry . In accordance with one embodiment of the invention, structure 20 also includes an amorphous interface layer 28 positioned between substrate 22 and accommodating buffer layer 24. Structure 20 may also include a template layer 30 between the accommodating buffer layer 24 and magnetoresistive layer 26. As will be explained more fully below, the template layer helps to initiate the growth of the magnetoresistive layer on the accommodating buffer layer. The amorphous intermediate layer helps to relieve the strain in the accommodating buffer layer and by doing so, aids in the growth of a high crystalline quality accommodating buffer layer.

Substrate 22, in accordance with an embodiment of the invention, is a monocrystalline semiconductor wafer, preferably of large diameter. The wafer can be of a material from Group IV of the periodic table, and preferably a material from Group IVA. Examples of Group IV semiconductor materials include silicon, germanium, mixed silicon and germanium, mixed silicon and carbon, mixed silicon, germanium and carbon, and the like.

Preferably substrate 22 is a wafer containing silicon or germanium, and most preferably is a high quality monocrystalline silicon wafer as used in the semiconductor industry. Accommodating buffer layer 24 is preferably a monocrystalline oxide or nitride material epitaxially grown on the underlying substrate . In accordance with one embodiment of the invention, amorphous intermediate layer 28 is grown on substrate 22 at the interface between substrate 22 and the growing accommodating buffer layer by the oxidation of substrate 22 during the growth of layer 24. The amorphous intermediate layer serves to relieve strain that might otherwise occur in the monocrystalline accommodating buffer layer as a result of differences in the lattice constants of the substrate and the buffer layer. As used herein, lattice constant refers to the distance between atoms of a cell measured in the plane of the surface. If such strain is not relieved by the amorphous intermediate layer, the strain may cause defects in the crystalline structure of the accommodating buffer layer. Defects in the crystalline structure of the accommodating buffer layer, in turn, would make it difficult to achieve a high quality crystalline structure in monocrystalline magnetoresistive layer 26.

Accommodating buffer layer 24 is preferably a material selected for its crystalline compatibility with the underlying substrate and with the overlying magnetoresistive material. For example, the material could be an oxide or nitride having a lattice structure matched to the substrate and to the subsequently applied magnetoresistive material . Materials that are suitable for the accommodating buffer layer include metal oxides such as the alkaline earth metal titanates, alkaline earth metal zirconates, alkaline earth metal haf ates, alkaline earth metal tantalates, alkaline earth metal ruthenates, alkaline earth metal niobates, alkaline earth metal vanadates, perovskite oxides such as alkaline earth metal tin-based perovskites, lanthanum aluminate, lanthanum scandium oxide, and gadolinium oxide. Additionally, various nitrides such as gallium nitride, aluminum nitride, and boron nitride may also be used for the accommodating buffer layer. Most of these materials are insulators, although strontium ruthenate, for example, is a conductor. Generally, these materials are metal oxides or metal nitrides, and more particularly, these metal oxide or nitrides typically include at least two different metallic elements. In some specific applications, the metal oxides or nitride may include three or more different metallic elements.

Amorphous interface layer 28 is preferably an oxide formed by the oxidation of the surface of substrate 22, and more preferably is composed of a silicon oxide. The thickness of layer 28 is sufficient to relieve strain attributed to mismatches between the lattice constants of substrate 22 and accommodating buffer layer 24.

Typically, layer 28 has a thickness in the range of approximately 0.5-5 nm.

The magnetoresistive material of layer 26 can be selected, as needed for a magnetoresistive structure, from any of the materials known to respond strongly to magnetic fields. In general, magnetoresistive materials are classified as either giant magnetoresistive (GMR) or colossal magnetoresistive (CMR) depending on the amount of change in electrical resistance. For example, a change in resistance greater than 50% under an applied magnetic field is generally considered CMR. Examples of CMR materials include perovskite compounds such as lanthanum calcium manganese oxide (LaCaMn0₃) , and the like. The magnetoresistive material composition can be generally characterized as perovskite (A^B.^) C0₃ , where A may be lanthanum or neodymuium, and 0 ≥ x < 1; B may be strontium, barium, calcium or lead, C may be manganese or a manganese compound such as manganese cobalt (Mn_yCO_j ) where 0 > y < 1, and manganese nickel (Mn-Ni^ where 0 > z

< 1. CMR perovskite materials are described herein but are not intended to limit the scope of suitable magnetoresistive materials. For example, GMR materials may be used or other compounds which may be discovered to have magnetoresistive characteristics (e.g., pyrochlores, chalcogenide spinels and silver chalcogenides) . Magnetoresistive layer 26 typically has a thickness in the range of approximately 10 nm - 1000 nm.

Suitable template materials chemically bond to the surface of accommodating buffer layer 24 at selected sites and provide sites for the nucleation of the epitaxial growth of the subsequent magnetoresistive layer 26. For example, template layer 30 is preferably 1-10 monolayers of strontium, barium, calcium or lead and oxygen (Sr-0, Ba-0, Ca-0, Pb-O) . Any of these form an appropriate template for deposition and formation of a preferably monocrystalline CMR layer.

FIG. 2 illustrates, in cross section, a portion of a magnetoresistive structure 40 in accordance with a further embodiment of the invention. Structure 40 is similar to the previously described magnetoresistive structure 20, except that an additional buffer layer 32 is positioned between accommodating buffer layer 24 and magnetoresistive material layer 26 of preferably monocrystalline CMR. Specifically, the additional buffer layer is positioned between template layer 30 and the overlying layer of CMR material. The additional buffer layer, formed of a monocrystalline oxide, serves to provide a lattice compensation when the lattice constant of the accommodating buffer layer cannot be adequately matched to the overlying monocrystalline magnetoresistive material layer.

FIG. 3 illustrates graphically the relationship of the achievable thickness of a grown crystal layer of high crystalline quality as a function of the mismatch between the lattice constants of the host crystal and the grown crystal. Curve 42 illustrates the boundary of high crystalline quality material. The area to the right of curve 42 represents layers that has a large number of defects. With no lattice mismatch, it is theoretically possible to grow an infinitely thick, high quality epitaxial layer on the host crystal . As the mismatch in lattice constants increases, the thickness of achievable, high quality crystalline layer decreases rapidly. As a reference point, for example, if the lattice constants between the host crystal and the grown layer are mismatched by more than about 2%, monocrystalline epitaxial layers in excess of about 20 nm are not desirable due to high density dislocation defects. FIG. 4 illustrates schematically, a magnetoresistive structure 50 in accordance with another embodiment of the invention. Structure 50 includes a monocrystalline semiconductor substrate 52 such as a monocrystalline silicon wafer that includes a region 53 and a region 54. An electrical component schematically illustrated by a dashed line 56 is formed in at least a part of region 53 using conventional silicon device processing techniques commonly used in the semiconductor industry. Electrical component 56 can be a resistor, a capacitor, an active semiconductor component such as a diode or a transistor or an integrated circuit such as a CMOS integrated circuit. A layer of an insulating material 58 such as a layer of silicon dioxide or the like may overlie electrical component 56. Insulating material 58 and any other layers that may have been formed or deposited during the processing of component 56 in region 53 are removed from the surface of region 54 to provide a bare silicon surface in that region. As is well known, bare silicon surfaces are highly reactive and a native silicon oxide layer can quickly form on the bare surface . A layer of barium or barium and oxygen is deposited onto the native oxide layer on the surface of region 54 and is reacted with the oxidized surface to form a first template layer (not shown) . In accordance with one embodiment of the invention a monocrystalline oxide layer 62 is formed overlying the template layer by a process of molecular beam epitaxy. Reactants including strontium, baruim, titanium and oxygen are deposited onto the template layer to form monocrystalline oxide layer 62. Initially during the deposition the partial pressure of oxygen is kept near the minimum necessary to fully react with the strontium or barium and titanium to form the monocrystalline strontium titanate or barium titanate layer. The partial pressure of oxygen is then increased to provide an overpressure of oxygen and to allow oxygen to diffuse through the growing monocrystalline oxide layer 62. The oxygen diffusing through the titanate layer reacts with silicon at the surface of region 54 to form an amorphous layer of silicon oxide 61 at the interface between the silicon substrate and the monocrystalline oxide.

In accordance with an embodiment of the invention, the step of depositing the monocrystalline oxide layer is terminated by depositing a second template layer 60, of

Ba-O, Sr-0, Ca-0 or Pb-O. A magnetoresistive layer 64 of preferably monocrystalline CMR material is then deposited overlying the second template layer by a process of, for example, molecular beam epitaxy. In accordance with another embodiment of the invention, the monocrystalline accommodating buffer titanate layer and the silicon oxide layer are exposed to an anneal process such that the titanate and oxide layers form an amorphous oxide layer (not shown) . A magnetic sensor generally indicated by a dashed line 68 is formed at least partially in layer 6 . In accordance with one embodiment of the invention, sensor 68 may include a magnetic memory read device or resistive head used for detecting magnetized regions on an information disc. Sensor 68 may be interconnected to itself (not shown) or alternatively, a conductor schematically indicated by a line 70 can be formed to electrically couple component 56 and sensor 68, thus implementing an integrated device that includes at least one component formed in the silicon substrate and one sensor device formed in the magnetoresistive material.

Although illustrative structure 50 has been described as a structure formed on a silicon substrate 52 and having a strontium (or barium) titanate layer 62 and a preferably monocrystalline CMR layer 64, similar devices can be fabricated using other monocrystalline substrates, oxide layers and magnetoresistive material layers as described elsewhere in this disclosure or generally known in the industry.

Referring again to FIGS. 1 and 2, substrate 22 is a monocrystalline substrate such as a monocrystalline silicon substrate. The crystalline structure of the monocrystalline substrate is characterized by a lattice constant and by a lattice orientation. In similar manner, accommodating buffer layer 24 is also a monocrystalline material and the lattice of that monocrystalline material is characterized by a lattice constant and a crystal orientation. The lattice constants of the accommodating buffer layer and the monocrystalline substrate must be closely matched or, alternatively, must be such that upon rotation of one crystal orientation with respect to the other crystal orientation, a substantial match in lattice constants is achieved. In this context the terms "substantially equal" and "substantially matched" mean that there is sufficient similarity between the lattice constants to permit the growth of a high quality crystalline layer on the underlying layer (e.g., within 2%) . In accordance with one embodiment of the invention, substrate 22 is a (100) or (111) oriented monocrystalline silicon wafer and accommodating buffer layer 24 is a layer of strontium barium titanate (e.g., Sr_zBa₁__zTi0₃ where z ranges from 0 to 1) . Substantial matching of lattice constants between these two materials is achieved by rotating the crystal orientation of the titanate material by 45° with respect to the crystal orientation of the silicon substrate wafer. The inclusion in the structure of amorphous interface layer 28, a silicon oxide layer in this example, if it is of sufficient thickness, serves to reduce strain in the titanate monocrystalline layer that might result from any mismatch in the lattice constants of the host silicon wafer and the grown titanate layer. As a result, in accordance with an embodiment of the invention, a high quality, thick, monocrystalline titanate layer is achievable .

Still referring to FIGS. 1 and 2, layer 26 is a layer of epitaxially grown preferably monocrystalline CMR material and that crystalline material is also characterized by a crystal lattice constant and a crystal orientation. In accordance with one embodiment of the invention, the lattice constant of layer 26 differs from the lattice constant of substrate 22. To achieve high crystalline quality in this epitaxially grown preferably monocrystalline layer, the accommodating buffer layer must be of high crystalline quality. In addition, in order to achieve high crystalline quality in layer 26, substantial matching between the crystal lattice constant of the host crystal, in this case, the monocrystalline accommodating buffer layer, and the grown crystal is desired. With properly selected materials this substantial matching of lattice constants is achieved as a result of rotation of the crystal orientation of the grown crystal with respect to the orientation of the host crystal. In some instances, a crystalline buffer layer between the host oxide and the grown magnetoresistive layer can be used to reduce strain in the grown magnetoresistive layer that might result from small differences in lattice constants. Better crystalline quality in the grown CMR layer can thereby be achieved (i.e., high crystalline quality in the CMR layer provides a bigger percentage change) .

FIG. 5 illustrates schematically, in cross section, a portion of a magnetoresistive structure 72 in accordance with a further embodiment of the invention.

Magnetoresistive structure 72 is similar to the previously described magnetoresistive structure 20, expect that a compound semiconductor layer 74 is epitaxially grown overlying the magnetoresistive layer 26. The compound semiconductor material of layer 74 can be selected, as needed for a particular semiconductor structure, from any of the Group IIIA and VA elements (III-V semiconductor compounds), mixed III-V compounds, Group II (A or B) and VIA elements (II-VI semiconductor compounds) , and mixed II-VI compounds. Examples include gallium arsenide (GaAs) , gallium indium arsenide (GalnAs) , gallium aluminum arsenide (GaAlAs) , indium phosphide (InP) , cadmium sulfide (CdS) , cadmium mercury telluride (CdHgTe) , zinc selenide (ZnSe) , zinc sulfer selenide (ZnSSe) , and the like. In accordance with a further embodiment of the invention, semiconductor layer 74 is preferably thick enough to form devices within the layer. A semiconductor component , generally indicated by a dashed line 76 is formed at least partially in compound semiconductor layer 74. Semiconductor component 76 can be formed by processing steps conventionally used in the fabrication of gallium arsenide or other III-V compound semiconductor material devices (e.g., electronic devices such as, field effect transistors (FETs) , heterojunction bipolar transistors (HBTs) , photonic devices including light emitting diodes (LEDs) , laser diodes, and detectors.

In accordance with yet another embodiment of the invention, the compound semiconductor layer maybe epitaxially grown overlying the accommodating buffer layer and underlying the magnetoresistive layer (embodiment not shown) . In this embodiment, appropriate template materials are selected which will chemically bond to the surface of the accommodating buffer layer at selected sites and provide sites for nucleation of the epitaxial growth of the subsequent compound semiconductor layer. Accordingly, the compound semiconductor layer may suitably include any of the semiconductor devices previously discussed. In accordance with the present embodiment, prior to growing the magnetoresistive material atop the compound semiconductor layer, a portion of the semiconductor layer is removed (e.g., etched away) to expose the accommodating buffer layer. Thereby allowing the magnetoresistive top layer to "dip down" into the compound semiconductor layer (embodiment not shown) .

FIG. 6 illustrates schematically, in cross section, a portion of a magnetoresistive structure 78 in accordance with yet another embodiment of the invention. Structure 78 is similar to the previously described magnetoresistive structure 72, except that compound semiconductor layer 74 is side by side with magnetoresistive layer 26. Magnetoresistive layer 26 is formed in substantially the same manner as previously disclosed. The template material of template layer 30 is appropriate chosen to provide for the epitaxial growth of magnetoresistive layer 26. Once layer 26 is grown, a portion of the layer is etched backed to expose layer 24. A suitable compound semiconductor material (including any of the previously discussed) is selectively epitaxially grown over the exposed area to form semiconductor layer 74.

Alternatively, because the thermal budgets for the compound semiconductor material and the magnetoresistive material are substantially the same, the order of deposition of layers may be reversed (i.e., semiconductor layer 74 can be deposited, etched away, and then magnetoresistive layer 26 grown) .

The following example illustrates a process, in accordance with one embodiment of the invention, for fabricating a magnetoresistive structure such as the structures depicted in FIGS. 1-6. The process starts by providing a monocrystalline semiconductor substrate comprising silicon or germanium. In accordance with a preferred embodiment of the invention, the semiconductor substrate is a silicon wafer having a (100) orientation. The substrate is preferably oriented on axis or, at most, about 0.5° off axis. At least a portion of the semiconductor substrate has a bare surface, although other portions of the substrate, as described below, may encompass other structures. The term "bare" in this context means that the surface in the portion of the substrate has been cleaned to remove any oxides, contaminants, or other foreign material. As is well known, bare silicon is highly reactive and readily forms a native oxide. The term "bare" is intended to encompass such a native oxide. A thin silicon oxide may also be intentionally grown on the semiconductor substrate, although such a grown oxide is not essential to the process in accordance with the invention. In order to epitaxially grow a monocrystalline oxide layer overlying the monocrystalline substrate, the native oxide layer must first be removed to expose the crystalline structure of the underlying substrate. The following process is preferably carried out by molecular beam epitaxy (MBE) , although other epitaxial processes may also be used in accordance with the present invention. The native oxide can be removed by first thermally depositing a thin layer of strontium, barium, a combination of strontium and barium, or other alkali earth metals or combinations of alkali earth metals in an MBE apparatus . In the case where strontium is used, the substrate is then heated to a temperature of about 800° C to cause the strontium to react with the native silicon oxide layer. The strontium serves to reduce the silicon oxide to leave a silicon oxide-free surface. The resultant surface, which exhibits an ordered 2x1 structure, includes strontium, oxygen, and silicon. The ordered 2x1 structure forms a template for the ordered growth of an overlying layer of a monocrystalline oxide. The template provides the necessary chemical and physical properties to nucleate the crystalline growth of an overlying layer.

In accordance with an alternate embodiment of the invention, the native silicon oxide can be converted and the substrate surface can be prepared for the growth of a monocrystalline oxide layer by depositing an alkali earth metal oxide, such as strontium oxide, strontium barium oxide, or barium oxide, onto the substrate surface by MBE at a low temperature and by subsequently heating the structure to a temperature of about 800°C. At this temperature a solid state reaction takes place between the strontium oxide and the native silicon oxide causing the reduction of the native silicon oxide and leaving an ordered 2x1 structure with strontium, oxygen, and silicon remaining on the substrate surface. Again, this forms a template for the subsequent growth of an ordered monocrystalline oxide layer. Following the removal of the silicon oxide from the surface of the substrate, in accordance with one embodiment of the invention, the substrate is cooled to a temperature in the range of about 200-800°C and a layer of strontium titanate is grown on the template layer by molecular beam epitaxy. The MBE process is initiated by opening shutters in the MBE apparatus to expose strontium, titanium and oxygen sources . The ratio of strontium and titanium is approximately 1:1. The partial pressure of oxygen is initially set at a minimum value to grow stochiometric strontium titanate at a growth rate of about 0.3-0.5 nm per minute. After initiating growth of the strontium titanate, the partial pressure of oxygen is increased above the initial minimum value. The overpressure of oxygen causes the growth of an amorphous silicon oxide layer at the interface between the underlying substrate and the growing strontium titanate layer. The growth of the silicon oxide layer results from the diffusion of oxygen through the growing strontium titanate layer to the interface where the oxygen reacts with silicon at the surface of the underlying substrate. The strontium titanate grows as an ordered monocrystal with the crystalline orientation rotated by 45° with respect to the ordered 2x1 crystalline structure of the underlying substrate. Strain that otherwise might exist in the strontium titanate layer because of the small mismatch in lattice constant between the silicon substrate and the growing crystal is relieved in the amorphous silicon oxide intermediate layer. The accommodating buffer layer can have a thickness of about 2 to 100 nanometers (nm) and preferably has a thickness greater than about 5 nm. The amorphous intermediate layer of silicon oxide can have a thickness of about 0.5-5 nm, and preferably a thickness of about 1.5-2.5 nm.

After the strontium titanate layer has been grown to the desired thickness, the monocrystalline strontium titanate is capped by a template layer that is conducive to the subsequent growth of an epitaxial layer of a desired magnetoresistive material . Following the formation of the template, magnetoresistive material

(e.g., CMR)' is subsequently grown by MBE in a similar manner as described above.

The structure illustrated in FIG. 2 can be formed by the process discussed above with the addition of an additional buffer layer deposition step. The buffer layer is formed overlying the template layer before the deposition of the monocrystalline magnetoresistive layer. If the buffer layer is a superlattice (e.g., (LaMn0₃)₃ / SrMn0₃) , such a superlattice can be deposited, by MBE for example, on the template described above. Other suitable examples for the buffer layer include SrMn0₃ and LaMn0₃. The process described above illustrates a process for forming a magnetoresistive structure including a silicon substrate, an overlying oxide layer, and a monocrystalline magnetoresistive layer by. the process of molecular beam epitaxy. The process can also be carried out by the process of chemical vapor deposition (CVD) , metal organic chemical vapor deposition (MOCVD) , migration enhanced epitaxy (MEE) , atomic layer epitaxy (ALE) , physical vapor deposition (PVD) , chemical solution deposition (CSD) , pulsed laser deposition (PLD) , or the like. Further, by a similar process, other monocrystalline accommodating buffer layers such as alkaline earth metal titanates, zirconates, hafnates, tantalates, vanadates, ruthenates, and niobates, peroskite oxides such as alkaline earth metal tin-based perovskites, lanthanum aluminate, lanthanum scandium oxide, and gadolinium oxide can also be grown. Further, by a similar process such as MBE, other

III-V and II-VI monocrystalline compound semiconductor layers can be deposited overlying the monocrystalline magnetoresistive layer.

Each of the variations of magnetoresistive materials and monocrystalline oxide accommodating buffer layer uses an appropriate template for initiating the growth of the magnetoresistive layer. In the foregoing specification, the invention has been described with reference to specific embodiments . However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of present invention. Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and any element (s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential features or elements of any or all the claims. As used herein, the terms "comprises," "comprising, " or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.

Claims

1. A magnetoresistive device structure comprising:

a monocrystalline semiconductor substrate;

a layer of monocrystalline insulating material epitaxially grown overlying the substrate; and

a layer of magnetoresistive material epitaxially grown overlying the layer of monocrystalline insulating material .

2. The structure of claim 1 wherein the substrate comprises silicon.

3. The structure of claim 1 wherein the layer of monocrystalline insulating material comprises a material selected from the group consisting of metal oxides and metal nitrides.

4. The structure of claim 3 wherein the layer of monocrystalline insulating material comprises a material selected from the group consisting of alkali earth metal titanates, zirconates, hafnates, tantalates, ruthenates, niobates and vanadates, tin based perovskites, lanthanum aluminate, lanthanum scandium oxide, gadolinium oxide, gallium nitride, and aluminum nitride.

5. The structure of claim 3 wherein the layer of magnetoresistive material comprises a manganite perovskite .

6. The structure of claim 3 wherein the layer of magnetoresistive material comprises a material having a composition ( ^B^) C0₃ where A is selected from the group consisting of lanthanum and neodymium, B is selected from the group consisting of strontium, barium, calcium, and lead and x ranges from 0 to 1, and C is selected from the group consisting of Mn, (M^Co^) where y is greater than zero and less than or equal to 1, and (Mn_zNi_x._z) where z is greater than 0 and equal to or less than 1.

7. The structure of claim 6 further comprising a template layer overlying the layer of monocrystalline insulating material.

8. The structure of claim 7 wherein the template layer comprises a layer comprising B-0 terminating the layer of monocrystalline insulating material.

9. The structure of claim 8 wherein the template layer has a thickness of 1 - 10 monolayers .

10. The structure of claim 9 further comprising an amorphous oxide layer formed underlying the layer of monocrystalline insulating material.

11. The structure of claim 1 further comprising an amorphous oxide layer formed underlying the layer of monocrystalline insulating material.

12. The structure of claim 1 further comprising an integrated logic element formed at least partially in the substrate.

13. The structure of claim 12 further comprises a magnetic sensor formed at least partially in the layer of magnetoresistive material.

14. The structure of claim 13 wherein the magnetic sensor comprises a memory element.

15. The structure of claim 13 further comprising an interconnection formed between and electrically interconnecting the integrated logic element and the memory element .

16. The structure of claim 1 further comprising a compound semiconductor layer formed overlying the layer of magnetoresistive material.

17. The structure of claim 16 further comprising a semiconductor device formed at least partially in the compound semiconductor layer.

18. The structure of claim 1 further comprising a compound semiconductor layer formed overlying the layer of monocrystalline insulating material.

19. The structure of claim 18 further comprising a semiconductor device formed at least partially in the compound semiconductor layer.

20. The structure of claim 1 wherein the layer of magnetoresistive material comprises a monocrystalline layer .

21. The structure of claim 1 wherein the layer of magnetoresistive material comprises a layer of material having an ordered crystalline structure.

22. An integrated magnetoresistive device structure comprising:

a monocrystalline silicon substrate;

a CMOS circuit formed at least partially in the substrate;

a monocrystalline alkali earth metal oxide layer epitaxially grown overlying a portion of the substrate;

an amorphous silicon oxide layer formed underlying the monocrystalline alkali earth metal oxide layer;

a layer of magnetoresistive material epitaxially grown overlying the monocrystalline alkali earth metal oxide layer;

a magnetoresistive sensor device formed at least partially in the layer of magnetoresistive material; and

an interconnection electrically coupling the CMOS circuit and the magnetoresistive sensor device.

23. The device structure of claim 22 wherein the monocrystalline alkali earth metal oxide layer comprises Sr_gBa^_gTiO_a where g ranges from 0 to 1.

24. The device structure of claim 23 wherein the monocrystalline alkali earth metal oxide layer comprises a layer having a thickness greater than about 5nm.

25. The device structure of claim 23 wherein the layer of magnetoresistive material comprises a material having a composition (A_XB₁._X) C0₃ where A is selected from the group consisting of lanthanum and neodymium, B is selected from the group consisting of strontium, barium, calcium, and lead and x ranges from 0 to 1, and C is selected from the group consisting of Mn, (Mn_yCo₁__y) where y is greater than zero and less than or equal to 1, and (M^Ni^) where z is greater than 0 and equal to or less than 1.

26. The structure of claim 25 further comprising a template layer overlying the layer of monocrystalline insulating material .

27. The structure of claim 26 wherein the template layer comprises a layer comprising B-O terminating the layer of monocrystalline insulating material.

28. The structure of claim 27 wherein the template layer has a thickness of 1 - 10 monolayers .

29. The structure of claim 25 wherein the template comprises a monolayer of strontium and oxygen.

30. The structure of claim 22 wherein the layer of magnetoresistive material comprises a monocrystalline layer.

31. The structure of claim 22 wherein the layer of magnetoresistive material comprises a layer having an ordered crystalline structure.

32. The structure of claim 22 wherein the magnetoresistive sensor device comprises a magnetic memory read or write device.

33. The structure of claim 22 wherein the layer of magnetoresistive material- comprises a material capable of exhibiting colossal magnetoresistivy properties .

34. The structure of claim 22 further comprising a layer of monocrystalline compound semiconductor material epitaxially grown overlying the monocrystalline alkali earth metal oxide layer.

35. A process for fabricating a magnetoresistive device structure comprising the steps of:

providing a semiconductor substrate having a first lattice constant and first orientation;

epitaxially growing a first layer of monocrystalline material overlying the substrate, the first layer having a strain and characterized by a second lattice constant;

forming a strain relief layer underlying the first layer to relieve the strain in the first layer; and

epitaxially growing a second layer overlying the first layer, the second layer capable of exhibiting magnetoresistive properties and lattice matched to the first layer.

36. The process of claim 35 wherein the step of epitaxially growing a first layer comprises the step of epitaxially growing a monocrystalline material having a crystalline orientation rotated with respect to the first orientation.

37. The process of claim 36 wherein the step of epitaxially growing a first layer comprises growing a monocrystalline material comprising a second lattice constant, with rotation, matched within about two percent to the first lattice constant.

38. The process of claim 35 further comprising the step of forming a template layer overlying the first layer .

39. The process of claim 38 wherein the step of epitaxially growing a first layer comprises the step of epitaxially growing by a process selected from the group consisting of MBE, MOCVD, MEE, CVD, PVD, PLD, CSD and ALE.

40. The process of claim 39 wherein the step of forming a first layer comprises the step of growing a layer comprising a material selected from the group consisting of alkali earth metal titanates, zironconates, hafnates, tantalates, ruthenates, niobates and vanadates, tin based perovskites, lanthanum aluminate, lanthanum scandium oxide, gadolinium oxide, gallium nitride, and aluminum nitride .

41. The process of claim 39 wherein the step of epitaxially growing a second layer comprises the step of epitaxially growing by a process selected from the group consisting of MBE, MOCVD, MEE, CVD, PVD, PLD, CSD and ALE.

42. The process of claim 41 wherein the step of epitaxially growing a second layer comprises the step of growing a layer of magnetoresistive material comprising (A_xB._^) C0₃ where A is selected from the group consisting of lanthanum and neodymium, B is selected from the group consisting of strontium, barium, calcium, and lead and x ranges from 0 to 1, and C is selected from the group consisting of Mn, (Mn_yCo^_y) where y is greater than zero and less than or equal to 1, and (Mn-Ni^ where z is greater than 0 and equal to or less than 1.

43. The process of claim 42 wherein the process of forming a template layer comprises the step of terminating the growth of the first layer with 1 - 10 monolayers of oxygen and a material selected from the group consisting of strontium, barium, calcium and lead.

44. The process of claim 42 further comprising the step of forming a magnetoresistive sensor at least partially in the second layer.

45. The process of claim 35 further comprising the step of forming a CMOS circuit at least partially in the substrate .

46. The process of claim 35 further comprising the step of epitaxially growing a third monocrystalline layer comprising a compound semiconductor material overlying the second layer.

47. The process of claim 35 further comprising the steps of;

removing a portion of the second layer to expose a portion of the first layer; and

epitaxially growing a third layer comprising a compound semiconductor material overlying the portion of the first layer.

48. The process of claim 35 further comprising the steps of:

epitaxially growing a third monocrystalline layer comprising a compound semiconductor material overlying the first layer; and

removing a portion of the third layer to expose a portion of the first layer prior to the step of epitaxially growing a second layer.

49. A process for fabricating a magnetoresistive device structure comprising the steps of:

providing a monocrystalline silicon substrate;

forming an integrated circuit at least partially in the silicon substrate;

epitaxially growing a monocrystalline oxide layer overlying the silicon substrate,

forming an amorphous oxide layer underlying the monocrystalline oxide layer during the growth of the monocrystalline oxide layer;

terminating the step of epitaxially growing a monocrystalline oxide by forming a template layer;

epitaxially growing a layer of magnetoresistive material overlying the template layer;

forming a magnetoresistive device at least partially in the layer of magnetoresistive material; and

forming an electrical interconnection between the integrated circuit and the magnetoresistive device.

50. The process of claim 49 wherein the step of epitaxially growing a monocrystalline oxide layer comprises the step of forming a layer of Sr_gBa₁._gTi0₃ where g ranges from 0 to 1 by a process selected from the group consisting of MBE, MOCVD, MEE, CVD, PVD, PLD, CSD and ALE.

51. The process of claim 50 wherein the step of forming an amorphous oxide layer comprises the step of maintaining an overpressure of oxygen during the step of epitaxially growing a monocrystalline oxide layer.

52. The process of claim 50 wherein the step of epitaxially growing a layer of magnetoresistive material comprises the step of epitaxially growing a layer comprising (A_XB₁._X) C0₃ where A is selected from the group consisting of lanthanum and neodymium, B is selected from the group consisting of strontium, barium, calcium, and lead and x ranges from 0 to 1, and C is selected from the group consisting of Mn, (Mn_yCo^_y) where y is greater than zero and less than or equal to 1, and (Mn^i^ where z is greater than 0 and equal to or less than 1 by a process selected from the group consisting of MBE, MOCVD, MEE, CVD, PVD, PLD, CSD and ALE.

53. The process of claim 52 wherein the step of forming a template layer comprises the step of terminating the growth of the monocrystalline oxide layer with 1 - 10 monolayers of oxygen and an element selected from strontium, barium, calcium, and lead.