WO2001097272A1 - A method for producing a pn-junction - Google Patents
A method for producing a pn-junction Download PDFInfo
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- WO2001097272A1 WO2001097272A1 PCT/SE2001/001313 SE0101313W WO0197272A1 WO 2001097272 A1 WO2001097272 A1 WO 2001097272A1 SE 0101313 W SE0101313 W SE 0101313W WO 0197272 A1 WO0197272 A1 WO 0197272A1
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000004065 semiconductor Substances 0.000 claims abstract description 89
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 38
- 238000010438 heat treatment Methods 0.000 claims abstract description 23
- 238000009792 diffusion process Methods 0.000 claims abstract description 18
- 229910052796 boron Inorganic materials 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 40
- 238000005530 etching Methods 0.000 claims description 12
- 239000000370 acceptor Substances 0.000 claims description 6
- 238000009740 moulding (composite fabrication) Methods 0.000 claims 7
- 230000001276 controlling effect Effects 0.000 claims 3
- 230000008901 benefit Effects 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 150000002829 nitrogen Chemical class 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- QHGVXILFMXYDRS-UHFFFAOYSA-N pyraclofos Chemical compound C1=C(OP(=O)(OCC)SCCC)C=NN1C1=CC=C(Cl)C=C1 QHGVXILFMXYDRS-UHFFFAOYSA-N 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000010561 standard procedure Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/0455—Making n or p doped regions or layers, e.g. using diffusion
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66136—PN junction diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8611—Planar PN junction diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
Definitions
- the present invention relates to a method for producing a pn- junction in a semiconductor layer of crystalline SiC for a semi- conductor device, in which a sub-layer of an n-type doped semiconductor layer of crystalline SiC is provided with acceptors in the form of boron atoms for making this sub-layer p-type doped, and in which said sub-layer is provided with a doping through boron atoms by supplying boron to the surface of said semicon- ductor layer and heating this layer at a temperature above 1400°C for a sufficient time for diffusion of boron atoms into said semiconductor layer for forming a p-type doped sub-layer therein, as well as a semiconductor device produced by using such a method.
- Such a method may be used for producing any type of semiconductor devices having a pn-junction, for instance diodes, thyris- tors and IGBT-s.
- Crystalstalline also includes a poly-crystalline structure, in which larger regions of the material are mono-crys- talline. However, it is mostly preferred that a mono-crystalline structure having no defects is provided, although that is in the practice not achievable.
- SiC Semiconductor devices of SiC are in particular interesting for ap- plications in which it is possible to benefit from the superior properties of SiC in comparison with especially Si, namely the capability of SiC to work well under extreme conditions.
- the large bandgap between the valence band and the conduction band of SiC makes devices fabricated from said material able to operate at high temperatures, namely up to 1000 K.
- SiC has also a high breakdown field strength, so that comparatively thin layers of SiC may hold very high voltages in a blocking state of a semiconductor device of SiC.
- the "toughness" of SiC also causes problems and put particular demands on the processing techniques used for producing semiconductor devices of SiC.
- the first consists in the introduction of p-type dopants into the crystal during the epitaxial growth thereof, preferably by Chemical Vapour Deposition. However, it has turned out that this option results in a crystal structure associated with on-state characteristics and blocking capabilities of the device desired to be improved.
- the other way to proceed involves implantation of the acceptors into the semi- conductor layer of crystalline SiC by using very high acceleration energies. A high temperature anneal is then required for making the dopants electrically active, but this also can result in an outdiffusion of the dopants from the SiC surface severely changing the implantation profile. Furthermore, a damage of the crystal is caused by the implantation.
- the object of the present invention is to provide a method of the type defined in the introduction making it possible to produce a pn-junction in a semiconductor layer of crystalline SiC and especially, but not exclusively, a diode of SiC while satisfying said desire.
- This object is according to the invention obtained by providing method which is started by etching a trench into said semiconductor layer of crystalline SiC followed by a supply of boron atoms to the surface of said semiconductor layer and said heating step for forming the pn-junction, a contact layer is applied over the entire surface of said semiconductor layer formed by said sub-layer, and finally said semiconductor layer is polished for removing such a thick layer thereof that the contact layer and the p-type sub-layer disappear except for in said trench for forming a restricted pn-junction in said semiconductor layer.
- the invention also relates to a method in which it is started by etching a trench into said semiconductor layer of crystalline SiC followed by a supply of boron atoms to the surface of said semiconductor layer and said heating step for forming the pn-junction, a contact layer is provided over a restricted surface region of said semiconductor layer including said trench, and said sublayer is etched away around said contact layer for forming a pn- junction substantially restricted to the area under said contact layer for creating a discrete semiconductor device.
- This also con- stitutes a very simple and cost efficient way to produce pn- junctions in SiC.
- the invention also relates to a method in which a contact layer is applied on a restricted surface region of said semiconductor layer after said heating step, and the p-type sub-layer created by said diffusion is etched away around said contact layer for sub- stantially restricting said sub-layer to the region under said contact layer for creating a discrete semiconductor device.
- the time of the duration of said heating is controlled for controlling the diffusion depth of boron atoms and thereby the distance of the pn- junction defined by the thickness of said sub-layer to the surface of said semiconductor layer.
- Another preferred embodiment pro- vides for a control of the temperature for controlling the same parameter, and it is of course possible to control said time and the temperature simultaneously.
- This is preferably combined with a control of the supply rate of boron to said semiconductor layer of crystalline SiC, for instance by controlling the partial pressure of boron gas in an atmosphere surrounding said semiconductor layer when arranging this in an owen or furnace and creating an atmosphere with a boron content in the inner space of the owen.
- said heating is carried out at a temperature of 1500-2500°C.
- Such high temperatures may be used for said diffusion, since SiC may withstand these temperatures, and the diffusion speed will increase with the temperature. It has turned out that this diffusion speed will be really commercially interesting when the temperature is above 1800°C.
- said heating is carried out for a time period of 1 -4 hours. It has turned out that this time period for said heating is suitable for obtaining the thickness of said p-type layer normally aimed at for semicon- ductor devices of SiC by using the temperature mentioned above. This thickness is according to another preferred embodiment of the invention 0,5-2 ⁇ m, which is suitable for semiconductor devices of SiC.
- said pn-junction is produced for a semiconductor device in the form of a pn-diode.
- This method is particularly adapted for the production of such semiconductor devices.
- the invention also relates to a semiconductor device of SiC produced by using a method according to any of the method claims of the present invention.
- the features and the advantages of such a device appear from the discussion above.
- Fig 1 is an enlarged very schematic view illustrating how boron atoms are deposited on a semiconductor layer of crystalline SiC in a method according to a preferred embodiment of the inven- tion
- Figs 2-4 illustrate different steps of a method for producing a pn- junction in a semiconductor layer of crystalline SiC for a semiconductor device according to a first preferred embodiment of the invention
- Figs 5-8 illustrate different steps of a method according to a second preferred embodiment of the invention.
- Figs 9-12 illustrate different steps of a method according to a third preferred embodiment of the invention.
- FIG 1 It is very schematically illustrated in Fig 1 how an atmosphere with boron content is provided inside an owen or a furnace above a semiconductor layer 1 of crystalline SiC being n-type doped.
- the SiC may be of any polytype and is preferably of 6 H or 4 H, but also other polytypes as 3 C are conceivable.
- the boron atoms 2 are very schematically indicated.
- the atmosphere and thereby also said semiconductor layer 1 is heated to a high temperature, namely above 1400°C, and preferably above 1800°C. The upper limit for said heating is 2500°C.
- the boron atoms will deposit on the surface 3 of the semiconductor layer 1 and mi- grate into the layer 1 as indicated by the arrows 4.
- the layer 1 has a moderate doping concentration of 5x10 13 -5x10 17 cm “3 , preferably of nitrogen (N). This nitrogen has been introduced during the epitaxial growth of the semiconductor layer 1 . Thus, it is necessary to provide a higher concentration of acceptors in a sub- layer of the semiconductor layer 1 for turning this sub-layer to p- type doped.
- the doping concentration of a sub-layer produced in this way may be influenced by controlling the partial pressure of boron in said atmosphere and thereby the surface concentration of dopants on the surface 2 of the layer 1.
- the diffusion process may also be influenced by adjusting the temperature inside the owen and the period of time for which the diffusion process is carried out.
- the thickness of the sublayer 5 is preferably 0,5-2 ⁇ m, which may be obtained by heating the layer 1 and the atmosphere above 1500°C for 1 -4 hours.
- the doping concentration of boron in said sub-layer 5 is preferably 5x10 17 -10 20 cm "3 .
- said first semiconductor layer also comprises a highly doped n-type layer 6 on the opposite side thereof with respect to the sub-layer 5 for forming a good contact to the contact layer of the device.
- the sub-layer 7 of the first layer 1 separating the layers 5 and 6 is preferably much thicker, for instance about 40 ⁇ m.
- a contact layer 8 is then applied on the sub-layer 5 followed by a mesa etching of said sub-layer 5 away around the contact layer for substantially restricting the sub-layer 5 to the region under said contact layer for created a discrete semiconductor device, namely in the form of a pn-diode as shown in Fig 4. It is obvious that the process for producing this diode also comprises other steps, which, however, will not be explained here, since they have nothing to do with the present invention.
- a contact layer is for instance to be applied next to the sub-layer 6. This device will have a very well ordered structure in the layers thereof, especially close to the pn-junction reducing the conduction losses thereof in the on-state and any leakage current in the blocking state of the device and raising the breakdown voltage of the device.
- Figs 5-8 illustrate a method according to another very advanta- geous embodiment of the present invention according to which in a first step a mesa etching of said semiconductor layer 1 is carried out for forming a trench 9 therein. This is followed by a diffusion step as described above for forming a sub-layer 5. A contact layer 8 is then applied over the entire sub-layer 5. Finally, it is illustrated in Fig 8 how the structure according to Fig 7 is polished for removing such a thick layer thereof that the contact layer and the p-type sub-layer disappear except for in said trench for forming a restricted pn-junction 10 in the semiconductor layer.
- FIGs 9-12 A method according to another preferred embodiment of the in- vention is illustrated in Figs 9-12, and this differs from the one according to Figs 5-8 by an application of the contact 8 only over a restricted surface region of the sub-layer 5. This is followed by a mesa etching for etching the sub-layer away around the contact layer for forming the pn-junction substantially restricted to the area under said contact layer for creating a discrete semiconductor device as shown in Fig 12.
- a semiconductor device of this type is particularly advantageous when high powers and/or high voltages and/or high currents are to be handled, since it is then possible to fully utilize the physical properties of SiC.
- a diode of the type illustrated in the Figures may preferably be used in for instance current valves in converter stations as free-wheeling diode reducing the number of such diodes to be connected in series for holding a certain volt- age in comparison to the use of diodes of for instance Si. Such a voltage may then well be in the order of 100-500 kV, and the diode may preferably hold a voltage above 2 kV, and most preferred above 10 kV.
- the defi- nition layer is to be interpreted broadly and comprises all types of volume extensions and shapes.
- etching andpolishing are to be interpreted broadly and comprise all types of material removal of the respective type.
- Etching may for example be etching by gas flows, for instance of H 2 , or etching by applying chemical solutions upon the layer in question or reactive ion etching.
- pn-junction and pn-diode are to be interpreted to also covering the case of a very low doping concentration of any of the layers next to the junction, so that this would often in the practice be called intrinsic.
- the diodes described above may for example just as well be called pin-diodes as a consequence of the low doping concentration of the n-type sub-layer 7.
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Abstract
A method for producing a pn-junction (10) in a semiconductor layer (1) of crystalline SiC for a semiconductor device comprises a step of supplying boron to the surface of said semiconductor layer and heating this layer at a temperature above 1500 °C for a sufficient period of time for diffusion of boron atoms into said semiconductor layer for forming a p-type doped sub-layer (5) therein. A contact layer (8) is applied on the p-type doped sub-layer (5).
Description
Applicant: ABB RESEARCH LTD
A METHOD FOR PRODUCING A PN-JUNCTION
TECHNICAL FIELD OF THE INVENTION AND PRIOR ART
The present invention relates to a method for producing a pn- junction in a semiconductor layer of crystalline SiC for a semi- conductor device, in which a sub-layer of an n-type doped semiconductor layer of crystalline SiC is provided with acceptors in the form of boron atoms for making this sub-layer p-type doped, and in which said sub-layer is provided with a doping through boron atoms by supplying boron to the surface of said semicon- ductor layer and heating this layer at a temperature above 1400°C for a sufficient time for diffusion of boron atoms into said semiconductor layer for forming a p-type doped sub-layer therein, as well as a semiconductor device produced by using such a method.
Such a method may be used for producing any type of semiconductor devices having a pn-junction, for instance diodes, thyris- tors and IGBT-s. "Crystalline" also includes a poly-crystalline structure, in which larger regions of the material are mono-crys- talline. However, it is mostly preferred that a mono-crystalline structure having no defects is provided, although that is in the practice not achievable.
Semiconductor devices of SiC are in particular interesting for ap- plications in which it is possible to benefit from the superior properties of SiC in comparison with especially Si, namely the capability of SiC to work well under extreme conditions. For in-
stance, the large bandgap between the valence band and the conduction band of SiC makes devices fabricated from said material able to operate at high temperatures, namely up to 1000 K. SiC has also a high breakdown field strength, so that comparatively thin layers of SiC may hold very high voltages in a blocking state of a semiconductor device of SiC. However, the "toughness" of SiC also causes problems and put particular demands on the processing techniques used for producing semiconductor devices of SiC.
Two ways of producing a p-type doped sub-layer of said type for producing a pn-junction in a semiconductor layer of crystalline SiC have primarily been used so far. The first consists in the introduction of p-type dopants into the crystal during the epitaxial growth thereof, preferably by Chemical Vapour Deposition. However, it has turned out that this option results in a crystal structure associated with on-state characteristics and blocking capabilities of the device desired to be improved. The other way to proceed involves implantation of the acceptors into the semi- conductor layer of crystalline SiC by using very high acceleration energies. A high temperature anneal is then required for making the dopants electrically active, but this also can result in an outdiffusion of the dopants from the SiC surface severely changing the implantation profile. Furthermore, a damage of the crystal is caused by the implantation.
A method of the type defined in the introduction is already known through US patent 5 654 208. Although the method disclosed there enables a production of a pn-junction of a semiconductor device with a very high quality making it substantially improved with respect to a device produced according to any of the two previous techniques, there is a desire to simplify the method by reducing the number of process steps for making it more cost- efficient and commercially interesting.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a method of the type defined in the introduction making it possible to produce a pn-junction in a semiconductor layer of crystalline SiC and especially, but not exclusively, a diode of SiC while satisfying said desire.
This object is according to the invention obtained by providing method which is started by etching a trench into said semiconductor layer of crystalline SiC followed by a supply of boron atoms to the surface of said semiconductor layer and said heating step for forming the pn-junction, a contact layer is applied over the entire surface of said semiconductor layer formed by said sub-layer, and finally said semiconductor layer is polished for removing such a thick layer thereof that the contact layer and the p-type sub-layer disappear except for in said trench for forming a restricted pn-junction in said semiconductor layer. This results in a very simple and cost efficient process for obtaining a pn-juncion in SiC and primarily a diode in SiC and in a "curved" pn-junction, which will sometimes be preferred. Another advantage of this method is that polishing may sometimes be a very favourable and from the process technique point of view simple process step for removing excess layers.
The invention also relates to a method in which it is started by etching a trench into said semiconductor layer of crystalline SiC followed by a supply of boron atoms to the surface of said semiconductor layer and said heating step for forming the pn-junction, a contact layer is provided over a restricted surface region of said semiconductor layer including said trench, and said sublayer is etched away around said contact layer for forming a pn- junction substantially restricted to the area under said contact layer for creating a discrete semiconductor device. This also con- stitutes a very simple and cost efficient way to produce pn- junctions in SiC.
The invention also relates to a method in which a contact layer is applied on a restricted surface region of said semiconductor layer after said heating step, and the p-type sub-layer created by said diffusion is etched away around said contact layer for sub- stantially restricting said sub-layer to the region under said contact layer for creating a discrete semiconductor device. This constitutes a simple and cost efficient way to produce a discrete semiconductor device by using few process steps.
According to a preferred embodiment of the invention the time of the duration of said heating is controlled for controlling the diffusion depth of boron atoms and thereby the distance of the pn- junction defined by the thickness of said sub-layer to the surface of said semiconductor layer. Another preferred embodiment pro- vides for a control of the temperature for controlling the same parameter, and it is of course possible to control said time and the temperature simultaneously. This is preferably combined with a control of the supply rate of boron to said semiconductor layer of crystalline SiC, for instance by controlling the partial pressure of boron gas in an atmosphere surrounding said semiconductor layer when arranging this in an owen or furnace and creating an atmosphere with a boron content in the inner space of the owen. By controlling these different parameters it is possible to obtain a pn-junction at a desired distance from the surface of the semi- conductor layer and accordingly a desired thickness of the p-type layer, as well as a preferred doping concentration of the p-type layer. It is also possible to coat said semiconductor layer of SiC by a material containing boron as doping source.
According to a preferred embodiment of the invention said heating is carried out at a temperature of 1500-2500°C. Such high temperatures may be used for said diffusion, since SiC may withstand these temperatures, and the diffusion speed will increase with the temperature. It has turned out that this diffusion speed will be really commercially interesting when the temperature is above 1800°C.
According to another preferred embodiment of the invention said heating is carried out for a time period of 1 -4 hours. It has turned out that this time period for said heating is suitable for obtaining the thickness of said p-type layer normally aimed at for semicon- ductor devices of SiC by using the temperature mentioned above. This thickness is according to another preferred embodiment of the invention 0,5-2 μm, which is suitable for semiconductor devices of SiC.
According to another preferred embodiment of the invention said pn-junction is produced for a semiconductor device in the form of a pn-diode. This method is particularly adapted for the production of such semiconductor devices.
The invention also relates to a semiconductor device of SiC produced by using a method according to any of the method claims of the present invention. The features and the advantages of such a device appear from the discussion above.
Further advantages and advantageous features of the present invention appear from the following description and the other dependent claims.
BRIEF DESCRIPTION OF THE DRAWINGS
With reference to the appended drawings, below follows a specific description of methods according to preferred embodiments of the invention cited as examples.
In the drawings:
Fig 1 is an enlarged very schematic view illustrating how boron atoms are deposited on a semiconductor layer of crystalline SiC in a method according to a preferred embodiment of the inven- tion,
Figs 2-4 illustrate different steps of a method for producing a pn- junction in a semiconductor layer of crystalline SiC for a semiconductor device according to a first preferred embodiment of the invention,
Figs 5-8 illustrate different steps of a method according to a second preferred embodiment of the invention, and
Figs 9-12 illustrate different steps of a method according to a third preferred embodiment of the invention.
DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS OF THE INVENTION
It is very schematically illustrated in Fig 1 how an atmosphere with boron content is provided inside an owen or a furnace above a semiconductor layer 1 of crystalline SiC being n-type doped. The SiC may be of any polytype and is preferably of 6 H or 4 H, but also other polytypes as 3 C are conceivable. The boron atoms 2 are very schematically indicated. The atmosphere and thereby also said semiconductor layer 1 is heated to a high temperature, namely above 1400°C, and preferably above 1800°C. The upper limit for said heating is 2500°C. The boron atoms will deposit on the surface 3 of the semiconductor layer 1 and mi- grate into the layer 1 as indicated by the arrows 4. The layer 1 has a moderate doping concentration of 5x1013-5x1017cm"3, preferably of nitrogen (N). This nitrogen has been introduced during the epitaxial growth of the semiconductor layer 1 . Thus, it is necessary to provide a higher concentration of acceptors in a sub- layer of the semiconductor layer 1 for turning this sub-layer to p- type doped. The doping concentration of a sub-layer produced in this way may be influenced by controlling the partial pressure of boron in said atmosphere and thereby the surface concentration of dopants on the surface 2 of the layer 1. The diffusion process may also be influenced by adjusting the temperature inside the owen and the period of time for which the diffusion process is carried out.
It is illustrated in Fig 2 how a p-type sub-layer 5 has been produced in this way in said first layer 1 . The thickness of the sublayer 5 is preferably 0,5-2 μm, which may be obtained by heating the layer 1 and the atmosphere above 1500°C for 1 -4 hours. The doping concentration of boron in said sub-layer 5 is preferably 5x1017-1020cm"3. It is illustrated how said first semiconductor layer also comprises a highly doped n-type layer 6 on the opposite side thereof with respect to the sub-layer 5 for forming a good contact to the contact layer of the device. The sub-layer 7 of the first layer 1 separating the layers 5 and 6 is preferably much thicker, for instance about 40 μm.
A contact layer 8 is then applied on the sub-layer 5 followed by a mesa etching of said sub-layer 5 away around the contact layer for substantially restricting the sub-layer 5 to the region under said contact layer for created a discrete semiconductor device, namely in the form of a pn-diode as shown in Fig 4. It is obvious that the process for producing this diode also comprises other steps, which, however, will not be explained here, since they have nothing to do with the present invention. A contact layer is for instance to be applied next to the sub-layer 6. This device will have a very well ordered structure in the layers thereof, especially close to the pn-junction reducing the conduction losses thereof in the on-state and any leakage current in the blocking state of the device and raising the breakdown voltage of the device.
Figs 5-8 illustrate a method according to another very advanta- geous embodiment of the present invention according to which in a first step a mesa etching of said semiconductor layer 1 is carried out for forming a trench 9 therein. This is followed by a diffusion step as described above for forming a sub-layer 5. A contact layer 8 is then applied over the entire sub-layer 5. Finally, it is illustrated in Fig 8 how the structure according to Fig 7 is polished for removing such a thick layer thereof that the contact
layer and the p-type sub-layer disappear except for in said trench for forming a restricted pn-junction 10 in the semiconductor layer.
A method according to another preferred embodiment of the in- vention is illustrated in Figs 9-12, and this differs from the one according to Figs 5-8 by an application of the contact 8 only over a restricted surface region of the sub-layer 5. This is followed by a mesa etching for etching the sub-layer away around the contact layer for forming the pn-junction substantially restricted to the area under said contact layer for creating a discrete semiconductor device as shown in Fig 12.
A semiconductor device of this type is particularly advantageous when high powers and/or high voltages and/or high currents are to be handled, since it is then possible to fully utilize the physical properties of SiC. A diode of the type illustrated in the Figures may preferably be used in for instance current valves in converter stations as free-wheeling diode reducing the number of such diodes to be connected in series for holding a certain volt- age in comparison to the use of diodes of for instance Si. Such a voltage may then well be in the order of 100-500 kV, and the diode may preferably hold a voltage above 2 kV, and most preferred above 10 kV.
The methods described above and illustrated in the figures make it possible to produce especially pn-diodes of SiC through a very simple manufacturing process involving a lower number of masking steps than standard methods known so far.
The invention is of course not in any way restricted to the preferred embodiments described above, but many possibilities to modifications thereof will be apparent to a man with ordinary skill in the art without departing from the basic idea of the invention as defined in the appended claims. It is pointed out that the defi- nition layer is to be interpreted broadly and comprises all types of volume extensions and shapes.
Furthermore, "etching" and "polishing" are to be interpreted broadly and comprise all types of material removal of the respective type. "Etching" may for example be etching by gas flows, for instance of H2, or etching by applying chemical solutions upon the layer in question or reactive ion etching.
pn-junction and pn-diode are to be interpreted to also covering the case of a very low doping concentration of any of the layers next to the junction, so that this would often in the practice be called intrinsic. The diodes described above may for example just as well be called pin-diodes as a consequence of the low doping concentration of the n-type sub-layer 7.
Claims
1 . A method for producing a pn-junction (10) in a semiconductor layer (1 ) of crystalline SiC for a semiconductor device, in which a sub-layer (5) of an n-type doped semiconductor layer of crystalline SiC is provided with acceptors in the form of boron atoms for making this sub-layer p-type doped, and in which said sub-layer is provided with a doping through boron atoms by supplying boron to the surface (3) of said semiconductor layer and heating this layer at a temperature above 1400°C for a sufficient time for diffusion of boron atoms into said semiconductor layer for forming a p-type doped sub-layer (5) therein, characterized in that it is started by etching a trench (9) into said semiconductor layer (1 ) of crystalline SiC followed by a supply of boron atoms to the surface of said semiconductor layer and said heating step for forming the pn-junction (10), that a contact layer (8) is applied over the entire surface of said semiconductor layer formed by said sub-layer (5), and that finally said semiconductor layer is polished for removing such a thick layer thereof that the contact layer and the p-type sub-layer disappear except for in said trench for forming a restricted pn-junction in said semiconductor layer.
2. A method for producing a pn-junction (10) in a semiconductor layer (1 ) of crystalline SiC for a semiconductor device, in which a sub-layer (5) of an n-type doped semiconductor layer of crystalline SiC is provided with acceptors in the form of boron atoms for making this sub-layer p-type doped, and in which said sub-layer is provided with a doping through boron atoms by supplying boron to the surface (3) of said semiconductor layer and heating this layer at a temperature above 1400°C for a sufficient time for diffusion of boron atoms into said semiconductor layer for forming a p-type doped sub-layer (5) therein, characterized in that it is started by etching a trench (9) into said semiconductor layer of crystalline SiC followed by a supply of boron atoms to the surface (3) of said semiconductor layer and said heating step for forming the pn-junction (10), that a contact layer (8) is provided over a restricted surface region of said semiconductor layer including said trench, and that said sub-layer (5) is etched away around said contact layer for forming a pn-junction substantially restricted to the area under said contact layer for creating a discrete semiconductor device.
3. A method for producing a pn-junction (10) in a semiconductor layer (1 ) of crystalline SiC for a semiconductor device, in which a sub-layer (5) of an n-type doped semiconductor layer of crystalline SiC is provided with acceptors in the form of boron atoms for making this sub-layer p-type doped, and in which said sub-layer is provided with a doping through boron atoms by supplying boron to the surface (3) of said semiconductor layer and heating this layer at a temperature above 1400°C for a sufficient time for diffusion of boron atoms into said semiconductor layer for form- ing a p-type doped sub-layer (5) therein, characterized in that a contact layer (8) is applied on a restricted surface region of said semiconductor layer after said heating step, and that the p-type sub-layer (5) created by said diffusion is etched away around said contact layer for substantially restricting said sub-layer to the region under said contact layer for creating a discrete semiconductor device.
4. A method according to any of claims 1 -3, characterized in that the time of the duration of said heating is controlled for con- trolling the diffusion depth of boron atoms and thereby the distance of the pn-junction (10) defined by the thickness of said sub-layer (5) to the surface (3) of said semiconductor layer.
5. A method according to any of claims 1 -4, characterized in that the temperature of said heating is controlled for controlling the diffusion depth of boron atoms and thereby the distance of the pn-junction defined by the thickness of said sub-layer (5) to the surface (3) of said semiconductor layer.
6. A method according to any of claims 1 -5, characterized in that boron is supplied to said surface (3) of said semiconductor layer by arranging said semiconductor layer (1 ) in an owen and layer by arranging said semiconductor layer (1 ) in an owen and creating an atmosphere with a boron content in the inner space of the owen surrounding said semiconductor layer.
7. A method according to claim 6, characterized in that the partial pressure of the boron gas in said atmosphere is controlled for controlling the doping concentration created by said diffusion in said sub-layer (5).
8. A method according to any of the preceding claims, characterized in that said heating is carried out at a temperature of 1500-2500°C.
9. A method according to claim 8, characterized in that said heating is carried out at a temperature above 1800°C.
10. A method according to any of the preceding claims, characterized in that said heating is carried out for a time period of 1 -4 hours.
11 . A method according to any of the preceding claims, characterized in that the temperature and the duration of said heating is selected for obtaining a pn-junction (10) through said diffusion at a depth of 0,5-2 μm from the surface (3) of said semiconductor layer.
12. A method according to any of the preceding claims, characterized in that said pn-junction (10) is produced for a semiconductor device in the form of a pn-diode.
13. A semiconductor device of SiC produced by using a method according to any of the preceding claims.
14. A device according to claim 13, characterized in that it is designed for handling high powers and/or high voltages and/or high currents.
15. A device according to claim 14, characterized in that it is designed to be able to hold voltage exceeding 2 kV, preferably exceeding 10 kV.
16. A pn-diode of SiC produced by using a method according to any of the preceding claims.
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SE0002179A SE0002179D0 (en) | 2000-06-13 | 2000-06-13 | A method for producing a pn junction |
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WO2005088728A1 (en) * | 2004-03-11 | 2005-09-22 | Siemens Aktiengesellschaft | Pn diode based on silicon carbide and method for the production thereof |
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US3386864A (en) * | 1963-12-09 | 1968-06-04 | Ibm | Semiconductor-metal-semiconductor structure |
US5010023A (en) * | 1985-10-04 | 1991-04-23 | General Instrument Corporation | Method for fabricating a rectifying semiconductor junction having improved breakdown voltage characteristics |
US5250826A (en) * | 1992-09-23 | 1993-10-05 | Rockwell International Corporation | Planar HBT-FET Device |
US5610434A (en) * | 1995-11-07 | 1997-03-11 | General Instrument Corporation Of Delaware | Mesa semiconductor structure |
US5654208A (en) * | 1995-04-10 | 1997-08-05 | Abb Research Ltd. | Method for producing a semiconductor device having a semiconductor layer of SiC comprising a masking step |
US5766973A (en) * | 1995-10-19 | 1998-06-16 | Robert Bosch Gmbh | Method for manufacturing a semiconductor arrangement by introducing crystal disorder structures and varying diffusion rates |
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2000
- 2000-06-13 SE SE0002179A patent/SE0002179D0/en unknown
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US3386864A (en) * | 1963-12-09 | 1968-06-04 | Ibm | Semiconductor-metal-semiconductor structure |
US5010023A (en) * | 1985-10-04 | 1991-04-23 | General Instrument Corporation | Method for fabricating a rectifying semiconductor junction having improved breakdown voltage characteristics |
US5250826A (en) * | 1992-09-23 | 1993-10-05 | Rockwell International Corporation | Planar HBT-FET Device |
US5654208A (en) * | 1995-04-10 | 1997-08-05 | Abb Research Ltd. | Method for producing a semiconductor device having a semiconductor layer of SiC comprising a masking step |
US5766973A (en) * | 1995-10-19 | 1998-06-16 | Robert Bosch Gmbh | Method for manufacturing a semiconductor arrangement by introducing crystal disorder structures and varying diffusion rates |
US5610434A (en) * | 1995-11-07 | 1997-03-11 | General Instrument Corporation Of Delaware | Mesa semiconductor structure |
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WO2005088728A1 (en) * | 2004-03-11 | 2005-09-22 | Siemens Aktiengesellschaft | Pn diode based on silicon carbide and method for the production thereof |
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