WO2001089278A1 - Agencement de cartes a circuit imprime et dispositif de transaction de fonds - Google Patents

Agencement de cartes a circuit imprime et dispositif de transaction de fonds Download PDF

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Publication number
WO2001089278A1
WO2001089278A1 PCT/AU2001/000292 AU0100292W WO0189278A1 WO 2001089278 A1 WO2001089278 A1 WO 2001089278A1 AU 0100292 W AU0100292 W AU 0100292W WO 0189278 A1 WO0189278 A1 WO 0189278A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit board
boards
assembly
security
board
Prior art date
Application number
PCT/AU2001/000292
Other languages
English (en)
Inventor
Andrew R Jamieson
Original Assignee
Mcom Solutions Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mcom Solutions Inc filed Critical Mcom Solutions Inc
Priority to AU2001240370A priority Critical patent/AU2001240370A1/en
Publication of WO2001089278A1 publication Critical patent/WO2001089278A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards

Definitions

  • This invention relates to a circuit board arrangement and, in particular, but not exclusively, to a circuit board arrangement for a funds transaction device in which " security sensitive transactions take place.
  • Some devices used a combination of the epoxy and secure controller, with the added feature of embedding a loose wire in the epoxy resin, to "detect” any intrusion into the volume of the resin; if the wire was broken (or melted by solvent) a security violation would be detected and acted upon.
  • careful solvent selection and application could still be used to penetrate such a device, as it could be applied slowly, with each layer of the epoxy removed before a subsequent application.
  • the object of the present invention is to provide a circuit board arrangement in which greater security is provided and which is applicable to a funds transaction device and elsewhere where security sensitive applications are needed.
  • the invention may be said to reside in a circuit board assembly, including; a first printed circuit board having a first side and a second side; a second board having a first side and a second side; circuit components mounted on the first side of the first printed circuit board and signal traces formed on the first side of the first board for interconnecting the circuit components; the first and second boards being arranged adjacent one another and with the first sides facing one another; and a filler material disposed between the first sides of the first and second boards, which adheres to the first sides of the first and second circuit boards and embeds the circuit components within the filler material and surrounds the signal traces to form a monolithic circuit board assembly.
  • circuit components are located in the interior of the assembly and encased between two circuit boards access to the circuit component is extremely difficult without destroying the assembly
  • the second board is a second printed circuit board.
  • the circuit components are arranged on both the first side of first circuit board and the first side of the second circuit board and the components on one of the circuit boards are staggered with respect to components on the other circuit board so as to sit within valleys formed by components on the other circuit board to ensure that the space between the first and second circuit boards is as small as possible.
  • a security wire is provided between the first and second boards and embedded in the filler material for providing a violation signal indicative of an attempt to break through the first or second circuit boards.
  • the second sides of the first and second circuit boards may include circuit components and signal traces which are not security sensitive.
  • the first side of the first circuit board carries a connector component and the first side of the second circuit board carries a co-operating connector component so that the connector component and co-operating connector component are connected together to provide electrical communication between circuit components and traces on the first side of the first circuit board and circuit components and traces on the first side of the second circuit board.
  • the filler material comprises an epoxy resin.
  • the first printed circuit board is formed from a plurality of circuit board layers, a first side of one of the layers forming the said first side of the first printed circuit board, and a second side of another of the layers forming the second side of the first printed circuit board, a ground plane being formed on a side of one of the plurality of layers other than the said first side and said second side, and a security detection trace being formed on another side of one of the plurality of layers other than the said first side, and said second side or side having the ground plane.
  • At least one via extends through the layer having the security detection trace for electrical interconnection with signal traces on the first side of the first printed circuit board, the vias being shaded vias so that the said vias do not extend to the second side of the first circuit board.
  • additional vias extend from the first side of the first printed circuit board to the second side of the first printed circuit board for coupling non-secure circuit components on the second side of the first circuit board to security sensitive components on the first side of the first circuit board.
  • the second printed circuit board is formed of a plurality of layers in the same manner as the first printed circuit board.
  • the structure of forming the boards from a plurality of layers provide additional advantages.
  • An attacker may attempt to drill into the circuit board assembly to gain access to certain pins of interest on the components within the filler material, after obtaining information on the exact locations of the component themselves (which could be obtained by destruction of an identical device) .
  • the pins of the components could be attacked directly, particulary as it is much simpler to attach a probe to a component pin than to a narrow track on the printed circuit board given the extra size of the volume of solder that attaches the pin to the printed circuit board.
  • any attempt to drill through the board to gain access to components within the resin would sever the security trace enabling the activation of security mitigation protocols, such as deleting bank keys or the like from secure componentary.
  • security mitigation protocols such as deleting bank keys or the like from secure componentary.
  • the attacker would also be prevented from strapping out the security trace (i.e. attaching an external wire to provide continuity whilst the attacker drills through the circuit board assembly) as the vias connecting the trace to the security components are shaded and do not appear external to the epoxied interior of the circuit board assembly.
  • the security trace also activates a violation if the trace is connected to ground via the ground plane.
  • the invention may also be said to reside in a method of forming a circuit board assembly including the steps of; locating a first printed circuit board having a first side and a second side, within a mould, the first side having circuit components mounted on the first side and signal traces on the first side; applying a filler material; applying a second board to the first side of the first printed circuit board to spread the filler material so that the circuit components and traces are embedded within the filler material and the filler material surrounds the traces, filler material adhering to the first and second boards to thereby form a monolithic circuit board assembly.
  • the mould comprises a casing of an article in which the circuit board assembly is to be used.
  • the casing is a casing of a funds transaction terminal .
  • the filler material is applied to the first side of the first printed circuit board.
  • the invention may also be said to reside in a printed circuit board including; a first layer having a first side and a second side; a second layer having a first side and a second side; the first and second layers being coupled together with the second side of the first layer overlying and being adjacent to the first side of the second board so as to form a unitary structure; a security trace formed on either the second side of the first board or the first side of the second layer; and the security trace being connected to the first side of the first layer by at least one via which passes through the first layer but which does not extend to the second side of the second layer.
  • two such circuit boards can be coupled together with security sensitive components arranged on the first side and embedded in filler material so as to be internal within the circuit board assembly formed from the two boards so that any attempt to drill into the assembly to gain access to the components will sever the security trace to enable a security signal to be generated.
  • a ground plane is formed on the other of the second side of the first layer or first side of the second layer.
  • the contact between the drill bit, trace and ground plane will cause a circuit to be completed between the security trace and the ground plane thereby grounding the security trace to by enable generation of a security signal.
  • the security trace is connected to an invertor means for providing a predetermined signal indicative of the integrity of the circuit board and upon severing of the trace or grounding of the trace the predetermined signal is altered to thereby provide an indication of an attack on the circuit board.
  • a circuit board assembly is formed from two said circuit boards by coupling the two said circuit boards together so that the first sides of the first layers of the boards are adjacent and overlie one another and a filler material is interposed between the two boards, and circuit components being formed on the first side of at least one of the boards and embedded in the filler material.
  • Figure 1 is a schematic view of a circuit board assembly in exploded view according to one embodiment of the invention
  • Figure 2 is a view of the assembled circuit board assembly of Figure 1;
  • Figure 3 is a cross-sectional view through a circuit board arrangement according to the preferred embodiment of the invention.
  • Figures 4, 5, 6 and Figure 7 are views showing first and second sides of the layers of the circuit board arrangement of Figure 3;
  • Figure 8 is a circuit diagram relating to the embodiment of Figures 3 to 8;
  • Figure 9 is a view showing the method of forming the circuit board assembly according to the preferred embodiment of the invention.
  • a first printed circuit board 10 has a first side 12 and a second side 14.
  • a second printed circuit board 16 has a first side 18 and a second side 20.
  • the second printed circuit board 16 may be connected to a display board 22 having a display panel 24.
  • the board 22 may be physically connected to the board 16 or separate from the board 16 and connected by an electrical connection cable (not shown) .
  • the first side 12 of the first printed circuit board 10 includes security sensitive electronic circuits 30 together with security sensitive traces (not shown) formed on the board 12 which interconnect the circuits 30.
  • the first side 18 of the second printed circuit board 20 may also be provided with security sensitive electronic circuits 30' .
  • the first side 18 of the second board 20 may also include traces for coupling the circuits 30 on the first side 18 of the board 20 together.
  • the first side 12 and the first side 18 also include connectors 38 and 38' which couple together when the two boards 10 and 16 are bought together as shown in Figure 2 to form electrical interconnections between the circuits 30 on the side 12 and the circuits 30' on the side 18.
  • a loose length of wire 40 (shown schematically in Figure 1) is located between the boards 10 and 16 for carrying a security detectable signal in the event of an attempt to interfere with the circuit board assembly shown in Figures 1 and 2.
  • the wire 40 is quite long in comparison to the length of the board.
  • an amount of epoxy resin sufficient to entirely fill the space between the boards 12 and 14 when they are connected together is applied to the board 10 (for example) from a dispenser shown schematically by reference numeral 50.
  • the epoxy resin is spread out to the edges of the boards 10 and 16 so as to embed the security wire 40 and also the circuits 30 within the epoxy resin and surround the signal traces on the sides 12 and 18.
  • the epoxy resin adheres to the sides 12 and 18 to securely couple the boards 10 and 16 together.
  • the two boards 10 and 16 together with their circuits 30 and 30 ' , and connectors 38 and 38', become one integral mass with the security sensitive circuits 30 and their traces contained on the sides 12 and 18 interior of the circuit board assembly and therefore inaccessible to any attacker.
  • FIG 3 shows an embodiment of one of the circuit boards 10 or 16 (for example and for illustrative purposes the board 10 shown in Figure 1) .
  • the board 10 is formed as a multilayer board arrangement.
  • the board 10 of Figure 3 comprises a first layer 64 and a second layer 66 each of which may comprises printed circuit boards.
  • the first layer 66 has a first side 68 and a second side 70.
  • the second side 70 forms the second side 14 of the board 10 shown in Figure 1.
  • the second layer 66 has a first side 72 and a second side 74.
  • the first side 72 forms the first side 12 of the circuit board shown in Figure 1.
  • the circuits 30 are formed on the side 72 of the circuit board arrangement 10 shown in Figure 3.
  • the circuit board 10 has a first side 72 and a second side 70 which would form the first side 12 and second side 14 respectively of the circuit board 10 shown in Figure 1.
  • the circuits 30 are located on the side 72 as would be the connector 38 (not shown in Figure 3) .
  • the arrangement shown in Figure 3 also has two intermediate sides formed by the side 74 of the layer 66 and the side 68 of the layer 64 which face one another and are adhered together to form the board 10 shown in Figure 3.
  • Figures 4 and 5 show the sides 72 and 74 respectively of the layer 66
  • figures 6 and 7 show the sides 68 and 70 respectively of the layer 64.
  • the side 72 of the layer 66 includes signal traces 80 and the circuits 30 (not shown in Figure 4 for ease of illustration) .
  • Vias 82 (which are holes through the layer 72 having a wall coated with conducting material which is generally the same as that from which the traces are formed) are formed in the layer
  • the side 74 of the layer 66 is provided with a security signal trace 90 which forms a square shaped zig-zag type pattern on the side 74.
  • the security trace is formed over the entire surface of the side 74 and the trace lines 90 are quite close together.
  • the vias marked 82' in Figure 5 and also in Figure 4 are electrically connected to the security trace 90 so that the security trace 90 can be connected to a circuit component formed on the side 72 shown in Figure 4 for security monitoring of the circuit board assembly.
  • the other vias marked 82 in Figures 4 and 5 are provided for connection to other circuit components as will be described hereinafter.
  • Figure 6 shows the side 68 of the layer 64 and the side 68 is formed as a ground plane.
  • Vias 83 pass through the layer 64 and are electrically insulated from the ground plane on the side 68 by the ground plane 68 not extending all of the way to the vias 83 as shown by the region 85 surrounding the vias 83.
  • the ground plane shown cross hatched in Figure 6 occupies the entire surface of the side
  • the side 70 of the layer 64 is provided with traces 87 which may interconnect non-secure circuit components (not shown in Figure 7) which may be formed on the second side 14 of the assembly shown in Figure 1 so that those components can be connected to the circuit components formed on the side 72 shown in Figure 4 by the vias 83 which register and contact the vias 82 (other than those labelled 82') shown in Figures 4 and 5.
  • non-secure circuit components provided on the outside of the circuit board assembly shown in Figure 1 (that is on the side 70 shown in Figure 7) can be electrically connected to the security sensitive circuits 30 provided on the side 72 shown in Figure 4.
  • the side 68 of the layer 64 and the side 74 of the layer 66 are adhered together to form a unitary structure with the vias 82 shown in Figure 5 coupling with the vias 83 shown in Figures 6 and 7.
  • the vias 82' shown in Figures 4 and 5 are shaded vias, that is vias which do not extend all of the way through the circuit board 10 shown in Figure 3 so that they cannot be contacted from outside the circuit board assembly after the assembly has been constructed.
  • the circuit board 16 shown in Figure 1 can be formed in the same manner as that described with reference to Figure 3 and the assembly completed by bringing the two circuit boards together with the epoxy material between them so that the circuit components 30 provided on the side 72 of the first board 10 formed from the multi-layer configuration shown in Figure 3, and the circuit components 30' if provided on the first side 18 of a corresponding multi-layer circuit board 16 are embedded in the resin.
  • the security traces 90 are located in the interior of the board 10 being formed on the side 74 of the layer 66 and therefore are not assessable from outside of the circuit board assembly once constructed. It will be noted, as discussed above, that the security trace 90 is connected only to the side 72 and the components on the side 72 and not to the exterior of the circuit board assembly. Thus, if an attacker should attempt to break into the circuit board assembly by drilling through the assembly, the traces 90 will be broken and severing the security trace 90 enables the activation of a security mitigation code which can delete sensitive information from the circuits 30 such as bank keys or the like.
  • the attacker is prevented from "strapping out” the security trace 90 by attaching an external wire to provide continuity )whilst the attacker drills through the circuit board assembly) because the vias 82' connecting the trace 90 to the security components on the side 72 are shaded and do not appear external to the circuit board assembly. Furthermore, an attempt to drill through the board 10 will cause a circuit to be formed between the trace 90 and the ground plane formed on side 68 thereby grounding the trace 90. In the event of grounding the trace 90, a security mitigation code can also be activated in order to delete sensitive information in the circuits 30.
  • Figure 8 shows the circuit diagram illustrating how the trace 90 can generate a security signal.
  • trace 90 is shown connected to a power supply 99 which supplies a voltage VCC to resistor 101 which is connected to the trace 90 by via 82'.
  • the other end of the trace 90 is connected to the other via 82'.
  • the via 82' connects to resistor 102 which is grounded, and also by trace 104 to a first invertor 105.
  • the output of the first invertor 105 is connected to a second invertor 106 and also to trace 107.
  • the output of the second inventor 106 is connected to trace 108.
  • the inverter 105 acts as an amplifier to this input, providing a low impedance output to trace 107 and invertor 106. If the input to the inverter 106 is low the output from the inverter 106 is high on trace 108.
  • the traces 107, and inverter 106 and trace 108, are alternatives and the trace 107 can be used for active high inputs or the inverter 106 and trace 108 used for active low inputs. If an attempt is made to drill through the circuit board one of two things occurs. Firstly, the trace 90 is severed by the cutting, removing the resistor 101 from the circuit. The input to the inverter 105 is then controlled only by the resistor 102 which is at ground potential. The output from the invertor 105 therefore goes high causing the trace
  • the trace 90 is not effectively broken, perhaps by being externally strapped, the trace 90 is nevertheless momentarily connected to ground as the drill cuts through the ground plane on side 68 shown in Figure 6 thereby temporarily grounding the trace 90. This connection overrides the resistor network and applies a ground potential to the input of the invertor 105 thereby causing the trace 107 to go high and the trace
  • the change in signal on the trace 107 or the trace 108 is received by a processor (not shown) which immediately initiates a security protocol to delete sensitive information from the circuits 30 in accordance with known standards.
  • the power supply 99, resistor 101, resistor 102 and inverters 105 and 106 together with the respective traces 104, 107 and 108 are formed on the side 72 shown in Figure 4 (that is the side 12 shown in Figure 1), as made clear above, connected to the trace 90 by the vias 82'.
  • Figure 9 shows the preferred embodiment of forming the circuit board assembly shown in Figure 1 either from single circuit boards as described with reference to Figure 1 or from multi-layer circuit boards as described with reference to Figures 3 to 7.
  • the circuit board such as the circuit board 10 is arranged within casing 92 of a funds transfer device in which the circuit board 10 is to be provided.
  • Epoxy is then applied to the side 12 of the circuit board 10 with the surrounds of the casing 12 acting as a mould to assist in retaining epoxy on the side 12.
  • the second circuit board 16 is then located on the board 10 to spread out the epoxy and embed the circuit components 30 within the epoxy.
  • the casing of the product in which the circuit board assembly is to be used forms a mould for facilitating retention of the epoxy between the circuit boards 10 and 16.
  • the casing 92 forms one casing part of a funds transfer device which preferably a hand held device communicating with a central bank facility via an over the air network will generally include a pin pad for the input of information, a slot for enabling a card to be swiped through the device and read by the device and a transmitter for transmitting the information. Further details of the device are given in our co-pending application filed concurrently herewith and entitled Funds Transaction Terminal, the contents of which is incorporated into this specification by this reference.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

La présente invention concerne un ensemble de cartes à circuit imprimé, qui comprend une première carte à circuit imprimé (10) et une seconde carte à circuit imprimé (16). La première face (12) de la première carte à circuit imprimé (10) présente des circuits électroniques de sécurité sensibles (30) et des tracés de sécurité sensibles. Les cartes à circuit imprimé comprennent des connecteurs (38) et (38'), qui s'accouplent lorsque les cartes sont connectées l'une à l'autre. De la résine époxyde issue d'un distributeur est appliquée sur la carte, en quantité suffisante pour remplir complètement l'espace situé entre les cartes (12) et (14), de façon à pouvoir intégrer un fil de sécurité (40) et les circuits (30) à l'intérieur de la résine époxyde et à entourer les tracés de signalisation sur les faces (12) et (18). Chacune des cartes peut être constituée d'une structure multicouche, dans laquelle une des faces d'une des couches comprend un plan de masse et le tracé de sécurité qui a été produit sur une surface interne de la structure en couches. Les couches sont pourvues de trous d'interconnexion qui ne s'étendent pas jusqu'à une couche externe.
PCT/AU2001/000292 2000-05-17 2001-03-15 Agencement de cartes a circuit imprime et dispositif de transaction de fonds WO2001089278A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2001240370A AU2001240370A1 (en) 2000-05-17 2001-03-15 Circuit board arrangement and funds transaction device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AUPQ7560 2000-05-17
AUPQ7560A AUPQ756000A0 (en) 2000-05-17 2000-05-17 Circuit board arrangement and funds transaction device

Publications (1)

Publication Number Publication Date
WO2001089278A1 true WO2001089278A1 (fr) 2001-11-22

Family

ID=3821638

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/AU2001/000292 WO2001089278A1 (fr) 2000-05-17 2001-03-15 Agencement de cartes a circuit imprime et dispositif de transaction de fonds

Country Status (2)

Country Link
AU (1) AUPQ756000A0 (fr)
WO (1) WO2001089278A1 (fr)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5371044A (en) * 1991-05-27 1994-12-06 Hitachi, Ltd. Method of uniformly encapsulating a semiconductor device in resin
GB2279907A (en) * 1993-07-02 1995-01-18 Gec Avery Ltd Flexible mountings for electronic components in smart cards.
US5586389A (en) * 1991-05-31 1996-12-24 Nippondenso Co., Ltd. Method for producing multi-board electronic device
US5776796A (en) * 1994-05-19 1998-07-07 Tessera, Inc. Method of encapsulating a semiconductor package
US5847650A (en) * 1996-10-04 1998-12-08 Knogo North America Inc. Theft resistant circuit assembly

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5371044A (en) * 1991-05-27 1994-12-06 Hitachi, Ltd. Method of uniformly encapsulating a semiconductor device in resin
US5586389A (en) * 1991-05-31 1996-12-24 Nippondenso Co., Ltd. Method for producing multi-board electronic device
GB2279907A (en) * 1993-07-02 1995-01-18 Gec Avery Ltd Flexible mountings for electronic components in smart cards.
US5776796A (en) * 1994-05-19 1998-07-07 Tessera, Inc. Method of encapsulating a semiconductor package
US5847650A (en) * 1996-10-04 1998-12-08 Knogo North America Inc. Theft resistant circuit assembly

Also Published As

Publication number Publication date
AUPQ756000A0 (en) 2000-06-08

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