WO2001067595A1 - Amplificateur d'instrumentation - Google Patents
Amplificateur d'instrumentation Download PDFInfo
- Publication number
- WO2001067595A1 WO2001067595A1 PCT/NL2001/000178 NL0100178W WO0167595A1 WO 2001067595 A1 WO2001067595 A1 WO 2001067595A1 NL 0100178 W NL0100178 W NL 0100178W WO 0167595 A1 WO0167595 A1 WO 0167595A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- negative input
- capacitors
- output
- capacitor
- amplifier
- Prior art date
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 50
- 230000003321 amplification Effects 0.000 claims abstract description 13
- 238000003199 nucleic acid amplification method Methods 0.000 claims abstract description 13
- 238000010586 diagram Methods 0.000 description 2
- 230000000875 corresponding effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229920000136 polysorbate Polymers 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/001—Digital control of analog signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/005—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/261—Amplifier which being suitable for instrumentation applications
Definitions
- the invention relates to an instrumentation amplifier comprising an amplifier unit having a high open- loop amplification, a positive input, a negative input and an output, the closed-loop amplification of the amplifier unit being defined by a network of capacitors of which at least one capacitor is connected between the output and the negative input, and at least one capacitor is positioned in the signal line connecting to the negative input . It may be assumed that such an embodiment of an instrumentation amplifier is known from the general network theory.
- the instrumentation amplifier is characterized in that the network comprises a predetermined number of substantially equivalent and switchable N+M capacitors, which number depends on a desired gain factor N/M, in that during a clock cycle, M-capacitors are always connected in parallel between the output and the negative input, and in that the remain- ing N-capacitors during that clock cycle are parallel- connected in the signal line which connects to the negative input, and in that in consecutive clock cycles the capacitors are connected such that after N+M consecutive clock cycles, each capacitor has been connected once be- tween the output and the negative input of the amplifier unit.
- the said N+M consecutive clock cycles together form one complete measuring cycle within which the amplification of a signal is realized.
- the instrumentation amplifier is particularly suitable for the amplification of thermocouples or other sources supplying a stable or relatively inert varying voltage that is to be amplified.
- the instrumentation amplifier achieves that the ca- pacitors, which are substantially equivalent, can and may differ slightly, without thereby significantly influencing the gain factor N/M that is realized.
- the same is characterized in that one pin of each capacitor is coupled with the negative input of the amplifier unit, and the other pin is coupled with a first and a second switch, the first switch serving for the connection of the other pin with the signal line, and the second switch serving for the connection of the other pin with the output of the amplifier unit.
- a switch is provided for short-circuiting the connection between the output and the negative input of the amplifier. This is a simple method for resetting the capacitor in the feedback path and a compensation for the direc -current voltage drift of the amplifier unit.
- this Figure shows the amplifier unit 1 that is provided with a high open- loop amplification, a positive input 2, a negative input 3, and an output 4.
- the open-loop amplification of the amplifier unit 1 is defined by a network of capacitors C x to C N+M* M-capacitors C N+1 to C N+M being connected in parallel between the output 4 and the negative input 3. Inciden- tally, M may also be 1.
- the remaining capacitors C to C N are all connected in parallel and included in the signal line 5.
- the N+M capacitors C x to C N+M all are substantially equivalent to one another.
- the number of N+M capacitors is determined by the desired closed-loop ampli- fication N/M of the amplifier unit 1.
- FIG 1 shows that in the signal line 5, switches S x and S 2 are incorporated for sampling the input signal. Said input signal feeds the parallel -connected capacitors ⁇ to C N .
- the switching sequence of the switches S x and S 2 is shown in Figure 2.
- Fig- ure 1 further shows another switch S 3 by means of which the output 4 and the negative input 3 of the amplifier unit 1 can be short-circuited. The activity of this switch is also shown in Figure 2.
- Figure 2 further shows the progress of the output voltage at the output 4 whereby the output signal V out acquires a value, which is represented by the formula, shown at the left-hand bottom of Figure 2.
- the capacitors C x to C NtM sequentially all move up, such that after a number of cy- cles each of them will have occupied the place of the feedback capacitors shown in Figure 1 once.
- FIG. 3 shows that one pin of each capacitor C x to C N+M is coupled with the negative input 3 of the amplifier unit 1, and the other pin is coupled with a first and a second switch. These are for capacitor C x the switches 5.1 and 5.2.
- the first switch 5.1 serves to connect the other pin of the capacitor C : with the signal line 5, while the second switch 5.2 serves to connect said other pin of the capacitor ⁇ with the output 4 of the amplifier unit.
- the switches pertaining to the capacitors C x to C N all assume a corre- sponding position, while the switches pertaining to the capacitors C Ntl to C N+M assume a different position in relation thereto.
- the first and second switch pertaining to a capacitor are always active alternately, which means that when one switch is open, the other switch is closed and vice versa.
- the switches 5.3 and 5.4 pertaining to capacitor C N+M are, for example, connected such that said capacitor C N+M is connected in the feedback path between the output 4 and the negative input 3 of the amplifier unit 1.
- This also ap- plies to the other capacitors C N+1 to C ⁇ M . ! connected in the feedback.
- the switches of the other capacitors C x to C N assume a different position, which entails that said capacitors C 1 to C N are parallel-connected in the signal line 5.
- the position shown in Figure 3 corresponds with the situation during one particular clock cycle.
- each capacitor C r to C N+M assume positions in the network such that after N+M of said consecutive clock cycles, each capacitor C r to C N+M has been connected between the output 4 and the negative input 3 of the amplifier unit 1 at least once.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2001241279A AU2001241279A1 (en) | 2000-03-03 | 2001-03-05 | Instrumentation amplifier |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL1014551 | 2000-03-03 | ||
NL1014551A NL1014551C2 (nl) | 2000-03-03 | 2000-03-03 | Instrumentatieversterker. |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2001067595A1 true WO2001067595A1 (fr) | 2001-09-13 |
Family
ID=19770934
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/NL2001/000178 WO2001067595A1 (fr) | 2000-03-03 | 2001-03-05 | Amplificateur d'instrumentation |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU2001241279A1 (fr) |
NL (1) | NL1014551C2 (fr) |
WO (1) | WO2001067595A1 (fr) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4438354A (en) * | 1981-08-14 | 1984-03-20 | American Microsystems, Incorporated | Monolithic programmable gain-integrator stage |
US5574457A (en) * | 1995-06-12 | 1996-11-12 | Motorola, Inc. | Switched capacitor gain stage |
EP0934626A1 (fr) * | 1996-03-28 | 1999-08-11 | Stichting Voor De Technische Wetenschappen | Amplificateur d'appareil de mesure |
-
2000
- 2000-03-03 NL NL1014551A patent/NL1014551C2/nl not_active IP Right Cessation
-
2001
- 2001-03-05 WO PCT/NL2001/000178 patent/WO2001067595A1/fr active Application Filing
- 2001-03-05 AU AU2001241279A patent/AU2001241279A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4438354A (en) * | 1981-08-14 | 1984-03-20 | American Microsystems, Incorporated | Monolithic programmable gain-integrator stage |
US5574457A (en) * | 1995-06-12 | 1996-11-12 | Motorola, Inc. | Switched capacitor gain stage |
EP0934626A1 (fr) * | 1996-03-28 | 1999-08-11 | Stichting Voor De Technische Wetenschappen | Amplificateur d'appareil de mesure |
Also Published As
Publication number | Publication date |
---|---|
AU2001241279A1 (en) | 2001-09-17 |
NL1014551C2 (nl) | 2001-09-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6617838B1 (en) | Current measurement circuit | |
EP0118178B1 (fr) | Procédé et dispositif pour compenser le décalage de zéro dans un amplificateur à courant continu | |
CN111295837B (zh) | 电容耦合斩波器放大器 | |
US6111467A (en) | Circuit for time constant tuning of gm-C filters | |
JP2012503914A5 (fr) | ||
DE102009029696A1 (de) | Switched-Capacitor-Verstärkeranordnung mit niedrigem Eingangsstrom | |
US20050134220A1 (en) | Area-efficient compensation circuit and method for voltage mode switching battery charger | |
US9397645B2 (en) | Circuit for common mode removal for DC-coupled front-end circuits | |
CN103493138B (zh) | 用于放大器的噪声消除系统和方法 | |
US7609075B2 (en) | Differential level shifter with automatic error compensation | |
KR870009558A (ko) | 전압 제어발진기 및 그것을 사용한 위상동기장치 | |
US6130527A (en) | Voltage regulation circuit | |
WO2001067595A1 (fr) | Amplificateur d'instrumentation | |
JP6899686B2 (ja) | 差動増幅装置 | |
US9207255B2 (en) | Signal processing device and amplifier | |
JP2007221429A (ja) | 演算増幅器 | |
Fan et al. | Input characteristics of a chopped multi-path current feedback instrumentation amplifier | |
JPH1038612A (ja) | 電子測定システム用増幅回路 | |
US3448393A (en) | Means for error correction | |
US7518439B1 (en) | High precision gain amplifier without precision passive components | |
JPH06103807B2 (ja) | 集積回路用高精度増幅回路 | |
JPH0818353A (ja) | 演算増幅回路 | |
US3488597A (en) | Pulse averaging circuit | |
US3955144A (en) | Feedback system for pulse transmitters | |
CN107046405B (zh) | 使用高级相关的电平移动的增益增强 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
REG | Reference to national code |
Ref country code: DE Ref legal event code: 8642 |
|
122 | Ep: pct application non-entry in european phase | ||
NENP | Non-entry into the national phase |
Ref country code: JP |