WO2001062055A1 - Method of manufacturing wiring board - Google Patents

Method of manufacturing wiring board Download PDF

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Publication number
WO2001062055A1
WO2001062055A1 PCT/JP2001/000776 JP0100776W WO0162055A1 WO 2001062055 A1 WO2001062055 A1 WO 2001062055A1 JP 0100776 W JP0100776 W JP 0100776W WO 0162055 A1 WO0162055 A1 WO 0162055A1
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WIPO (PCT)
Prior art keywords
holding plate
wiring board
manufacturing
conductor
conductor layer
Prior art date
Application number
PCT/JP2001/000776
Other languages
French (fr)
Japanese (ja)
Inventor
Hiroyuki Watanabe
Original Assignee
Ibiden Co., Ltd.
Adachi, Shinji
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co., Ltd., Adachi, Shinji filed Critical Ibiden Co., Ltd.
Publication of WO2001062055A1 publication Critical patent/WO2001062055A1/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier

Definitions

  • FIG. 3 is a cross-sectional view showing a state where a second conductor layer is laminated.
  • FIG. 5 is a cross-sectional view showing a state where a third conductor layer is laminated.
  • a 1 mm-thick holding plate 1 made of stainless steel is prepared.
  • Guide holes 1A, 1A (5 mm0) are formed in the holding plate 1 at both ends in FIG.
  • an inlet 1B is opened slightly inside the guide hole 1A on the left side of the figure.
  • Guide pins 12 and 12 (5 mm ⁇ , stainless steel) are passed through guide holes 1A and 1A of this holding plate 1, and aluminum foil 4 (20 / m thick) is placed on holding plate 1. I do.
  • aluminum foil 4 is also pre-drilled at the same position as guide holes 1A, 1A. Then, air is sucked in from inlet 1B. Then, the aluminum foil 4 is fixed in close contact with the holding plate 1.
  • the thickness uniformity is excellent even when plating is performed under conditions of high plating speed.
  • hot pressing is performed with the two conductor layers 6, 9 facing each other while sandwiching an epoxy resin interlayer adhesive insulating sheet 10 (100m thick).
  • the conductor layers 6 and 9 are fixed to the holding plates 1 and 7, respectively, the positional and dimensional accuracy is maintained regardless of the heating and pressing at the time of pressing.
  • the upper holding plate 7 and aluminum foil 5 are removed, the state shown in Fig. 3 is obtained. At this time, the blank 9C in the conductor layer 9 is located above the pattern 6A in the conductor layer 6.
  • a via hole 16 for electrically connecting the copper pattern 9A and the copper pattern 14A and a via hole 17 for electrically connecting the copper pattern 6B and the copper pattern 14B are formed.
  • the via holes 16 and 17 are formed by laser processing and electric plating in the same manner as when the via holes 12 were formed.
  • the wiring board shown in Fig. 7 is manufactured.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The invention provides a method of manufacturing a wiring board, in which conductor patterns are formed with high positional and dimensional accuracy. Aluminum foil (4) is fixed to a stainless steel support board (1), and a conductor layer (6) (copper patterns 6A and 6B) is formed on the aluminum foil (4). Such structures are stacked and hot-pressed with insulating layers (10) in between. Via holes are provided in the insulating layers (10).

Description

明 細 配線板の製造方法 技術分野  Description Wiring board manufacturing method Technical field
本発明は, 導体層と絶縁層とを積層してなる配線板を製造する方法に 関するものである。 さらに詳細には, 導体層のパターン等の位置および 寸法精度の向上を図った配線板の製造方法に関するものである。 背景技術  The present invention relates to a method for manufacturing a wiring board formed by laminating a conductor layer and an insulating layer. More specifically, the present invention relates to a method for manufacturing a wiring board with an improvement in the position and dimensional accuracy of a pattern of a conductor layer. Background art
従来より, 多層構造の配線板がビルドアツプによって製造されている 。 すなわち, 樹脂の両面に導体層を有するコア基板を用意し, 導体層を パターニングする。 そして, その外側に順次, 層間絶縁層及び導体層を 積層していくのである。 また, 必要に応じて導体層と他の導体層の間に ビアホール等を適宜設ける。 しかしながら, 上記のような配線板の製造 方法では, 導体層のパターンやビアホールの位置精度が低いという問題 点がある。 コア基板の材料が樹脂であるため, コア基板に対してプレス 等の熱的な処理を行うと, コア基板が熱膨張により伸縮し, その状態で 導体層のパターン形成や, 層間絶縁層のビアホールの形成がなされてし まうからである。  Conventionally, multilayer wiring boards have been manufactured by build-up. In other words, a core substrate having conductor layers on both sides of the resin is prepared, and the conductor layers are patterned. Then, an interlayer insulating layer and a conductor layer are successively laminated on the outside. Also, via holes and the like are appropriately provided between the conductor layer and other conductor layers as necessary. However, the above-mentioned method of manufacturing a wiring board has a problem that the positional accuracy of the conductor layer pattern and the via hole is low. Since the core substrate is made of resin, if the core substrate is subjected to thermal treatment such as pressing, the core substrate expands and contracts due to thermal expansion. In this state, patterning of the conductor layer and via holes in the interlayer insulating layer occur. Is formed.
そこで本発明は, 位置および寸法精度よく導体層のパターン等を形成 できる配線板の製造方法を提供することを課題とする。 発明の開示  Accordingly, an object of the present invention is to provide a method of manufacturing a wiring board that can form a pattern of a conductor layer with high positional and dimensional accuracy. Disclosure of the invention
この課題の解決を目的としてなされた本発明は, 導体パターンと層間 絶縁層とを交互に積層する配線板の製造方法であって, 剛性のある材質 の保持板の上に加熱加圧プロセスを用いて導体パターンおよび層間絶縁 層を積層する工程 ( 1 ) と, 工程 ( 1 ) より後で保持板と積層物とを分 離する工程 ( 2 ) とを含んでいる。 ここで剛性のある材質のものとは, 樹脂等と比較して機械的強度に優れた材料を指す。 具体的には, ステン レス鋼や普通鋼等の金属系の材料が該当する。 この種の材料は一般的に , 樹脂材と比較して機械的強度に優れるだけでなく熱膨張率も小さく , 寸法の安定性に優れている。 SUMMARY OF THE INVENTION An object of the present invention, which has been made to solve this problem, is a method for manufacturing a wiring board in which a conductor pattern and an interlayer insulating layer are alternately laminated, the method comprising: A step of laminating the conductor pattern and the interlayer insulating layer on the holding plate using a heating and pressing process (1), and a step of separating the holding plate and the laminate after the step (1) (2). Contains. Here, a material having rigidity refers to a material having a higher mechanical strength than a resin or the like. Specifically, metallic materials such as stainless steel and ordinary steel are applicable. This kind of material generally has not only excellent mechanical strength but also a small coefficient of thermal expansion and excellent dimensional stability as compared with resin material.
この方法では, 導体パターンや層間絶縁層の積層が, 剛性のある保持 板上で行われるので, ホッ 卜プレスのような加熱加圧プロセスを絰ても 寸法精度が安定している。 よって, 導体パターンや層間接続構造の位置 および寸法精度が高い配線板が製造される。 なお, 保持板自体は配線板 の一部をなすものではないので, 後に除去される。  In this method, the lamination of the conductor pattern and the interlayer insulating layer is performed on a rigid holding plate, so that the dimensional accuracy is stable even with a heating and pressing process such as a hot press. Therefore, a wiring board with high position and dimensional accuracy of the conductor pattern and interlayer connection structure is manufactured. Note that the holding plate itself does not form a part of the wiring board, and is removed later.
さらに本発明の配線板の製造方法においては, 工程 ( 1 ) を, 2枚の 剛性のある保持板上にそれそれ固定的に保持された導体パターンを, 層 間絶縁層を間に挟んで対面させて行うことが望ましい。 このようにする と, 各導体パターンは, 保持板上に位置精度よく形成され, さらに加熱 加圧プロセスにおいてもその位置精度の高さが保持される。  Further, in the method for manufacturing a wiring board according to the present invention, the step (1) includes the steps of: placing a conductor pattern fixedly held on two rigid holding plates on opposite sides with an interlayer insulating layer interposed therebetween; It is desirable to perform it. By doing so, each conductor pattern is formed with high positional accuracy on the holding plate, and the high positional accuracy is maintained even in the heating and pressing process.
さらに本発明の配線板の製造方法においては, 保持板として導電体を 用い, 積層された層間絶縁層にホールを形成するとともに, 保持板を電 流供給経路とする電気めつきによりホールを充填して層間接続構造を形 成する工程を含むことが好ましい。 このようにすると, ホールの充填の 際, 保持板全体を経由して各めつき箇所に電流が供給される。 このため , めっき厚の均一性がよく, 平坦性に優れるめっき結果が得られる。 図面の簡単な説明  Further, in the method of manufacturing a wiring board of the present invention, a conductor is used as a holding plate, holes are formed in the laminated interlayer insulating layer, and holes are filled by electric plating using the holding plate as a current supply path. To form an interlayer connection structure. In this way, when filling the holes, current is supplied to each of the attachment points via the entire holding plate. For this reason, the plating results are excellent in uniformity of plating thickness and excellent in flatness. BRIEF DESCRIPTION OF THE FIGURES
第 1図は, 保持板の上に導体層を形成した状態を示す断面図である。 第 2図は, 第 1図に示すものを 2組向き合わせてプレスする状況を説 明する断面図である。 FIG. 1 is a cross-sectional view showing a state where a conductor layer is formed on a holding plate. Fig. 2 is a cross-sectional view illustrating the situation where two sets of the components shown in Fig. 1 are pressed together.
第 3図は, 2層目の導体層を積層した状態を示す断面図である。  FIG. 3 is a cross-sectional view showing a state where a second conductor layer is laminated.
第 4図は, 層間絶縁層にビアホールを形成した状態を示す断面図であ る。  FIG. 4 is a cross-sectional view showing a state in which a via hole is formed in the interlayer insulating layer.
第 5図は, 3層目の導体層を積層した状態を示す断面図である。  FIG. 5 is a cross-sectional view showing a state where a third conductor layer is laminated.
第 6図は, 層間絶縁層にビアホールを形成した状態を示す断面図であ る。  FIG. 6 is a cross-sectional view showing a state in which a via hole is formed in the interlayer insulating layer.
第 7図は, 製造した配線板を保持板から取り外した状態を示す断面図 である。 発明を実施するための最良の形態  FIG. 7 is a cross-sectional view showing a state where the manufactured wiring board is removed from the holding plate. BEST MODE FOR CARRYING OUT THE INVENTION
以下, 本発明の配線板の製造方法を具体化した実施の形態について, 添付図面を参照しつつ詳細に説明する。  Hereinafter, an embodiment of a method of manufacturing a wiring board according to the present invention will be described in detail with reference to the accompanying drawings.
まず, ステンレス鋼によって形成された厚さ 1 mmの保持板 1を用意 する。 この保持板 1には, 第 1図中両端の位置にガイ ド穴 1 A, 1 A ( 5 mm0) が開けられている。 さらに, 図中左のガイ ド穴 1 Aよりやや 内側の位置に吸気口 1 Bが開けられている。 この保持板 1のガイ ド穴 1 A, 1 Aにガイ ドピン 1 2, 1 2 ( 5 mm φ , ステンレス鋼) を通し, 保持板 1の上にアルミ箔 4 ( 2 0 /m厚) を配置する。 もちろんアルミ 箔 4にもガイ ド穴 1 A, 1 Aと同じ位置にあらかじめ穴が開けられてい る。 そして, 吸気口 1 Bから吸気する。 すると, アルミ箔 4は保持板 1 に密着して固定される。  First, a 1 mm-thick holding plate 1 made of stainless steel is prepared. Guide holes 1A, 1A (5 mm0) are formed in the holding plate 1 at both ends in FIG. In addition, an inlet 1B is opened slightly inside the guide hole 1A on the left side of the figure. Guide pins 12 and 12 (5 mm φ, stainless steel) are passed through guide holes 1A and 1A of this holding plate 1, and aluminum foil 4 (20 / m thick) is placed on holding plate 1. I do. Of course, aluminum foil 4 is also pre-drilled at the same position as guide holes 1A, 1A. Then, air is sucked in from inlet 1B. Then, the aluminum foil 4 is fixed in close contact with the holding plate 1.
次に, アルミ箔 4の上に導体層 6を積層する。 この積層は次のように 行う。 すなわち, アルミ箔 4の表面上にめっきレジス 卜 6 E ( 2 0 zm 厚) を形成してから, 電気銅めつきを施す。 このとき, 保持板 1および アルミ箔 4により通電をとる。 すると, めっきレジス ト 6 Eが形成され ていない部分に銅パターン 6 A , 6 B ( 2 0〃m厚) が形成される。 か く して, 第 1図に示すように, アルミ箔 4の上に導体層 6が積層される 。 かく して形成された銅パターン 6 A , 6 Bは, 実質的に保持板 1に固 定された状態であり, 位置および寸法の精度に優れている。 また, 広く 保持板 1およびアルミ箔 4の全体を電流供給経路として用いるので, め つき速度の速い条件でめっきしたとしても厚さの均一性に優れている。 そして, 第 1図に示したものと同じ (導体層のパターンを除く) もの をもう 1つ用意する。 そして第 2図に示すように, エポキシ樹脂の層間 接着絶縁シート 1 0 ( 1 0 0〃m厚) を間に挟み込みつつ両者の導体層 6 , 9同士を対面させてホッ トプレスする。 このとき, 導体層 6, 9が それそれ保持板 1 , 7に固定された状態であるため, プレス時の加熱 - 加圧にかかわらず位置および寸法の精度が保持される。 その後上側の保 持板 7とアルミ箔 5 とを除去すると, 第 3図の状態が得られる。 このと き, 導体層 9中のブランク 9 Cが, 導体層 6中のパターン 6 Aの上方に 位置している。 Next, the conductor layer 6 is laminated on the aluminum foil 4. This lamination is performed as follows. That is, a plating resist 6E (20 zm thick) is formed on the surface of the aluminum foil 4, and then electrolytic copper is applied. At this time, holding plate 1 and Energize with aluminum foil 4. Then, copper patterns 6A and 6B (20 µm thick) are formed in portions where the plating resist 6E is not formed. Thus, the conductor layer 6 is laminated on the aluminum foil 4 as shown in FIG. The copper patterns 6A and 6B thus formed are substantially fixed to the holding plate 1, and have excellent positional and dimensional accuracy. In addition, since the entire holding plate 1 and aluminum foil 4 are widely used as the current supply path, the thickness uniformity is excellent even when plating is performed under conditions of high plating speed. Then, prepare another one that is the same as that shown in Fig. 1 (excluding the conductor layer pattern). Then, as shown in Fig. 2, hot pressing is performed with the two conductor layers 6, 9 facing each other while sandwiching an epoxy resin interlayer adhesive insulating sheet 10 (100m thick). At this time, since the conductor layers 6 and 9 are fixed to the holding plates 1 and 7, respectively, the positional and dimensional accuracy is maintained regardless of the heating and pressing at the time of pressing. Then, when the upper holding plate 7 and aluminum foil 5 are removed, the state shown in Fig. 3 is obtained. At this time, the blank 9C in the conductor layer 9 is located above the pattern 6A in the conductor layer 6.
次に, パターン 6 Aとパターン 9 Aとの電気的接続をとるビアホール を形成する。 これは次のようにして行う。 すなわち, ブランク 9 Cをコ ンフォーマルマスクとするレーザ加工 ( C 0 2 レーザ等) により層間絶 縁層 1 0に穴を開け, その穴を電気めつきにより銅で充填する。 このと き, 保持板 1およびアルミ箔 4を電流供給経路とする。 かく して, 第 4 図に示すようにビアホール 1 2が形成される。 ここにおいて, 保持板 1 およびアルミ箔 4の全体を経由して電流が均等に供給されるため, 高速 でめつきできかつめつき厚の面内均一性が高い。 このため, ビアホール 1 2が複数個ある場合でも場所による凹凸の問題が生じにくい。 また, 電気めつき前に化学めつきを行う必要がない。 なお, ビアホール 1 2の形成のための穴開けは, コンフォーマルマス ク法に限らずラージウィ ンドウ法でもよいし, 銅ダイ レク ト法でもよい 。 さらには, レーザを使わないエッチング法でもよい。 また, めっきの 際には, パターン 9 Aをめつき液による腐食から保護する皮膜を穴開け 前にあらかじめ形成しておくことが望ましい。 Next, a via hole that makes electrical connection between pattern 6A and pattern 9A is formed. This is performed as follows. That is, a hole in the interlayer insulation layer 1 0 by laser processing to the blank 9 C and co informal mask (C 0 2 laser or the like), to fill the hole by electrically plated with copper. At this time, the holding plate 1 and the aluminum foil 4 are used as current supply paths. Thus, a via hole 12 is formed as shown in FIG. Here, since the current is uniformly supplied through the entire holding plate 1 and the aluminum foil 4, the plating can be performed at high speed and the in-plane uniformity of the plating thickness is high. For this reason, even when there are a plurality of via holes 12, the problem of unevenness depending on the location is unlikely to occur. Also, there is no need to perform chemical plating before electrical plating. The holes for forming the via holes 12 are not limited to the conformal mask method but may be a large window method or a copper direct method. Furthermore, an etching method that does not use a laser may be used. In plating, it is desirable to form a film to protect pattern 9A from corrosion by the plating solution before drilling.
次に, 導体層 9の上に層間絶縁層 1 1および導体層 1 4を積層する ( 第 5図) 。 この積層は, 導体層 6の上に層間絶縁層 1 0および導体層 9 を積層したときと同様に, 第 1図に示したものと同じものをホッ トプレ スすることにより行う。 第 5図の状態では, 導体層 9の銅パターン 9 A の上方に導体層 1 4の銅パターン 1 4 Aが位置し, 導体層 6の銅パ夕一 ン 6 Bの上方に導体層 1 4の銅パターン 1 4 Bが位置している。 さらに , 銅パターン 1 4 Aの中にブランク 1 4 Cが, 銅パターン 1 4 Bの中に ブランク 1 4 Dが設けられている。  Next, the interlayer insulating layer 11 and the conductor layer 14 are laminated on the conductor layer 9 (Fig. 5). This lamination is performed by hot pressing the same one as shown in Fig. 1, as in the case of laminating the interlayer insulating layer 10 and the conductor layer 9 on the conductor layer 6. In the state of Fig. 5, the copper pattern 14A of the conductor layer 14 is located above the copper pattern 9A of the conductor layer 9, and the conductor layer 14 is located above the copper layer 6B of the conductor layer 6. The copper pattern 14 B is located. In addition, a blank 14C is provided in the copper pattern 14A, and a blank 14D is provided in the copper pattern 14B.
次に, 銅パターン 9 Aと銅パターン 1 4 Aとを電気的に接続するビア ホール 1 6と, 銅パターン 6 Bと銅パターン 1 4 Bとを電気的に接続す るビアホール 1 7とを形成する (第 6図) 。 ビアホール 1 6, 1 7は, ビアホール 1 2を形成したときと同様にレーザ加工と電気めつきとによ り形成する。 最後に, ガイ ドピン 1 2 , 1 2を抜いて保持板 1から取り 外し, さらにアルミ箔 4を導体層 6から剥がす。 かく して, 第 7図に示 す配線板が製造される。  Next, a via hole 16 for electrically connecting the copper pattern 9A and the copper pattern 14A and a via hole 17 for electrically connecting the copper pattern 6B and the copper pattern 14B are formed. (Fig. 6). The via holes 16 and 17 are formed by laser processing and electric plating in the same manner as when the via holes 12 were formed. Finally, remove the guide pins 1 2 and 1 2 and remove them from the holding plate 1, and peel off the aluminum foil 4 from the conductor layer 6. Thus, the wiring board shown in Fig. 7 is manufactured.
以上詳細に説明したように本実施の形態では, 各導体層を, ステンレ ス鋼の保持板上に固定した状態で形成するとともに, 保持板上に固定さ れた状態のままホッ トプレスして積層している。 このため, 保持板の剛 性および低熱膨張性により, 各導体層における銅パ夕一ンゃ各ビアホー ルの位置精度が高い配線板が製造されている。 また, 銅パターンの形成 やビアホールの充填の際に保持板全体を電流供給経路としてめつきする ので, 高速めつきが可能でありかつ厚さの均一性にも優れている。 かく して, 位置および寸法精度よく導体層のパターン等を形成できる配線板 の製造方法が実現されている。 As described above in detail, in the present embodiment, each conductor layer is formed while being fixed on a stainless steel holding plate, and is laminated by hot pressing while being fixed on the holding plate. are doing. For this reason, due to the rigidity and low thermal expansion of the holding plate, wiring boards with high positional accuracy of the copper plate and each via hole in each conductor layer are manufactured. Also, when forming copper patterns and filling via holes, the entire holding plate is used as a current supply path. Therefore, high-speed plating is possible and the uniformity of thickness is excellent. Thus, a method of manufacturing a wiring board that can form a conductor layer pattern and the like with good positional and dimensional accuracy has been realized.
なお, 本実施の形態は単なる例示にすぎず, 本発明を何ら限定するも のではない。 したがって本発明は当然に, その要旨を逸脱しない範囲内 で種々の改良, 変形が可能である。  The present embodiment is merely an example, and does not limit the present invention in any way. Therefore, naturally, the present invention can be variously improved and modified without departing from the gist thereof.
例えば, 使用する各部の材料は目的に沿うものであれば別のものでも 良い。 特に, 本形態でステンレス鋼を用いた保持板については, 必要な 機械的強度とある程度の低熱膨張性を持つものなら他の素材でもよい。 普通鋼も候補の 1つであるが, 繰り返し使用する場合の耐食性を考える とステンレス鋼の方がよい。 また, 低熱膨張性に着目すればアンバー合 金 (インバー, イ ンバルともいう) も有力な候補だが, 供給の安定性と いう点ではステンレス鋼の方が優れる。  For example, different materials may be used as long as they are suitable for the purpose. In particular, for the holding plate made of stainless steel in this embodiment, other materials may be used as long as they have the required mechanical strength and a certain degree of low thermal expansion. Plain steel is one of the candidates, but stainless steel is better for corrosion resistance when used repeatedly. Amber alloy (also referred to as invar or invar) is a promising candidate if attention is paid to its low thermal expansion, but stainless steel is superior in terms of supply stability.
また, 積層の段数は異なってもよい。 積層の方法は, 2段目以上 (第 6図中の導体層 9, 1 4 ) については通常のビルドアップ法でもよい。 また, 保持板上に最初に貼るアルミ箔に替えて銅箔を用い, これを配線 板における導体層として用いることも考えられる。 その場合, 最後に保 持板から外してから最初の銅箔をパターニングすればよい。  Also, the number of layers in the stack may be different. The stacking method may be the ordinary build-up method for the second and higher layers (conductor layers 9 and 14 in Fig. 6). It is also conceivable to use copper foil instead of the aluminum foil that is first attached to the holding plate, and use this as the conductor layer in the wiring board. In that case, the first copper foil should be patterned after the last removal from the holding plate.
さらに, 本形態では平板状の保持板を利用するバッチ処理方式の製造 方法を説明したが, reel to ree l法による連続処理も可能である。 すな わち, 各材料としてロール状の長尺材を用い, プレスの際には口一ルプ レス法を用いるのである。 その場合の保持板としては, 厚さ 0 . 1 m m 程度のステンレス鋼帯を用いればよい。 産業上の利用可能性  Furthermore, in this embodiment, the batch processing method using a flat holding plate has been described, but continuous processing by the reel to reel method is also possible. In other words, a roll of long material is used for each material, and the single-press method is used for pressing. In this case, a stainless steel strip with a thickness of about 0.1 mm may be used as the holding plate. Industrial applicability
以上の説明から明らかなように本発明によれば, 位置および寸法精度 よく導体層のパターン等を形成できる配線板の製造方法が提供されてい る。 As is clear from the above description, according to the present invention, the position and dimensional accuracy There has been provided a method of manufacturing a wiring board that can form a pattern of a conductor layer or the like well.

Claims

請 求 の 範 囲 The scope of the claims
1 . 導体パターンと層間絶縁層とを交互に積層する配線板の製造方法 において, 1. In a method of manufacturing a wiring board in which conductor patterns and interlayer insulating layers are alternately laminated,
剛性のある材質の保持板の上に加熱加圧プロセスを用いて導体パター ンおよび層間絶縁層を積層する工程 ( 1 ) と,  (1) laminating a conductor pattern and an interlayer insulating layer on a rigid holding plate using a heating and pressing process;
工程 ( 1 ) より後で前記保持板と積層物とを分離する工程 ( 2 ) とを 含むことを特徴とする配線板の製造方法。  A method for manufacturing a wiring board, comprising: a step (2) of separating the holding plate and the laminate after the step (1).
2 . 請求の範囲第 1項に記載する配線板の製造方法において,  2. In the method for manufacturing a wiring board according to claim 1,
前記工程 ( 1 ) を, 2枚の剛性のある保持板上にそれそれ固定的に保 持された導体パターンを, 層間絶縁層を間に挟んで対面させて行うこと を特徴とする配線板の製造方法。  The above-mentioned step (1) is carried out by conducting a conductor pattern fixedly held on two rigid holding plates, respectively, with the interlayer insulating layer interposed therebetween. Production method.
3 . 請求の範囲第 1項または第 2項に記載する配線板の製造方法にお いて,  3. In the method for manufacturing a wiring board according to claim 1 or 2,
前記保持板として導電体を用い,  Using a conductor as the holding plate,
積層された層間絶縁層にホールを形成するとともに, 前記保持板を電 流供給経路とする電気めつきにより前記ホールを充填して層間接続構造 を形成する工程を含むことを特徴とする配線板の製造方法。  Forming a hole in the laminated interlayer insulating layer and filling the hole by electric plating using the holding plate as a current supply path to form an interlayer connection structure. Production method.
PCT/JP2001/000776 2000-02-15 2001-02-02 Method of manufacturing wiring board WO2001062055A1 (en)

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Application Number Priority Date Filing Date Title
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JP2000036066A JP2001230547A (en) 2000-02-15 2000-02-15 Method for manufacturing wiring board

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Publication number Priority date Publication date Assignee Title
CN102340929B (en) * 2010-07-20 2014-04-02 王定锋 Single-sided circuit board made by respectively hot-pressing insulating layers on two sides of flat wires
JP6231773B2 (en) * 2013-05-15 2017-11-15 矢崎総業株式会社 Method for manufacturing thick film circuit board

Citations (2)

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JPS56155587A (en) * 1980-05-02 1981-12-01 Fujitsu Ltd Printed circuit board
JPH08204333A (en) * 1995-01-31 1996-08-09 Toshiba Corp Manufacture of printed wiring board

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JPS63150991A (en) * 1986-12-15 1988-06-23 松下電工株式会社 Manufacture of circuit board
JPH01246897A (en) * 1988-03-29 1989-10-02 Sumitomo Bakelite Co Ltd Manufacture of multilayer printed circuit board
JPH06177277A (en) * 1992-12-08 1994-06-24 Toppan Printing Co Ltd Manufacture of semiconductor device
JPH08139450A (en) * 1994-11-07 1996-05-31 Toshiba Corp Manufacturing method of printed-wiring board
JPH1070363A (en) * 1996-08-27 1998-03-10 Toshiba Corp Method for manufacturing printed wiring board

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Publication number Priority date Publication date Assignee Title
JPS56155587A (en) * 1980-05-02 1981-12-01 Fujitsu Ltd Printed circuit board
JPH08204333A (en) * 1995-01-31 1996-08-09 Toshiba Corp Manufacture of printed wiring board

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