WO2001046724A1 - System for producing optical circuits by etching structures out of a semiconductor material - Google Patents

System for producing optical circuits by etching structures out of a semiconductor material Download PDF

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Publication number
WO2001046724A1
WO2001046724A1 PCT/EP2000/011932 EP0011932W WO0146724A1 WO 2001046724 A1 WO2001046724 A1 WO 2001046724A1 EP 0011932 W EP0011932 W EP 0011932W WO 0146724 A1 WO0146724 A1 WO 0146724A1
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Prior art keywords
doped
etching
semiconductor material
channels
optical circuits
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PCT/EP2000/011932
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German (de)
French (fr)
Inventor
Hans W. P. Koops
Ivan M. Tiginyanu
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Deutsche Telekom Ag
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Priority to EP00993541A priority Critical patent/EP1250617A1/en
Publication of WO2001046724A1 publication Critical patent/WO2001046724A1/en

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G02B6/1225—Basic optical elements, e.g. light-guiding paths comprising photonic band-gap structures or photonic lattices
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching

Definitions

  • the invention relates to a method for producing optical circuits by field-guided electrolytic etching of nanostructured regions made of a semiconductor material.
  • Photonic crystals consist of periodically structured materials in the smallest dimensions for the geometric definition of band gaps for the propagation of light. Special structures can be used to produce mirrors, filters, resonators, waveguides, beam splitters, couplers, switches and optically selective resonators for micro lasers. The optical properties of the components are always determined by the structuring of the material through hole arrangements, defects and other structural elements.
  • etching techniques are used in dry and wet processes, and the three-dimensional layer structure by means of lithographic or deposition processes, such as sputtering and additive three-dimensional lithography with electron or ion beams. These methods are known (Yablonowitz, John, Lin, Lehmann, Grüning, Birner, Koops SPIE). See the review article in Physikalische wall 55, 1999, No. 4, 27-33.
  • the light-guiding channels of a highly selective photonic crystal must have a depth dimension of at least ten times the light wavelength.
  • Electrolytic etching can be used to produce holes and channels in a material with a diameter down to a third of the wavelength of the light to be influenced (visible or infrared), so that at least one depth-to-depth is used to produce the desired depth dimensions of the crystal structure. Diameter ratio T / D of 30 must be achieved.
  • T / D depth-to-diameter ratio
  • nanostructured patterns in the form of punctures are introduced into a masking layer (positive lacquer) covering the material.
  • a masking layer positive lacquer
  • the holes in the masking layer then become pointed etching pits of shallow depth and with a geometric structure and shape defined by the crystallographic orientation of the material in the surface of the Material introduced.
  • the crystal channels are then fabricated using light-assisted electrolytic etching with field guidance.
  • An electrical voltage is applied to the material, which allows the size and shape of the channels to be controlled.
  • By irradiating the back with high-energy light electron-hole pairs are created on the irradiated surface of the material. Charge carriers diffuse from there to the points of highest field strength, which are caused by the
  • the geometry of the dielectric and the edges and tips of the etching pits defined in the first etching step are defined, i.e. to the tops of the caustic pits.
  • the electrolytic removal process takes place there with the help of the charge carriers triggered by the light.
  • the etching pits deepen and widen in the material in the direction of the applied electric field to holes and channels.
  • the process is interrupted by switching off the etching voltage when the channels have been worked deep enough into the material.
  • the resulting inner surfaces are polished electrolytically in order to avoid excessive scattering of the light to be conducted on these surfaces.
  • the object of the present invention is to provide a method of the type mentioned at the outset which enables an etch stop which can be precisely specified.
  • this object is achieved in that the semiconductor material used is conductively doped homogeneously in such a predetermined concentration that the electrically non-conductive depletion zone occurring on the resulting surfaces has an average thickness of just half the desired wall thickness between two channels under the intended production end conditions having.
  • the invention is based on the finding that the etching process stops when the depletion zones of the semiconductor material existing on the inner surfaces of two holes collide.
  • This depletion zone the thickness of which is largely material-specific, is electrically non-conductive.
  • charge carriers can no longer be exchanged transversely to the depth direction of the holes, and the electrolytic process and thus the widening of the holes transversely to the depth direction are completely interrupted.
  • the etching process stops so precisely that in most cases even polishing the Canal walls can be omitted. In contrast, with conventional etching processes, a strong surface roughness remains.
  • the wall thickness W of the remaining material (double the thickness of the depletion zone) is
  • the resulting wall thicknesses of the material remaining between the channels and, due to the spacing of the etching pits, the width of the holes and channels themselves can be determined with sufficient accuracy even before the etching process.
  • This also has the advantage that the production process no longer has to be monitored as precisely as there is no longer any danger of the channels widening. Since the thickness of the depletion zone is also voltage-dependent, small changes in the etching voltage can be made for fine adjustment of the remaining wall thicknesses.
  • the material is n-doped silicon or n-doped GaAs, which is conductively doped with a concentration of 10 13 / cm 3 to 10 20 / cm 3 .
  • Both materials are suitable for that Proposed method, with approximately the same thickness of the depletion layer and thus the resulting wall thickness, with the same doping and the same etching voltage. Otherwise, both materials behave similarly to III / V semiconductors.
  • a further embodiment of the invention provides that the material is InP or n-GaAs, which is doped to 10 17 / cm 3 . This gives the depletion zone a thickness of approximately 50 nm. The remaining wall thickness is thus set to approximately 100 nm.
  • orientation of crystallographic levels of the material is selected such that the desired inner ones
  • Boundary surfaces of the channels and holes are parallel to it. In this way, very smooth surfaces are created when etching the holes and channels, even without polishing, which are suitable for direct use. Furthermore, this measure and the etching pits precisely aligned with the material orientation allow the shape of the finished holes to be specified within the framework of the crystallographic geometry. For example, it is possible to produce holes with a precisely triangular, square or hexagonal cross section with very smooth side walls. Since the etching process comes to a standstill when neighboring holes have approximated to the remaining wall thickness, an exact alignment of all the hole walls with one another arises.
  • a further development of the invention provides that etching pits with a rectangular cross section are specified in the masking layer for the production of waveguides with smooth side surfaces. In this way, wastage can be lost Avoid geometry-related roughness.
  • the waveguides can be manufactured with the automatically acting etching stop with smooth surfaces.

Abstract

According to the inventive method for producing optical circuits by means of field-guided electrolytic etching of nanostructured regions out of a semiconductor material, the utilized semiconductor material is doped in a conductively homogeneous manner in a concentration that is predetermined such that the electrically nonconductive depletion area occurring on the resulting surfaces has, with regard to the stipulated manufacturing final conditions, an average thickness of exactly half the desired wall thickness between two channels.

Description

Anordnung zur Herstellung optischer Schaltungen durch Ätzung aus HalbleitermaterialArrangement for producing optical circuits by etching from semiconductor material
Die Erfindung betrifft ein Verfahren zur Herstellung optischer Schaltungen durch feldgeführte elektrolytische Ätzung nanostrukturierter Bereiche aus einem Halbleitermaterial .The invention relates to a method for producing optical circuits by field-guided electrolytic etching of nanostructured regions made of a semiconductor material.
Photonische Kristalle bestehen aus periodisch in kleinsten Abmessungen strukturierten Materialien zur geometrischen Definition von Bandlücken für die Ausbreitung von Licht. Durch spezielle Strukturen können Spiegel, Filter, Resonatoren, Wellenleiter, Strahlteiler, Koppler, Weichen und optisch selektiv wirkende Resonatoren für Mikro-Laser erzeugt werden. Die optischen Eigenschaften der Bauelemente werden dabei stets durch die Strukturierung des Materials durch Lochanordnungen, Defekte und andere Strukturelemente bestimmt.Photonic crystals consist of periodically structured materials in the smallest dimensions for the geometric definition of band gaps for the propagation of light. Special structures can be used to produce mirrors, filters, resonators, waveguides, beam splitters, couplers, switches and optically selective resonators for micro lasers. The optical properties of the components are always determined by the structuring of the material through hole arrangements, defects and other structural elements.
Zur Herstellung derartig fein strukturierter Festkörper werden Ätztechniken in trockenen und nassen Verfahren, sowie der dreidimensionale Schichtaufbau durch lithografische oder Depositions-Verfahren, wie Sputtern und additive dreidimensionale Lithografie mit Elektronen- oder Ionenstrahlen, eingesetzt. Diese Verfahren sind bekannt (Yablonowitz, John, Lin, Lehmann, Grüning, Birner, Koops SPIE) . Siehe dazu den Übersichtsartikel in Physikalische Blätter 55, 1999, Nr. 4, 27-33.To produce such finely structured solids, etching techniques are used in dry and wet processes, and the three-dimensional layer structure by means of lithographic or deposition processes, such as sputtering and additive three-dimensional lithography with electron or ion beams. These methods are known (Yablonowitz, John, Lin, Lehmann, Grüning, Birner, Koops SPIE). See the review article in Physikalische Blätter 55, 1999, No. 4, 27-33.
Die lichtleitenden Kanäle eines hochselektiven photonischen Kristalls müssen eine Tiefenausdehnung von wenigstens der zehnfachen Lichtwellenlänge aufweisen. Bei der Anwendung chemisch abtragender Verfahren erfolgt neben einem Abtrag in der Tiefe gleichzeitig auch eine Aufweitung der gefertigten Strukturen. Durch elektrolytisches Ätzen lassen sich Lochstellen und Kanäle in einem Material mit einem Durchmesser bis hinunter zu einem Drittel der Wellenlänge des zu beeinflussenden Lichts (sichtbar oder infrarot) fertigen, so dass zur Herstellung der gewünschten Tiefenabmessungen der Kristallstruktur mittels dieser Verfahren wenigstens ein Tiefen-zu-Durchmesser-Verhältnis T/D von 30 erreicht werden muss .The light-guiding channels of a highly selective photonic crystal must have a depth dimension of at least ten times the light wavelength. When using chemical ablation processes, in addition to ablation in the depth at the same time an expansion of the manufactured structures. Electrolytic etching can be used to produce holes and channels in a material with a diameter down to a third of the wavelength of the light to be influenced (visible or infrared), so that at least one depth-to-depth is used to produce the desired depth dimensions of the crystal structure. Diameter ratio T / D of 30 must be achieved.
Mit beispielsweise durch Japan Journal of Applied Physics, Vol. 33 (1994), Seiten 7099-7107 und SPIE, Vol. 2849 (1996), S. 248 bekannten lithografischen Verfahren lassen sich bestenfalls Werte von T/D bis etwa 5 herstellen. Auch mit additiver Nanolithografie durch elektronen- und ionenstrahlinduzierte Deposition können nur T/D-Werte bis etwa 20 erreicht werden. Durch elektrolytisches Ätzen (Lehmann, Grüning und Birner) können dagegen bei den gewünschten Größenverhältnissen Kanäle mit einem Tiefen-zu-Durchmesser-Verhältnis (T/D) von über 100 gefertigt werden, so dass dieses Verfahren zur Herstellung der angesprochenen Kristalle hervorragend geeignet ist.With, for example, known from Japan Journal of Applied Physics, vol. 33 (1994), pages 7099-7107 and SPIE, vol. 2849 (1996), p. 248, at best values from T / D to about 5 can be produced. Even with additive nanolithography through electron and ion beam induced deposition, only T / D values up to about 20 can be achieved. By electrolytic etching (Lehmann, Grüning and Birner), on the other hand, channels with a depth-to-diameter ratio (T / D) of over 100 can be produced at the desired size ratios, so that this method is excellently suitable for producing the crystals mentioned.
Dabei werden durch lithografische Strukturierverfahren, wie optische oder Korpuskularstrahlen-Lithografie (Bestrahlung mit anschließender naßchemischer Entwicklung) , nanostrukturierte Muster in Form von Lochanstichen in eine das Material abdeckende MaskierungsSchicht (Positivlack) eingebracht. Bei einem ersten Ätzschritt werden sodann die in der Maskierungsschicht befindlichen Löcher zu spitz zulaufenden Ätzgruben geringer Tiefe und mit einer durch die kristallografische Orientierung des Materials definierten geometrischen Struktur und Form in die Oberfläche des Materials eingebracht. Danach werden die Kristallkanäle durch lichtunterstützte elektrolytische Ätzung mit Feldführung gefertigt.Using lithographic structuring methods such as optical or corpuscular beam lithography (radiation with subsequent wet chemical development), nanostructured patterns in the form of punctures are introduced into a masking layer (positive lacquer) covering the material. In a first etching step, the holes in the masking layer then become pointed etching pits of shallow depth and with a geometric structure and shape defined by the crystallographic orientation of the material in the surface of the Material introduced. The crystal channels are then fabricated using light-assisted electrolytic etching with field guidance.
An das Material wird dabei eine elektrische Spannung angelegt, welche es erlaubt, die Größe und Form der Kanäle zu steuern. Durch Bestrahlung der Rückseite mit energiereichem Licht entstehen an der bestrahlten Oberfläche des Materials Elektron-Loch-Paare. Ladungsträger diffundieren von dort aus zu den Stellen höchster Feldstärke, welche durch dieAn electrical voltage is applied to the material, which allows the size and shape of the channels to be controlled. By irradiating the back with high-energy light, electron-hole pairs are created on the irradiated surface of the material. Charge carriers diffuse from there to the points of highest field strength, which are caused by the
Geometrie des Dielektrikums und die im ersten Ätzschritt definierten Kanten und Spitzen der Ätzgruben festgelegt sind, d.h. zu den Spitzen der Ätzgruben. Dort findet mit Hilfe der durch das Licht ausgelösten Ladungsträger der elektrolytische Abtragprozess (Ätzen) statt. Durch fortschreitendes Ätzen vertiefen und weiten sich die Ätzgruben im Material in Richtung des angelegten elektrischen Felds zu Löchern und Kanälen. Der Vorgang wird durch Abschalten der Ätzspannung unterbrochen, wenn die Kanäle tief genug ins Material eingearbeitet sind. Bei diesem Ätzvorgang werden die entstandenen inneren Oberflächen elektrolytisch poliert, um eine zu starke Streuung des zu leitenden Lichts an diesen Oberflächen zu vermeiden.The geometry of the dielectric and the edges and tips of the etching pits defined in the first etching step are defined, i.e. to the tops of the caustic pits. The electrolytic removal process (etching) takes place there with the help of the charge carriers triggered by the light. As etching progresses, the etching pits deepen and widen in the material in the direction of the applied electric field to holes and channels. The process is interrupted by switching off the etching voltage when the channels have been worked deep enough into the material. In this etching process, the resulting inner surfaces are polished electrolytically in order to avoid excessive scattering of the light to be conducted on these surfaces.
Problematisch ist bei der beschriebenen Vorgehensweise, dass der Ätzprozess beim Abschalten der Spannung nicht sofort unterbrochen wird, da sich in den nur wenige hundert Nanometer dicken Kanälen und Löchern noch elektrolytisch wirksame ÄtzChemikalien befinden, die erst in einem zeitauf ändigen Trockenvorgang entfernt werden müssen. Dadurch kann es zur ungewollten Ausweitung der fertigen Kanäle kommen und damit zur Veränderung der optischen Eigenschaften des fertigen Kristalls. Da die lichtunterstützte feldgeführte elektrolytische Ätzung sich grundsätzlich zur Fertigung ganzer optischer Schaltungen eignet, ist ein genau vorgebbarer Ätzstopp also notwendig und von herausragender technischer Bedeutung, weil damit die serienmäßige und kostengünstige Fertigung von Schaltungen mit photonischen Kristallstrukturen mit reproduzierbarer Qualität möglich wird.The problem with the procedure described is that the etching process is not interrupted immediately when the voltage is switched off, since there are still electrolytically active etching chemicals in the channels and holes, which are only a few hundred nanometers thick, which have to be removed in a time-consuming drying process. This can lead to an unwanted expansion of the finished channels and thus to a change in the optical properties of the finished crystal. Since the Light-assisted, field-guided electrolytic etching is basically suitable for the production of entire optical circuits, an exactly definable etching stop is therefore necessary and of outstanding technical importance because it enables the serial and cost-effective production of circuits with photonic crystal structures with reproducible quality.
Aufgabe der vorliegenden Erfindung ist es, ein Verfahren der eingangs genannten Art anzugeben, welches einen genau vorgebbaren Ätzstopp ermöglicht.The object of the present invention is to provide a method of the type mentioned at the outset which enables an etch stop which can be precisely specified.
Diese Aufgabe wird erfindungsgemäß dadurch gelöst, dass das verwendete Halbleitermaterial in einer derart vorgegebenen Konzentration leitend homogen dotiert wird, dass die an den entstehenden Oberflächen auftretende elektrisch nichtleitende Verarmungszone bei den vorgesehenen Fertigungs-Endbedingungen eine mittlere Dicke von gerade der Hälfte der gewünschten Wandstärke zwischen zwei Kanälen aufweist.According to the invention, this object is achieved in that the semiconductor material used is conductively doped homogeneously in such a predetermined concentration that the electrically non-conductive depletion zone occurring on the resulting surfaces has an average thickness of just half the desired wall thickness between two channels under the intended production end conditions having.
Der Erfindung liegt die Erkenntnis zugrunde, dass der Ätzvorgang stoppt, wenn die an den inneren Oberflächen zweier Löcher bestehenden Verarmungszonen des Halbleitermaterials zusammenstoßen. Diese Verarmungszone, deren Dicke größtenteils materialspezifisch ist, ist elektrisch nichtleitend. Dadurch können auch bei noch in dem porösen Material enthaltenen wirksamen ÄtzChemikalien keine Ladungsträger mehr quer zur Tiefenrichtung der Löcher ausgetauscht werden und der elektrolytische Prozess und damit die Aufweitung der Löcher quer zur Tiefenrichtung wird gänzlich unterbrochen. Der Ätzprozess stoppt dabei so exakt, dass in den meisten Fällen sogar das Nachpolieren der Kanalwände entfallen kann. Bei herkömmlichen Ätzverfahren bleibt demgegenüber eine starke Oberflächenrauhigkeit zurück.The invention is based on the finding that the etching process stops when the depletion zones of the semiconductor material existing on the inner surfaces of two holes collide. This depletion zone, the thickness of which is largely material-specific, is electrically non-conductive. As a result, even with effective etching chemicals still contained in the porous material, charge carriers can no longer be exchanged transversely to the depth direction of the holes, and the electrolytic process and thus the widening of the holes transversely to the depth direction are completely interrupted. The etching process stops so precisely that in most cases even polishing the Canal walls can be omitted. In contrast, with conventional etching processes, a strong surface roughness remains.
Die spezifischen Eigenschaften der erzeugten Bauelemente werden somit nur noch durch die vor dem Ätzen vorgefertigte lithografische Strukturierung mittels Ätzgruben und durch die voreingestellte Dotierung der Materialien definiert.The specific properties of the components produced are therefore only defined by the lithographic structuring by means of etching pits, which was pre-etched, and by the preset doping of the materials.
Die Wandstärke W des verbleibenden Materials (doppelte Dicke der Verarmungszone) beträgtThe wall thickness W of the remaining material (double the thickness of the depletion zone) is
1 W = [{2-εr -ε0)l{e - Nd)- U]2 , wobei εr die Dielektrizitätskonstante des Grundmaterials, EQ die absolute Dielektrizitätskonstante, e die Elementarladung, Nd die Dotierungskonzentration und U die angelegte Ätzspannung ist.1 W = [{2-ε r -ε 0 ) l {e - Nd) - U] 2, where ε r is the dielectric constant of the base material, EQ is the absolute dielectric constant, e is the elementary charge, Nd is the doping concentration and U is the applied etching voltage ,
Mit dem vorgeschlagenen Verfahren lassen sich die resultierenden Wandstärken des zwischen den Kanälen verbleibenden Materials und durch den Abstand der Ätzgruben damit auch die Breite der Löcher und Kanäle selbst in ausreichender Genauigkeit bereits vor dem Ätzvorgang festlegen. Dies hat zudem den Vorteil, dass der Fertigungsverlauf nicht mehr so genau überwacht werden muss, da die Gefahr einer Aufweitung der Kanäle nicht mehr besteht. Da die Dicke der Verarmungszone auch spannungsabhängig ist, können geringe Änderungen der Ätzspannung zum Feinabgleich der verbleibenden Wandstärken vorgenommen werden.With the proposed method, the resulting wall thicknesses of the material remaining between the channels and, due to the spacing of the etching pits, the width of the holes and channels themselves can be determined with sufficient accuracy even before the etching process. This also has the advantage that the production process no longer has to be monitored as precisely as there is no longer any danger of the channels widening. Since the thickness of the depletion zone is also voltage-dependent, small changes in the etching voltage can be made for fine adjustment of the remaining wall thicknesses.
Bei einer ersten Ausgestaltung der Erfindung ist vorgesehen, dass das Material n-dotiertes Silizium oder n-dotiertes GaAs ist, welches mit einer Konzentration von 1013/cm3 bis 1020/cm3 leitend dotiert ist. Beide Materialien eignen sich für das vorgeschlagene Verfahren, wobei sich bei gleicher Dotierung und gleicher Ätzspannung bei beiden Materialien etwa die gleiche Dicke der VerarmungsSchicht und damit der resultierenden Wandstärke ergibt. Beide Materialien verhalten sich ansonsten ähnlich wie III/V-Halbleiter.In a first embodiment of the invention it is provided that the material is n-doped silicon or n-doped GaAs, which is conductively doped with a concentration of 10 13 / cm 3 to 10 20 / cm 3 . Both materials are suitable for that Proposed method, with approximately the same thickness of the depletion layer and thus the resulting wall thickness, with the same doping and the same etching voltage. Otherwise, both materials behave similarly to III / V semiconductors.
Eine weitere Ausgestaltung der Erfindung sieht vor, dass das Material InP oder n-GaAs ist, welches zu 1017/cm3 dotiert ist. Damit erhält man eine Dicke der Verarmungszone von etwa 50 nm. Die verbleibende Wandstärke wird somit auf etwa 100 nm eingestellt.A further embodiment of the invention provides that the material is InP or n-GaAs, which is doped to 10 17 / cm 3 . This gives the depletion zone a thickness of approximately 50 nm. The remaining wall thickness is thus set to approximately 100 nm.
Bei einer Weiterbildung der Erfindung ist vorgesehen, dass die Ausrichtung kristallografischer Ebenen des Materials so gewählt wird, dass die gewünschten innerenIn a further development of the invention, it is provided that the orientation of crystallographic levels of the material is selected such that the desired inner ones
Begrenzungsoberflächen der Kanäle und Löcher parallel dazu liegen. Auf diese Weise entstehen beim Ätzen der Löcher und Kanäle auch ohne Polieren sehr glatte Oberflächen, welche zur direkten Benutzung geeignet sind. Ferner kann durch diese Maßnahme und durch exakt mit der Materialorientierung ausgerichtete Ätzgruben die Form der fertigen Löcher im Rahmen der kristallografischen Geometrie vorgegeben werden. So ist es beispielsweise möglich, Löcher exakt dreieckigen, viereckigen oder sechseckigen Querschnitts mit sehr glatten Seitenwänden zu fertigen. Da der Ätzprozess zum Stillstand kommt, wenn benachbarte Löcher sich bis auf die verbleibende Wanddicke angenähert haben, entsteht eine exakte Ausrichtung aller Lochwände zueinander.Boundary surfaces of the channels and holes are parallel to it. In this way, very smooth surfaces are created when etching the holes and channels, even without polishing, which are suitable for direct use. Furthermore, this measure and the etching pits precisely aligned with the material orientation allow the shape of the finished holes to be specified within the framework of the crystallographic geometry. For example, it is possible to produce holes with a precisely triangular, square or hexagonal cross section with very smooth side walls. Since the etching process comes to a standstill when neighboring holes have approximated to the remaining wall thickness, an exact alignment of all the hole walls with one another arises.
Eine nächste Weiterbildung der Erfindung sieht vor, dass in der Maskierungsschicht Ätzgruben rechteckigen Querschnitts zur Fertigung von Wellenleitern mit glatten Seitenflächen vorgegeben werden. So lassen sich Streuverluste an geometriebedingten Rauhigkeiten vermeiden. Die Wellenleiter können durch den automatisch wirkenden Ätzstopp mit glatten Oberflächen hergestellt werden. A further development of the invention provides that etching pits with a rectangular cross section are specified in the masking layer for the production of waveguides with smooth side surfaces. In this way, wastage can be lost Avoid geometry-related roughness. The waveguides can be manufactured with the automatically acting etching stop with smooth surfaces.

Claims

Ansprüche Expectations
1. Verfahren zur Herstellung optischer Schaltungen durch feldgeführte elektrolytische Ätzung nanostrukturierter Bereiche aus einem Halbleitermaterial, dadurch gekennzeichnet, dass das verwendete Halbleitermaterial in einer derart vorgegebenen Konzentration leitend homogen dotiert wird, dass die an den entstehenden Oberflächen auftretende elektrisch nichtleitende Verarmungszone bei den vorgesehenen Fertigungs-Endbedingungen eine mittlere Dicke von gerade der Hälfte der gewünschten Wandstärke zwischen zwei Kanälen aufweist.1. A process for the production of optical circuits by field-guided electrolytic etching of nanostructured areas made of a semiconductor material, characterized in that the semiconductor material used is doped conductively and homogeneously in such a predetermined concentration that the electrically non-conductive depletion zone occurring on the resulting surfaces under the intended manufacturing end conditions has an average thickness of just half the desired wall thickness between two channels.
2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, dass das Material n-dotiertes Silizium oder n-dotiertes GaAs ist, welches mit einer Konzentration von 1013/cm3 bis 1020/cm3 leitend dotiert ist.2. The method according to claim 1, characterized in that the material is n-doped silicon or n-doped GaAs, which is conductively doped with a concentration of 10 13 / cm 3 to 10 20 / cm 3 .
3. Verfahren nach Anspruch 1, dadurch gekennzeichnet, dass das Material InP oder n-GaAs ist, welches zu 1017/cm3 dotiert ist.3. The method according to claim 1, characterized in that the material is InP or n-GaAs, which is doped to 10 17 / cm 3 .
4. Verfahren nach Anspruch 1, dadurch gekennzeichnet, dass die Ausrichtung kristallografischer Ebenen des Materials so gewählt wird, dass die gewünschten inneren4. The method according to claim 1, characterized in that the alignment of crystallographic planes of the material is chosen so that the desired inner
Begrenzungsoberflächen der Kanäle und Löcher parallel dazu liegen.Boundary surfaces of the channels and holes are parallel to it.
5. Verfahren nach Anspruch 1, dadurch gekennzeichnet, dass in der Maskierungsschicht Ätzgruben rechteckigen Querschnitts zur Fertigung von Wellenleitern mit glatten Seitenflächen vorgegeben werden. 5. The method according to claim 1, characterized in that in the masking layer etching pits of rectangular cross section are specified for the production of waveguides with smooth side surfaces.
PCT/EP2000/011932 1999-12-22 2000-11-29 System for producing optical circuits by etching structures out of a semiconductor material WO2001046724A1 (en)

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DE19961970.0 1999-12-22
DE1999161970 DE19961970A1 (en) 1999-12-22 1999-12-22 Production of optical switches comprises electrolytically etching nanostructured regions made of doped semiconductor material

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