WO2001043327A1 - A transmission system - Google Patents
A transmission system Download PDFInfo
- Publication number
- WO2001043327A1 WO2001043327A1 PCT/AU2000/001520 AU0001520W WO0143327A1 WO 2001043327 A1 WO2001043327 A1 WO 2001043327A1 AU 0001520 W AU0001520 W AU 0001520W WO 0143327 A1 WO0143327 A1 WO 0143327A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- data
- channels
- data stream
- transmission system
- multiplexer
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
- H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
- H04B7/2612—Arrangements for wireless medium access control, e.g. by allocating physical layer transmission capacity
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/14—Monitoring arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1623—Plesiochronous digital hierarchy [PDH]
- H04J3/1647—Subrate or multislot multiplexing
Definitions
- the present invention relates to a transmission system, and in particular to a transmission system for digital radio which is able to optimally utilise a digital radio channel, such as a microwave link.
- Spectrally efficient high-speed microwave radio systems have been developed to emit data rates ranging e.g. from 2 Mbit/s to 45 Mbit/s or their combinations i.e. 2x2 Mbit/s, 4x2 Mbit/s and so on.
- Some include additional n ⁇ 64 kbit/s service channels, where n l, 2, ..., 8, but these channels are used on top of the main data or only the main data is used.
- These systems have the disadvantage that utilisation of a channel's capacity cannot be optimal every time because some customers need main data and not necessarily and exactly all the n additional service channels at one time.
- the n additional channels increase the baseband of a system and reduce its sensitivity. Depending on the particular number of additional channels there is less sensitivity and a wider baseband.
- the n additional channels should be available for different purposes, not only as service channels.
- the present invention relates to a transmission system, including a transmitter for transmitting data on a radio channel, a modulator for receiving said data in a data stream and modulating the data for transmission by said transmitter, characterised by including means for including n additional data channels in said data stream, where n is an integer.
- n may be varied between 1 and 8.
- the data stream may be a 34 Mbit/s data stream, which can support El, E2 and E3 data rates as defined by ITU.
- the additional channels may be 64 kbit/s channels which can carry voice or service data.
- the means includes a controllable module for receiving and selectively outputting the additional channels, and a multiplexer for receiving the data stream and including the channels output by the module in said data stream for output to said modulator.
- the radio channel is a 500 MHz to 26 GHz channel.
- the above transmission system can add 8x64 kbit/s data channels to the 34 Mbit/s stream and still occupy a bandwidth less than 14 MHz on the radio channel with a bit error rate (BER) of greater than -82x10 '6 .
- BER bit error rate
- Figure 1 is a block diagram of a preferred embodiment of a transmission system
- Figure 2 is a block diagram of a controllable module of the transmission system
- Figure 3 is a block diagram of a multiplexer of the transmission system.
- An optimal utilisation of digital radio channel's capacity is achieved using a controllable module (8) with 8 input channels of 64 kbit/s each and a multiplexer (9) which synchronously multiplexes up to 8 extra data channels, 64 kbit/s each, and a main data stream, which supports e.g. El, E2 and E3 data rates as defined by ITU-R or their combinations.
- the controllable module with 8 channels of 64 kbit/s each is connected to the multiplexer before the processing of data in a 70/140 MHz modulator (7) and it provides in turn the optimal spectra and sensitivity of the system. Simultaneous DSP processing of n additional channels keeps robustness of the channels and the main data effectively the same.
- the controllable module increases the flexibility of the system and depending on its configuration i.e. if it is used with or without a forward error correction technique and depending on a value of a roll-off factor ⁇ , which can vary, a particular number n of additional channels can be chosen optimally every time.
- a particular number of additional channels, from 1 up to 8, of the controllable module can be controlled from a control n input (1 1), which is a three line bus, using e.g. DIP switches.
- One of the 8x64 kbit s channels can be used for service purposes.
- a digital synthesiser (22) is used in the controllable module (8) to synchronise a particular number n of the additional channels and the main data.
- the transmitter includes a synthesised phase-lock source (1), which must not include significant phase noise such that system performance is degraded (measured in terms of bit error rate and spectrum usage).
- the synthesised phase-lock source (1) is connected to a multiplier/amplifier (2) and together with an IF amplifier (3) feeds an upconverter (4), which generates, in turn, a particular UHF RF signal depending on the UHF band plan.
- An output of the upconverter (4) is connected to a power amplifier (5) to amplify the UHF RF signal according to the system requirements.
- a channel filter (6) which is connected to the power amplifier (5), reduces spurious emissions according to the system requirements.
- a 70/140 MHz modulator (7) is a flexible DSP based modulator for high data rate transmission which processes the transmitted data depending on the choice of modulation and coding schemes and feeds the IF amplifier (3).
- An example of a suitable modulator is described in A. Guidi et al., "Development of a spectrally efficient, high speed modem for microwave terrestrial satellite communications", What's New in Radio Communications, June/July 1997.
- controllable module (8) and the multiplexer (9) are used to multiplex synchronously of up to 8 extra data channels, 64 kbit/s each, and the main data stream (10), which supports e.g. El, E2 and E3 data rates or their combinations, before the processing of data in the 70/140 MHz modulator (7).
- main data stream (10) which supports e.g. El, E2 and E3 data rates or their combinations.
- a particular number of additional channels, from one up to eight can be controlled from a control n input (11).
- the controllable module (8) is connected to the multiplexer (9) before the processing of data in the 70/140 MHz modulator (7).
- FIG. 2 illustrates use of the controllable module (8) to add 8 additional voice channels for a 2 Mbit/s system.
- PCM codecs e.g. TP3057-X (National Semiconductor) from (12) through (19), which encode signals from 200 Hz up to 3400 Hz into PCM code 64 kbit/s each.
- These eight digital channels, 64 kbit s each, are connected to a 8
- the 4-2-1 line bus is connected to a digital synthesiser (22) as well, to control a clock frequency in the range from 2112 kHz up to 2560 kHz.
- Reference clock 2048 kHz for the digital synthesiser (22) is a synchronous clock to clock the main data of 2048 Mbit/s and is connected to the digital synthesiser (22) from the multiplexer (9).
- a 1 ... 8 bus from the multiplexer (20) is connected to the multiplexer (9).
- Figure 3 shows the multiplexer (9).
- a main data stream (10) e.g. 2048 Mbit/s in HDB3 G.703 form, which supports El data rate, is connected to a line interface (23) e.g. CS61575 of Crystal Semiconductor Corporation.
- Synchronous data 2.048 Mbit/s in NRZ form and a clock 2048 kHz from out of the line interface (23) is connected to a serial 32 bit register (33).
- the clock 2048 kHz feeds a synchronious logic (32), a synchronous counter (35), which divides the clock signal 2048 kHz by 32, and feeds the controllable module (8) as well.
- Each 32 bit frame output from the serial 32 bit register (33) and 1 byte frame output from a parallel 8 bit register (36) are stored into a parallel-to-serial register (37).
- Parallel data of this parallel-to-serial register (37) is stored by a write impulse from the synchronious logic (34), which provides it every time when the serial 32 bit register (33) and the parallel 8 bit register (36) are full and the parallel-to-serial register (37) is empty.
- Data of the parallel-to-serial register (37) is shifted by a clock 2112 ... 2060 kHz from the digital synthesiser (22), this clock 2112 ... 2560 kHz is connected to the synchronious logic (34) as well.
- Data from the multiplexer (20) is connected to the parallel 8 bit register (36).
- Parallel data from the parallel-to-serial register (37) is connected to a multiplexer (38).
- Length of output data from 33 bits up to 40 of the multiplexer (38) is controlled by the 4-2- 1 line bus depending on the number n. - 5
Abstract
A transmission system, including a transmitter for transmitting data on a radio channel, and a modulator for receiving the data in a data stream and modulating the data for transmission by the transmitter, characterised by including a component for including n additional data channels in the data stream, where n is an integer. The component includes a controllable module for receiving and selectively outputting the additional channels, and a multiplexer for receiving the data stream and including the channels output by the module in said data stream for output to said modulator. The data stream is a 34 Mbit/s data stream, which can support E1, E2 and E3 data rates.
Description
A TRANSMISSION SYSTEM
The present invention relates to a transmission system, and in particular to a transmission system for digital radio which is able to optimally utilise a digital radio channel, such as a microwave link.
Today's digital radio network is already congested. To cope with the projected market demand, systems have to improve utilisation of a channel's capacity together with band efficiency and sensitivity. Spectrally efficient high-speed microwave radio systems have been developed to emit data rates ranging e.g. from 2 Mbit/s to 45 Mbit/s or their combinations i.e. 2x2 Mbit/s, 4x2 Mbit/s and so on. Some include additional nχ64 kbit/s service channels, where n=l, 2, ..., 8, but these channels are used on top of the main data or only the main data is used. These systems have the disadvantage that utilisation of a channel's capacity cannot be optimal every time because some customers need main data and not necessarily and exactly all the n additional service channels at one time. Also the n additional channels increase the baseband of a system and reduce its sensitivity. Depending on the particular number of additional channels there is less sensitivity and a wider baseband. Moreover, the n additional channels should be available for different purposes, not only as service channels.
The present invention relates to a transmission system, including a transmitter for transmitting data on a radio channel, a modulator for receiving said data in a data stream and modulating the data for transmission by said transmitter, characterised by including means for including n additional data channels in said data stream, where n is an integer.
Advantageously, n may be varied between 1 and 8. The data stream may be a 34 Mbit/s data stream, which can support El, E2 and E3 data rates as defined by ITU. The additional channels may be 64 kbit/s channels which can carry voice or service data.
Preferably the means includes a controllable module for receiving and selectively outputting the additional channels, and a multiplexer for receiving the data stream and including the channels output by the module in said data stream for output to said modulator.
Preferably the radio channel is a 500 MHz to 26 GHz channel.
Advantageously, the above transmission system can add 8x64 kbit/s data channels to the 34 Mbit/s stream and still occupy a bandwidth less than 14 MHz on the radio channel with a bit error rate (BER) of greater than -82x10'6.
A preferred embodiment of the present invention is hereinafter described, by way of example only, with reference to the accompanying drawings, wherein:
Figure 1 is a block diagram of a preferred embodiment of a transmission system; Figure 2 is a block diagram of a controllable module of the transmission system; and
Figure 3 is a block diagram of a multiplexer of the transmission system.
An optimal utilisation of digital radio channel's capacity is achieved using a controllable module (8) with 8 input channels of 64 kbit/s each and a multiplexer (9) which synchronously multiplexes up to 8 extra data channels, 64 kbit/s each, and a main data stream, which supports e.g. El, E2 and E3 data rates as defined by ITU-R or their combinations. The controllable module with 8 channels of 64 kbit/s each is connected to the multiplexer before the processing of data in a 70/140 MHz modulator (7) and it provides in turn the optimal spectra and sensitivity of the system. Simultaneous DSP processing of n additional channels keeps robustness of the channels and the main data effectively the same. The controllable module increases the flexibility of the system and depending on its configuration i.e. if it is used with or without a forward error correction technique and depending on a value of a roll-off factor α, which can vary, a particular number n of additional channels can be chosen optimally every time. A particular number of additional channels, from 1 up to 8, of the controllable module can be controlled from a
control n input (1 1), which is a three line bus, using e.g. DIP switches. One of the 8x64 kbit s channels can be used for service purposes. A digital synthesiser (22) is used in the controllable module (8) to synchronise a particular number n of the additional channels and the main data.
Referring to Figure 1, the optimal utilisation of a channel's capacity can be applied to and used with a digital microwave link established with a modulator (7) and transmitter. The transmitter includes a synthesised phase-lock source (1), which must not include significant phase noise such that system performance is degraded (measured in terms of bit error rate and spectrum usage). The synthesised phase-lock source (1) is connected to a multiplier/amplifier (2) and together with an IF amplifier (3) feeds an upconverter (4), which generates, in turn, a particular UHF RF signal depending on the UHF band plan. An output of the upconverter (4) is connected to a power amplifier (5) to amplify the UHF RF signal according to the system requirements. A channel filter (6), which is connected to the power amplifier (5), reduces spurious emissions according to the system requirements. A 70/140 MHz modulator (7) is a flexible DSP based modulator for high data rate transmission which processes the transmitted data depending on the choice of modulation and coding schemes and feeds the IF amplifier (3). An example of a suitable modulator is described in A. Guidi et al., "Development of a spectrally efficient, high speed modem for microwave terrestrial satellite communications", What's New in Radio Communications, June/July 1997. To achieve optimal spectra and sensitivity performance of the system the controllable module (8) and the multiplexer (9) are used to multiplex synchronously of up to 8 extra data channels, 64 kbit/s each, and the main data stream (10), which supports e.g. El, E2 and E3 data rates or their combinations, before the processing of data in the 70/140 MHz modulator (7). To achieve an optimal utilisation of spectra and sensitivity of the system and depending on system configuration a particular number of additional channels, from one up to eight, can be controlled from a control n input (11). The controllable module (8) is connected to the multiplexer (9) before the processing of data in the 70/140 MHz modulator (7).
Figure 2 illustrates use of the controllable module (8) to add 8 additional voice channels for a 2 Mbit/s system. The controllable module includes eight PCM codecs e.g. TP3057-X (National Semiconductor) from (12) through (19), which encode signals from 200 Hz up to 3400 Hz into PCM code 64 kbit/s each. These eight digital channels, 64 kbit s each, are connected to a 8 to n multiplexer (20), where n=l , ..., 8. Depending on position of DIP switches 4-2-1 (21), which are connected to the multiplexer (20), from one up to eight 64 kbit/s channels occurs at the output of the multiplexer (20). The 4-2-1 line bus is connected to a digital synthesiser (22) as well, to control a clock frequency in the range from 2112 kHz up to 2560 kHz. Reference clock 2048 kHz for the digital synthesiser (22) is a synchronous clock to clock the main data of 2048 Mbit/s and is connected to the digital synthesiser (22) from the multiplexer (9). A 1 ... 8 bus from the multiplexer (20) is connected to the multiplexer (9).
Figure 3 shows the multiplexer (9). A main data stream (10) e.g. 2048 Mbit/s in HDB3 G.703 form, which supports El data rate, is connected to a line interface (23) e.g. CS61575 of Crystal Semiconductor Corporation. Synchronous data 2.048 Mbit/s in NRZ form and a clock 2048 kHz from out of the line interface (23) is connected to a serial 32 bit register (33). The clock 2048 kHz feeds a synchronious logic (32), a synchronous counter (35), which divides the clock signal 2048 kHz by 32, and feeds the controllable module (8) as well. Each 32 bit frame output from the serial 32 bit register (33) and 1 byte frame output from a parallel 8 bit register (36) are stored into a parallel-to-serial register (37). Parallel data of this parallel-to-serial register (37) is stored by a write impulse from the synchronious logic (34), which provides it every time when the serial 32 bit register (33) and the parallel 8 bit register (36) are full and the parallel-to-serial register (37) is empty. Data of the parallel-to-serial register (37) is shifted by a clock 2112 ... 2060 kHz from the digital synthesiser (22), this clock 2112 ... 2560 kHz is connected to the synchronious logic (34) as well. Data from the multiplexer (20) is connected to the parallel 8 bit register (36). Parallel data from the parallel-to-serial register (37) is connected to a multiplexer (38). Length of output data from 33 bits up to 40 of the multiplexer (38) is controlled by the 4-2- 1 line bus depending on the number n.
- 5
An example of the performance which can be achieved with the above transmission system on a digital radio channel of 1.5 to 10.5 GHz is provided by the data in the table below.
Table 1
TEC - Forward Error Correction, using 7/8 Reed-Solomon code
Many modifications will be apparent to those skilled in the art without departing from the scope of the present invention as herein described with reference to the accompanying drawings.
Claims
1. A transmission system, including: a transmitter for transmitting data on a radio channel; and a modulator for receiving said data in a data stream and modulating the data for transmission by said transmitter; and characterised by including means for including n additional data channels in said data stream, where n is an integer.
2. A transmission system as claimed in claim 1, wherein said means includes a controllable module for receiving and selectively outputting the additional channels, and a multiplexer for receiving the data stream and including the channels output by the module in said data stream for output to said modulator.
3. A transmission system as claimed in claim 2, wherein n is varied between 1 and 8.
4. A transmission system as claimed in claim 2, wherein the data stream is a 34 Mbit/s data stream, which can support El, E2 and E3 data rates.
5. A transmission system as claimed in claim 4, wherein the additional channels are 64 kbit/s channels.
6. A transmission system as claimed in claim 5, wherein the radio channel is a 500 MHz to 26 GHz channel.
7. A transmission system as claimed in claim 5, wherein the radio channel is a microwave link.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AU21271/01A AU2127101A (en) | 1999-12-10 | 2000-12-08 | A transmission system |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AUPQ4578A AUPQ457899A0 (en) | 1999-12-10 | 1999-12-10 | A transmission system |
| AUPQ4578 | 1999-12-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2001043327A1 true WO2001043327A1 (en) | 2001-06-14 |
Family
ID=3818719
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/AU2000/001520 WO2001043327A1 (en) | 1999-12-10 | 2000-12-08 | A transmission system |
Country Status (2)
| Country | Link |
|---|---|
| AU (1) | AUPQ457899A0 (en) |
| WO (1) | WO2001043327A1 (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4397030A (en) * | 1980-03-20 | 1983-08-02 | International Standard Electric Corporation | Digital communication system |
| US4837858A (en) * | 1987-04-30 | 1989-06-06 | Motorola, Inc. | Subscriber unit for a trunked voice/data communication system |
| US4870408A (en) * | 1987-04-30 | 1989-09-26 | Motorola, Inc. | Method for dynamically allocating data channels on a trunked communication system |
| JPH07212341A (en) * | 1994-01-21 | 1995-08-11 | Sharp Corp | Media multiplexing device |
| US5903567A (en) * | 1996-02-29 | 1999-05-11 | Siemens Aktiengesselschaft | Method of data transmission |
| US5903573A (en) * | 1996-03-14 | 1999-05-11 | Alcatel Althom Compagnie Generale D'electricite | Apparatus for reducing transmission capacity |
| US5963873A (en) * | 1996-12-20 | 1999-10-05 | Fujitsu Limited | Digital multiplex radio system |
-
1999
- 1999-12-10 AU AUPQ4578A patent/AUPQ457899A0/en not_active Abandoned
-
2000
- 2000-12-08 WO PCT/AU2000/001520 patent/WO2001043327A1/en active Application Filing
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4397030A (en) * | 1980-03-20 | 1983-08-02 | International Standard Electric Corporation | Digital communication system |
| US4837858A (en) * | 1987-04-30 | 1989-06-06 | Motorola, Inc. | Subscriber unit for a trunked voice/data communication system |
| US4870408A (en) * | 1987-04-30 | 1989-09-26 | Motorola, Inc. | Method for dynamically allocating data channels on a trunked communication system |
| JPH07212341A (en) * | 1994-01-21 | 1995-08-11 | Sharp Corp | Media multiplexing device |
| US5903567A (en) * | 1996-02-29 | 1999-05-11 | Siemens Aktiengesselschaft | Method of data transmission |
| US5903573A (en) * | 1996-03-14 | 1999-05-11 | Alcatel Althom Compagnie Generale D'electricite | Apparatus for reducing transmission capacity |
| US5963873A (en) * | 1996-12-20 | 1999-10-05 | Fujitsu Limited | Digital multiplex radio system |
Also Published As
| Publication number | Publication date |
|---|---|
| AUPQ457899A0 (en) | 2000-01-13 |
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