GB2317538A - Discretely variable slot width in TDM/TDMA systems - Google Patents

Discretely variable slot width in TDM/TDMA systems Download PDF

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Publication number
GB2317538A
GB2317538A GB9719679A GB9719679A GB2317538A GB 2317538 A GB2317538 A GB 2317538A GB 9719679 A GB9719679 A GB 9719679A GB 9719679 A GB9719679 A GB 9719679A GB 2317538 A GB2317538 A GB 2317538A
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Prior art keywords
time slots
aggregated
time
preamble
postamble
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Withdrawn
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GB9719679A
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GB9719679D0 (en
Inventor
James Mason Williams
Timothy Mark Burke
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Motorola Solutions Inc
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Motorola Inc
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Publication of GB9719679D0 publication Critical patent/GB9719679D0/en
Publication of GB2317538A publication Critical patent/GB2317538A/en
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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/2801Broadband local area networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/16Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605Fixed allocated frame structures
    • H04J3/1623Plesiochronous digital hierarchy [PDH]
    • H04J3/1647Subrate or multislot multiplexing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/16Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1694Allocation of channels in TDM/TDMA networks, e.g. distributed multiplexers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/64Hybrid switching systems

Abstract

A system protocol for a communication system having a number of time frames (402), each of the number of time frames having a predetermined period of time divided into a number of discrete multiple time slots (452) wherein a total width of all of the number of discrete multiple time slots is equal to the predetermined period of time, a given number of the number of discrete multiple time slots are aggregated (aggregated time slots) (440), and a preamble (450) is provided at a beginning of the aggregated time slots and is not replicated anywhere else in the aggregated time slots.

Description

2317538 DISCRETELY VARIABLE SLOT WIDTH IN TDMITDMA SYSTEMS
Field of the Invention 5
The present invention relates, in general, to broadband RF communications protocols, and in particular, to a protocol which aggregates time slot payloads within a TI)NVTDMA system to allow the transfer of multi-rate and/or digitally encoded analog signals.
Background of the Invention
In TDMITDMA (time division multiplexing, time division multiple access) digital communications systems, Nmax time slots, organized into constant rate frame structures, are multiplexed onto each set of FDD (frequency division duplex) carriers. Each time slot represents one direction of a basic constant rate duplex channel. A duplex channel (or carrier) consists of an upstream channel and a downstream channel and is associated with a protocol appropriate to a TI)WTDMA system.
A group of bits (called a burst) transmitted according to a protocol of a TI)WTDMA system will be transmitted in each time slot of a time frame within a given frequency (or carrier).
The time frames recur with a fixed duration of Tf. Each of the bursts in conventional TDMITDMA protocols is partitioned into two parts: an overhead portion and a payload portion. The number of bits in the payload partition divided by the frame rate, Tf, represents the bit rate, Bc, of each full-rate channel.
Conventional TI)WTDMA systems generally have Nmax full-rate channels time division multiplexed onto each pair of duplex carriers. For applications requiring bit rates higher than B,,, two or more of the Nmax time slots in each time frame are assigned to the same user. In these cases, the data is 2 fragmented for transmission in the multiple payloads (where the time slots each have an overhead and payload) and re assembled at the receiving end of the link. This process is referred to as inverse multiplexing or a multi-slot approach.
The time slots within a multi-slot assignment do not need to be consecutive within a time frame since fragmenting of the payload occurs anyway.
As mentioned, each of the inverse multiplexed time slots in a multi-slot assignment, or aggregated time slots, contain both an overhead portion and a payload portion. However, the retained overhead bits of each of the aggregated time slots are redundant since the functionality of each of the overhead bits are duplicated within each. For each aggregated time slot, there is an associated overhead portion where the information within each of the overhead portion bits is identical for each aggregated time slot. Accordingly, the total aggregate payload for the multi-slot assignment is then P-N x ((total bits/burst) - (overhead bits/burst)). As can be seen, substantial waste of bits occurs in the multi-slot approach.
Brief Description of the Drawings
FIG. 1 shows a block diagram of a communication system in which a system protocol according to the present invention operates.
FIG. 2 shows a diagram of a downstream signal stream structure.
FIG. 3 shows a diagram of an upstream signal stream structure.
FIG. 4 shows a diagram of a signal stream structure according to a preferred embodiment of the present invention.
FIG. 5 shows a diagram of a signal stream structure according to a second embodiment of the present invention.
3 FIG. 6 shows a diagram of several examples of how the second embodiment of the present invention may be implemented with differing aggregated time slot groups.
Detailed Description of the Invention
The present invention aggregates MWT13MA time slots in such a manner as to avoid the redundancy inherent within the conventional multi-slot approach to aggregating WWMMA time slots. By practicing the present invention, bits within aggregated WWT13MA time slots which would have otherwise been wasted through redundancy can be used to increase the bits within the payload, thus facilitating greater information transmission per burst, and/or allowing error correction, such as forward error correction, within the burst.
FIG. 1 shows a communication system 110 for which a WWT13MA system protocol according to a preferred embodiment of the present invention may be used. Key elements of communication system 110 are the central control point 120 and the user interface devices 150. User interface devices 150 are generally attached to a user's premise as shown in FIG. 1. User interface devices 150 are attached to a coaxial cable 152, and coaxial cable 152 is attached to a fiber node 140 which is coupled to central control point 120 through fiber optic cable 142.
In the preferred embodiment of the present invention, many user interface devices 150 will be attached to coaxial cable 152. Each of the user interface devices 150 contain a cable transceiver designed to operate in accordance with the system protocol, which in the preferred embodiment includes a modified version of the Cable Access Control System (CACS) protocol of the assignee of the present invention. Any of the user interface devices 150 may be designed for either a basic symmetrical protocol or for an asymmetrical protocol extension.
4 In either case, user interface devices 150 terminate a cable drop of communication system 110 and is packaged for permanent mounting on the user's premise. User interface devices 150 are also equipped with one or more interfaces supporting various customer premise equipment such as standard wireline telephone sets, cable access television (CATV) set-top boxes, personal computers, etc.
Fiber node 140, coupling coaxial cable 152 to central control point 120 conrerts by-directionally between the optical domain of the fiber network, and the electrical domain of' coaxial cable 152.
Central control point 120 is a device often referred to as a head-end which receives video signals such as CATV, MPEG-1, MPEG-2, HDTV, satellite transmissions, off-the-air TV broadcasts and other television programming and video information, labeled as Video Sources 160 in FIG. 1. Central control point 120 also communicates with various data sources (170) and telephony networks (180) such as PSTN and ISDN.
This allows central control point 120 to supply cable television signals downstream, and upstream and downstream transfer of data, voice telephony, and video telephony with the user interface devices 150.
Through central control point 120 and user interface device 150, communication in communication system 110 is allowed between any number of users connected to communication system 110, whether connected directly to communication system 110 through coaxial cable 152 or through the EO 122 switch described below.
Telephony networks 180 communicate with central control point 120 through end office equipment (E0) 122. EO 122 supports standard digital subscriber loop carrier systems such as those described in Bellcore documents TR-NWT-000303 (124) and TR-NWT-001203 (126).EO 122 represents a digital telephony switch connected to a digital telephony switched network (not shown).
Data sources 170 communicate with central control point through a data switch 128. Data switch 128 is a packet switching processor that provides interconnection between channels serving user interface devices 150 and various public or private data networks and servers. Data switch 128 communicates with a CW (cable control unit) 130 and with various transmitters/receivers (transceivers) 138, 136, and 134 through data links operating appropriate local area network (LAN) protocols.
CW 130 provides all functions necessary to support the system protocol (such as CACS as modified by the present invention). CW 130 terminates all signaling and control messaging to and from the user interface devices 150 and manages all RF (radio frequency) channel assignments, link transfers, etc. CW 130 also interfaces with subscriber loop facilities from EO 122, performs multiplexing/demultiplexing of traffic and signaling channels on those facilities, and terminates all control messaging to/from EO 122. CW 130 performs logical functions that control the system information broadcasting, alerting, access, authentication and encryption processes through the system protocol which correlates subscriber terminal identities with an appropriate subscriber line appearance in EO 122 or a data network address in data switch 128.
RF combiner 132 combines downstream signals from multiple transmitters and bridges upstream signals to multiple receivers. RF combiner 132 is coupled to CW 130 through M (cable port transceiver) 134 wherein each of the M 134 consists of a digital transmitter/receiver providing the central control point (head-end) terminus for a symmetrical WM/WMA/FDD (time division multiplexing, time division multiple access, frequency division duplex) carrier pair. RF 6 combiner 132 is also coupled to CCU 130 through CPR (cable port receiver) 136 wherein each CPR 136 consists of a digital receiver providing the central control point (head-end) terminus for one of the upstream carriers of a WMA/FDD carrier set. A BCT (broadband cable transmitter) 138 is coupled between CCU 130 and RF combiner 132 and each BCT 138 consists of a digital transmitter providing the central control point (head-end) terminus for downstream 30 Mb/s carrier of the WMA/FDD carrier set.
Conv/Comb (CATV converter/combiner) 139 converts signals from video sources 160 and RF combiner 132 to assigned frequencies in the cable spectrum and combines the signals and uses them to modulate an optical carrier for transmission downstream through fiber optic cable 142 to fiber node 140. Upstream optical carrier(s) from fiber node 140 are demodulated, converted to their proper RF frequencies and passed to RF combiner 132 by conv/comb 139.
FIG. 2 and FIG. 3 show two downstream time frames (201 and 202) and two upstream time frames (301 and 302), respectively, of a signal stream defined in the system protocol used in the cable communication system 110 of FIG. 1. The system downstream protocol comprises a number of continuous time frames transmitted in series. These structures are also conventional WNFWMA protocol structures used in cable telephony communication systems today. As shown in FIG. 2, the downstream signal stream is generally transmitted in the - 750 Mhz range and the upstream signal stream is generally transmitted in the 5 - 30 Mhz range.
The downstream signal stream of FIG. 2 is designed to carry system control signals, digital visual signals, as well as telephony signals in digital format. The upstream signal stream of FIG. 3 carries telephony signals, system control, and visual signals, all in digital format. According to conventional cable communication system formats, such as CACS, the time frame 7 duration for each frame of the upstream and downstream signal streams has a predetermined period of time of 2.5 milliseconds (ms). Each frame is divided into a number of discrete multiple time slots where the total width (in time) of all of the number of discrete multiple time slots is equal to the time frame duration. In CACS, there are 8 time slots per frame, 400 frames per second. Carrier spacing signal streams is 600 KHz using a quadrature phase shift keying (QPSK) modulation at 2 bits/symbol and a total symbol rate of 384 K-sym/sec. Gross bit rate is 768 Kb/s with a payload of Nx64 Kb/s where N is less than or equal to 8 for 512 Kb/s maximum per carrier.
There are 240 bits per downstream time slot in each burst structure. There is a particular frame and time slot sequence associated with a particular pair of carrier frequencies. Frame and time slot synchronization is required for all downstream carriers in a single cable communication system, and upstream transmissions are synchronized to downstream transmissions and dynamically time-aligned for proper head-end reception.
Each of the time slots of a downstream signal stream of a conventional cable communication system TDMIMMA protocol structure includes the elements of downstream burst 203 of FIG. 2, which in FIG. 2 is shown as representative of time slot "0" of time frame 202. Similarly, each of the time slots of an upstream signal stream of a conventional cable communication system TDM/TDMA protocol structure includes the elements of upstream burst 303 of FIG. 3, which in FIG. 3 is shown as representative of time slot "0" of time frame 302. The elements of downstream burst 203 and upstream burst 303 will be better understood by referencing the following Table 1.
8 Table 1
Width Partition ame Acronym (bits) Purpose Synchr. Channel SYC 25 frame sync.
(25 down/ 14 up) Control Channel X 9 link control (9 downs/2 up) Slow Channel SC 26 link control user signaling Fast Channel lc 160 payload user data/sign.
Error Control Ch. BM 20 error detection Guard Channel X 8 power ramp and burst guard Differential Encode EE 2 modulator phase reference Referring now specifically to FIG. 2, the SYC, CC, and SC of downstream burst 203 comprise a downstream burst preamble 204, and ECC comprises a downstream burst postamble 205. FC of the downstream burst 203 represents the payload 206.
Similarly, in FIG. 3, the GC at the beginning of upstream burst 303, DE, SYC, CC, and SC comprise an upstream burst preamble 304 and the ECC and GC at the end of upstream burst 303 9 comprise an upstream burst postamble 305. FC of the upstream burst 303 represents the payload 306 Referring now to FIG. 4, a series of six multi-slot channels are shown aggregated together in 402. As indicated, each of the aggregated multi-slot channels comprise a preamble, payload, and postamble as defined above. In this particular example, it doesn't matter if the multi-slot channels are in the upstream signal stream or downstream signal stream as the preamble and postamble are not defined in detail. What is clearly seen in FIG. 4 is that, although the preambles 404, 406, 408, 410, 412, and 414 all contain the same information as explained previously when discussing aggregation of time slots, they are all duplicated and take up valuable bits within the time frame. Similarly, postambles 416, 418, 420, 422, 424, and 426 all contain similar information and are duplicative, thus wasting otherwise available bits within the time frame.
Accordingly, a preferred embodiment of the present invention eliminates the unnecessary duplication of bits within the preamble and the postamble, thus allowing more of the bits to be used within the payload increasing the amount of information carried within a single burst.
A preferred embodiment of the present invention provides a preamble at the beginning of a given number of the time slots to be aggregated, where the preamble contains, in the downstream burst, the synchronization channel, the control channel and the slow channel. In the upstream burst, the preamble contains the guard channel, the differential encode, the synchronization channel, the control channel, and the slow channel. The preamble is provided at the beginning of the first time slot. The preamble is the same as the preamble in all the other aggregated multi-slot time slots, and therefore is not replicated for any of the subsequent aggregated time slots.
Similarly, the postamble is provided at the end of the aggregated time slots. Since the postamble is the same as the postamble of the previous aggregated time slots, it is not replicated anywhere else in the aggregated time slots. Therefore, all bursts of the aggregated time slots are consecutively coupled together. between the preamble at the beginning of the aggregated time slots and the postamble at the end of the aggregated time slots without the preamble and postamble bits replicated in between. In the preferred embodiment, only the synchronization channel is replicated with each payload.
In FIG. 4, examples of different number of aggregated time slots are shown in serial slots 430 through 444. For example, serial slot 430 shows only one time slot. In this case, the structure of the burst would be identical to a time slot in the multi-slot structure having a preamble, a payload, and a postamble. However, looking at serial slot 440 having six time slots to be aggregated as in multi-slot time slots 402, only one preamble 450 and one postamble 452 are provided. The payloads and the synchronization channels for each of the aggregated time slots are coupled between the preamble 450 and the postamble 452 in the order of SYC and FC repeated for all the aggregated time slots. Accordingly, in serial slot 440, the order is preamble 450 (which in the example includes the SYC of the first aggregated time slot), FC 452, SYC 454, FC 456, SYC 458, K 460, SYC 462, K 464, SYC 466, FC 468, SYC 470, FC 472, and postamble 452.
It should be noted that by including the synchronization channel (SYC) with each of the payloads (FC), the present invention may be implemented into current cable communication systems such as cable communication system 110 with out changes to hardware. Only software or firmware changes would be required.
By aggregating time slots according to the preferred embodiment of the present invention, additional bits are opened up to carry information. Table 2 indicates the bandwidth multiplication gained using the preferred embodiment of the present invention over conventional multislot approaches to time slot aggregation.
Table 2
DOWNSTREAM UPSTREAM PAYLOAD BIT-RATESt NO. PAYLOAD BIT-RATESt NEW/OLD NEW/OL RATIO SLM NEW/OLD NEW/ LD RATIO 160/160 64164 1.000 1 160/160 64.0/64 1.000 386/320 150/128 1.172 2 386/320 154.41128 1.206 5901480 236/192 1.229 3 612/480 244.8/192 1.275 805/640 3221256 1.258 4 8341640 335.2/256 1.309 1020/800 4081320 1.275 5 1064/800 425.6/320 1.330 1235/960 494/384 1.286 6 1290/960 516.0/384 1.344 1450/1120 580/448 1.295 7 1516/1120 606.4/448 1.354 1665/1280 666/512 1.301 8 1742/1280 696.8/512 1.361 Bits t Kb/s As can be seen in Table 2, the upstream gain is more than the downstream gain in each case where more than one time slot is aggregated. This is because the upstream signal stream SYC contains only 14 bits, whereas the downstream signal stream SYC contains 25 bits. A second embodiment of the present invention is shown in FIG. 5. As in FIG. 4, the multi-slot approach of aggregating six time slots is shown as 502 where each of the aggregated time slots contain a preamble, a payload, and a postamble. In the second embodiment of the present invention of FIG. 5, there is no synchronization channel associated with each of the payloads to be aggregated and the payloads for each of the aggregated time slots are coupled consecutively between the preamble and the postamble. The synchronization channel is included in the preamble of the aggregated time slots.
12 Examples of how channel assignments of aggregated time slots can be made according to second embodiment of the present invention are shown in FIG. 6.
The second embodiment of the present invention requires some hardware changes as well as software and firmware changes in the existing cable communication systems such as cable communication system 110 (not in the basic structure shown in FIG. 1, but in the detailed implementation of some of the elements shown). Because the second embodiment has a SYC only in the preamble, more information may be carried in the aggregated time slots. In addition, meaningful forward error correction may be used to improve the performance of the cable communication system transport due to the opening up of bits by the previously replicated SYC. Table 3 shows a comparison between the second embodiment and the multi-slot approach.
Table 3
DOWNSTREAM UPSTREAM PAYLOAD BIT-RATESt NO. PAYLOAD BIT-RATESt -NEW/OLD NEW/OLD RATIO SLOTS NEW/OLD NEW/OLD RATIO 160/160 64.0/64 1.000 1 1601160 64/64 1.000 4001320 1601128 1.250 2 400/320 1601128 1.250 6401480 256/192 1.333 3 640/480 2561192 1.333 8801640 352/256 1.375 4 8801640 352/256 1.375 1120/800 4481320 1.400 5 1120/800 448/320 1.400 13601960 544/384 1.417 6 1360/960 544/384 1.417 1600/1120 640/448 1.429 7 1600/1120 640/448 1.429 184011280 736/512 1.438 8 184011280 736/512 1.438 Bits Kb/s 13 In addition to the advantages mentioned above of the second embodiment, by using the second embodiment, one 2X aggregated time slot is able to carry user information at a rate of 160 kb/s which is both B channels and the D channel of a basic rate ISDN line with 16 kb/s left over for other purposes such as an expanded SC or ECC. Further, within the CACS protocol, one 64 kb/s DSO is represented by 20 bytes every 2.5 ms. Therefore:
- 2.5 DSO's can be carried in one 2X aggregated time slots. - 4.0 DSO's can be carried in one 3X aggregated time slots. - 5.5 DSO's can be carried in one 4X aggregated time slots. - 7.0 DSO's can be carried in one 5X aggregated time slots. - 8.5 DSO's can be carried in one 6X aggregated time slots.
- 10.0 DSO's can be carried in one 7X aggregated time slots.
- 11.5 DSO's can be carried in one 8X aggregated time slots.
Furthermore, a user interface device 150 having two transceivers can carry 23 of the 24 channels of a full T1 line whereas the multi-slot approach requires three transceivers.
Three transceivers in a user interface device 150 according to the second embodiment of the present invention can carry a full E1 line whereas the multi-slot approach requires four transceivers.
Another advantage of the second embodiment of the present invention is the extra bandwidth made available allows implementation of an integrated packet channel protocol so that circuit mode traffic and packet mode traffic can be carried in different slot assignments of a single carrier pair. Accordingly, packet mode traffic would be transmitted in the aggregated time slots and circuit mode traffic would be transmitted in the other time slots of the time frame.

Claims (9)

What is claimed is: 14 CLAIMS:
1. A method comprising:
dividing a time frame having a predetermined period of time of a time based protocol for a communication system into a number of discrete multiple time slots wherein a total width (in time) of all of the number of discrete multiple time slots is equal to the predetermined period of time and a given number of the number of discrete multiple time slots are aggregated (aggregated time slots); and providing at a beginning of the aggregated time slots a preamble, wherein the preamble is a same for all of the aggregated time slots and is not replicated anywhere else in the aggregated time slots.
2. A device comprising:
a transceiver to allow communication in a communication system between any number of users through the device wherein the transceiver uses a system protocol; and the system protocol defining time frames, each of the time frames having a predetermined period of time divided into a number of discrete multiple time slots wherein an total width of all of the number of discrete multiple time slots is equal to the predetermined period of time, a given number of the number of discrete multiple time slots are aggregated (aggregated time slots), wherein a preamble is provided at a beginning of the aggregated time slots and is not replicated anywhere else in the aggregated time slots.
3. A device according to claim 2 wherein a postamble is provided at an end of the aggregated time slots and is not replicated anywhere else in the aggregated time slots.
4. A device according to claim 3 wherein a synchronization channel and a payload for each of the aggregated time slots are coupled between the preamble and the postamble in a repeating order of synchronization channel payload.
5. A device according to claim 3 wherein a payload for each of the aggregated time slots is coupled between the preamble and the postamble where all of the payloads for each of the aggregated time slots are coupled consecutively between the preamble and the postamble.
16
6. A system protocol for a communication system comprising a number of time frames, each of the number of time frames having a predetermined period of time divided into a number of discrete multiple time slots wherein a total width of all of the number of discrete multiple time slots is equal to the predetermined period of time, a given number of the number of discrete multiple time slots are aggregated (aggregated time slots), wherein a preamble is provided at a beginning of the aggregated time slots and is not replicated anywhere else in the aggregated time slots.
7. A system protocol for a communication system according to claim 6 wherein a postamble is provided at an end of the aggregated time slots and is not replicated anywhere else in the aggregated time slots.
8. A system protocol for a communication system according to claim 7 wherein a synchronization channel and a payload for each of the aggregated time slots are coupled between the preamble and the postamble in a repeating order of synchronization channel-pay load.
9. A system protocol for a communication system according to claim 7 wherein a payload for each of the aggregated time slots is coupled between the preamble and the postamble where all of the payloads for each of the aggregated time slots are coupled consecutively between the preamble and the postamble.
GB9719679A 1996-09-20 1997-09-17 Discretely variable slot width in TDM/TDMA systems Withdrawn GB2317538A (en)

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Cited By (1)

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EP3902349A4 (en) * 2018-12-21 2022-05-04 ZTE Corporation Time slot aggregation and device, time slot aggregation transmission method and device, storage medium, and electronic device

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DE19823683B4 (en) * 1998-05-27 2004-05-06 Siemens Ag Method for transmitting information indicating the transmission capacity from a central to at least one decentralized device via a radio link
DE19827700C1 (en) * 1998-06-22 2000-05-11 Siemens Ag Base station method for transmitting organizational information in a radio communication system
DE19829818A1 (en) * 1998-07-03 2000-01-13 Siemens Ag Data transmission procedures

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0620663A2 (en) * 1993-04-14 1994-10-19 Gpt Limited Method for synchronisation of digital data transmission
EP0663776A2 (en) * 1994-01-18 1995-07-19 General Instrument Corporation Of Delaware Method for communicating block coded digital data with associated synchronization/control data

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0620663A2 (en) * 1993-04-14 1994-10-19 Gpt Limited Method for synchronisation of digital data transmission
EP0663776A2 (en) * 1994-01-18 1995-07-19 General Instrument Corporation Of Delaware Method for communicating block coded digital data with associated synchronization/control data

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3902349A4 (en) * 2018-12-21 2022-05-04 ZTE Corporation Time slot aggregation and device, time slot aggregation transmission method and device, storage medium, and electronic device

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