WO2001043169A3 - Methods for separating microcircuit dies from wafers - Google Patents

Methods for separating microcircuit dies from wafers Download PDF

Info

Publication number
WO2001043169A3
WO2001043169A3 PCT/US2000/042507 US0042507W WO0143169A3 WO 2001043169 A3 WO2001043169 A3 WO 2001043169A3 US 0042507 W US0042507 W US 0042507W WO 0143169 A3 WO0143169 A3 WO 0143169A3
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
film
dies
divided
mount film
Prior art date
Application number
PCT/US2000/042507
Other languages
French (fr)
Other versions
WO2001043169A2 (en
Inventor
Maurice Karpman
David Courage
Somdeth Xaysongkham
Original Assignee
Analog Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices Inc filed Critical Analog Devices Inc
Priority to EP00992379A priority Critical patent/EP1238423A2/en
Priority to JP2001543761A priority patent/JP2003516630A/en
Publication of WO2001043169A2 publication Critical patent/WO2001043169A2/en
Publication of WO2001043169A3 publication Critical patent/WO2001043169A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • H01L2223/54466—Located in a dummy or reference die
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)

Abstract

Methods are provided for separating microcircuit dies from a wafer, which includes microcircuit dies containing componentry on a circuit side thereof and streets separating the dies from each other. A first wafer mount film is affixed to the circuit side of the wafer, and the dies are detached along the streets with the circuit side of the wafer fixed to the first wafer mount film, thereby forming a divided wafer. A second wafer mount film is fixed to the back side of the divided wafer, and the first wafer mount film is removed from the divided wafer so that the dies remain fixed to the second wafer mount film with their circuit sides exposed. The second wafer mount film preferably has greater adhesion to the divided wafer than the first wafer mount film when the first wafer mount film is removed from the divided wafer. The first wafer mount film may comprise a protective film having holes aligned with fragile components on the dies and a cover film that covers the holes. The protective film may be an ultraviolet-curable film that exhibits reduced adhesion to the divided wafer after exposure to ultraviolet radiation.
PCT/US2000/042507 1999-12-08 2000-11-30 Methods for separating microcircuit dies from wafers WO2001043169A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP00992379A EP1238423A2 (en) 1999-12-08 2000-11-30 Methods for separating microcircuit dies from wafers
JP2001543761A JP2003516630A (en) 1999-12-08 2000-11-30 Method for separating microcircuit die from wafer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US45646699A 1999-12-08 1999-12-08
US09/456,466 1999-12-08

Publications (2)

Publication Number Publication Date
WO2001043169A2 WO2001043169A2 (en) 2001-06-14
WO2001043169A3 true WO2001043169A3 (en) 2001-12-13

Family

ID=23812872

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/042507 WO2001043169A2 (en) 1999-12-08 2000-11-30 Methods for separating microcircuit dies from wafers

Country Status (3)

Country Link
EP (1) EP1238423A2 (en)
JP (1) JP2003516630A (en)
WO (1) WO2001043169A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6425971B1 (en) * 2000-05-10 2002-07-30 Silverbrook Research Pty Ltd Method of fabricating devices incorporating microelectromechanical systems using UV curable tapes
US6982184B2 (en) 2001-05-02 2006-01-03 Silverbrook Research Pty Ltd Method of fabricating MEMS devices on a silicon wafer
JP2004031844A (en) * 2002-06-28 2004-01-29 Sony Corp Method of manufacturing semiconductor chip and manufacturing apparatus for semiconductor chip
DE102009029184A1 (en) * 2009-09-03 2011-03-10 Robert Bosch Gmbh Production method for a capped micromechanical component, corresponding micromechanical component and cap for a micromechanical component
CN109994413A (en) * 2017-12-29 2019-07-09 南昌欧菲显示科技有限公司 Micro element flood tide transfer method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04225261A (en) * 1990-12-27 1992-08-14 Fujitsu Ltd Manufacture of semiconductor device
US5362681A (en) * 1992-07-22 1994-11-08 Anaglog Devices, Inc. Method for separating circuit dies from a wafer
US5824177A (en) * 1995-07-13 1998-10-20 Nippondenso Co., Ltd. Method for manufacturing a semiconductor device
EP1026735A2 (en) * 1999-02-03 2000-08-09 Kabushiki Kaisha Toshiba Method of dividing a wafer and method of manufacturing a semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04225261A (en) * 1990-12-27 1992-08-14 Fujitsu Ltd Manufacture of semiconductor device
US5362681A (en) * 1992-07-22 1994-11-08 Anaglog Devices, Inc. Method for separating circuit dies from a wafer
US5824177A (en) * 1995-07-13 1998-10-20 Nippondenso Co., Ltd. Method for manufacturing a semiconductor device
EP1026735A2 (en) * 1999-02-03 2000-08-09 Kabushiki Kaisha Toshiba Method of dividing a wafer and method of manufacturing a semiconductor device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 016, no. 574 (E - 1298) 14 December 1992 (1992-12-14) *

Also Published As

Publication number Publication date
EP1238423A2 (en) 2002-09-11
WO2001043169A2 (en) 2001-06-14
JP2003516630A (en) 2003-05-13

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