WO2001034399A1

WO2001034399A1 - Printing head and method for making same

Info

Publication number: WO2001034399A1
Application number: PCT/FR2000/003125
Authority: WO
Inventors: Benoît Giffard; Christel Buj-Dufournet
Original assignee: Commissariat A L'energie Atomique
Priority date: 1999-11-10
Filing date: 2000-11-09
Publication date: 2001-05-17
Also published as: FR2800666A1

Abstract

The invention concerns a printing head comprising at least one stick of L x C elementary points and a matrix addressing device of elementary points of the type L lines x C columns for selecting an elementary point of the stick, the addressing device comprising selecting diodes, each selecting diode being paired and connected to an elementary point of the stick. The diodes are assembled on a support in independent L blocks (B1, B2) of C diodes per block. The invention is useful for high density base fabric printing.

Description

PRINTHEAD AND METHOD FOR PRODUCING THE HEAD

PRINTING

Technical field and prior art

The invention relates to a printhead and a method for producing a printhead.

The invention applies to the field of support printing and, more particularly, of high density support printing. A known printing technique is printing using bars. Each bar is made up of elementary points arranged side by side. Each elementary point is either a self-induction or a resistance, depending on whether the printing signal is magnetostatic or thermal. One or more strips placed end to end form a line the width of the support to be printed.

The support which receives the impression scrolls in relation to the bars which transform the electrical writing signals received either into magnetic signals or into thermal signals. The printing of the support is carried out line by line by relative scrolling of the support and the bars. Each elementary point of each bar receives a write signal which is renewed with each line to be printed.

In order to avoid connecting each elementary point of each bar to the write control circuit by an elementary electrical connection, it is known practice to use a sequential addressing of several elementary points using appropriate wiring. The number of electrical connections between the write control circuit and a strip is then smaller. Addressing can be carried out by associating a selection diode with each elementary point. An elementary point can then be selected independently of the other points.

For the same bar, the elementary points are functionally associated in C groups which will be called "columns" and the selection diodes are functionally associated in L groups which will be called "lines". All of the elementary points of the same column have an external common electrical connection and all of the selection diodes of the same line have a common electrical connection. The electrical activation of the external common electrical connection of a line or of a column allows the addressing of said line or of said column. Furthermore, each elementary point and each diode comprises a second electrical connection (internal connection), so that a single diode is connected to a single elementary point. Each diode of the same line is connected to an elementary point of a different column and each elementary point of a column is connected to a diode of a different line. The simultaneous selection of a column and a row activates only the elementary point of the column linked to the diode of the selected row. The number L of rows and the number C of columns are such that the product L x C is equal to the total number of elementary points of a bar. The total number of external electrical connections is then equal to L + C. These external electrical connections allow addressing. The elementary points have dimensions all the smaller when it is necessary to carry out a printing at high resolution. The density of elementary points is commonly measured in number of points per inch or dp (the abbreviation dpi comes from the English "dot per mch").

For low densities, the diodes are individually attached to a support by wire wiring or via a printed circuit, the elementary points being integrated on the support or attached to it. This technique does not provide high resolution printing.

For medium or high densities, for example 480 dpi, it is known to produce the elementary points and the diodes in the same substrate. As mentioned previously, the diodes are grouped functionally into L lines of C diodes. Each diode in a group of C diodes is electrically isolated from the other diodes in the group and the groups of diodes are electrically isolated from each other.

A magnetographic printing head of this type is described in the document entitled "Silicon-Based Structures for High-Density Magnetographic Heads ith Co-Integrated Multiplexmg Electronics", Proc. ISKT's Tenth International Congress On Advances m Non- Impact Printing Technologies. New Orleans, 1994, pp. 534-538.

The insulations between diodes and / or groups of diodes are made by reverse voltage polarized junctions. The configurations thus implemented to ensure insulation between the diodes lead to the appearance of structures capable of causing the establishment of parasitic currents. It is then possible that a spurious impression takes place at unselected elementary points.

The parasitic structures which appear are multifunctional bipolar structures capable of causing a phenomenon commonly referred to as a "latch-up". As is known to those skilled in the art, the “latch-up” phenomenon is due to the presence of a parasitic structure of 4 PNPN layers of the thyristor type which is capable of suddenly becoming conductive and of locking in this state, which can lead to the degradation of the function or component.

The "latch-up" phenomenon can be reduced by moving the diodes and / or groups of diodes away from each other, or even by making buried layers that are not very resistive. The low resistive buried layers are high doping layers of P ⁺ or N ^{+ type} under the devices which drain the parasitic currents likely to initialize the "latch-up".

However, the distance between the diodes and groups of diodes is limited by the desired density of the elementary points and the low resistive buried layers are difficult to produce.

Furthermore, the diodes have a relatively high parasitic resistance. By way of example, a parasitic diode resistance produced in silicon can be of the order of 10 Ω. This resistance is due to the lateral path of the current in the silicon whose optimal doping is limited. When the currents required in the diodes are high, which is the case, for example, for magnetographic or thermal strips, such parasitic diode resistance leads to significant heating of the component.

Another problem consists in the complexity of producing diodes and elementary points, in particular of the magnetographic type, on the same substrate during the same process. In fact, the process for manufacturing the elementary points is hardly compatible with the production of diodes. This also results in an additional cost since the diodes must occupy a surface of silicon with high added value (silicon) which is used to manufacture the elementary points whereas the diode itself could be made independently on a substrate with low added value.

Statement of the invention

The invention does not have the drawbacks mentioned above. In fact, the invention relates to a print head comprising at least one bar of L x C elementary points and a matrix addressing device of elementary points of type L rows x C columns for selecting an elementary point of the bar, the addressing device comprising selection diodes, each selection diode being paired and connected to an elementary point. The diodes are grouped on a support in L independent blocks of C diodes per block, the diodes of the same block being mounted as a common electrode.

The invention also relates to a method of manufacturing a print head comprising at least one bar of L x C elementary points and a matrix addressing device of elementary points of type L rows x C columns for selecting an elementary point of the bar. , the addressing device comprising selection diodes, each selection diode being paired and connected to an elementary point. The method comprises a step of manufacturing L independent blocks of C diodes per block and a step of transferring the blocks onto a support, the diodes of the same block being mounted as a common electrode.

An advantage of the invention consists, among other things, in suppressing the appearance of parasitic currents in the print head.

Brief description of the figures

Other characteristics and advantages of the invention will appear on reading a preferred embodiment of the invention made with reference to the appended figures among which:

FIG. 1 represents a print head according to a first embodiment of the invention,

FIG. 2 represents a print head according to a second embodiment of the invention, FIG. 3 represents the sectional view of a block of diodes according to an exemplary embodiment of the invention,

FIGS. 4A-4C represent a method for producing a block of diodes according to the exemplary embodiment of FIG. 3.

In all the figures, the same references designate the same elements.

Figures 1 and 2 represent the case L = 2 and C = 2, but it can be extrapolated to high values of L and C, L> 20 and C> 20 for example.

Detailed description of methods of implementing

1 invention Figure 1 shows a print head according to a first embodiment of the invention.

The print head comprises a support 17 and

2 blocks of diodes Bl and B2 transferred to the support 17.

The support 17 includes 4 elementary points PI, P2, P3, P4 as well as internal conductive links 15,

16 making it possible to connect the elementary points PI, P2,

P3, P4 to the diodes of blocks Bl and B2.

FIG. 1 represents an exemplary embodiment of the invention for which the matrix addressing device is a device with 2 rows and 2 columns. More generally, however, the invention relates to a printhead comprising L x C elementary dots and L blocks of C diodes to define a matrix addressing device with L rows and C columns. Each elementary point Pi (i = 1, 2, 3, 4) is either a self-induction or a resistance depending on whether the printing signal is magnetostatic or thermal. Preferably, the diodes of the blocks

B1 and B2 are produced collectively in a common structure (cf. FIGS. 4A-4C). The structure is then cut to form the individual blocks Bl and B2. Each diode has two electrodes, an anode and a cathode. The two diodes contained in the block B1 have a common electrode 3 and the two diodes contained in the block B2 have a common electrode 6.

The common electrodes 3 and 6 can be either the anodes or the cathodes of the diodes.

The common electrode 3 of the diodes of the block B1 is connected to a first addressing line L1 (external connection) and the common electrode 6 of the diodes of the block B2 is connected to a second addressing line L2 (external connection). These lines are produced on the support 17.

The electrodes 1 and 2 of the 2 diodes of the block B1 which are not the common electrode 3 are respectively connected to the first terminals 8 and 10 of the elementary points PI and P2. Likewise, the electrodes 4 and 5 of the 2 diodes of the block B2 which are not the common electrode 6 are respectively connected to the terminals 12 and 14 of the elementary points P3 and P4.

The second terminals 7 and 11 of the elementary points PI and P3 are connected to the same first addressing column C1 (external connection) and the second terminals 9 and 13 of the elementary points P2 and P4 are connected to the same second addressing column C2 (external connection).

According to the invention, mounting the diodes by transferring independent diode blocks to a support eliminates any risk of "latch-up" as well as any crosstalk between diode blocks. It is then possible to achieve a very high density of elementary points, for example a density of 1200 dpi. Since the diode blocks are physically isolated from each other when the diode circuits are cut, it is possible to produce them on highly conductive epitaxial substrates, which achieves the low resistance function at low cost at low cost of the diode and decreases the power dissipated during operation.

For example, all other things being equal, the power dissipated during operation can be reduced by 50% compared to the prior art. In Figure 1, the assembly of the diode blocks

B1 and B2 is a transfer type assembly on substrate by inversion commonly known as a "flip-chip" assembly.

As is known to those skilled in the art, a “flip-chip” type mounting of a component on a support uses a component of which all the wiring pads are located on the same face of the component. It is then the face of the component on which the wiring pads are located which is transferred to the support.

According to an alternative embodiment, the bar shown in FIG. 1 integrated into the support could be produced in an independent substrate and transferred also by mounting "flip-chip" on the support to reduce on the one hand wired cabling and use a low cost support.

The invention also relates to the case where the transfer of the diode blocks to the support is not an assembly of the "flip-chip" type. The diode blocks then have their common electrode on a first face, the other electrodes being located on the face opposite to the first face. This other type of assembly (transfer without reversal) is shown in Figure 2.

FIG. 2 represents, moreover, a second embodiment of the invention according to which the elementary points PI, P2, P3, P4 are not produced in the support on which the blocks Bl and

B2 are carried over.

According to this second embodiment of the invention, the elementary points PI, P2, P3, P4 are produced in a substrate 18. The substrate 18, like the diode blocks, are transferred onto the same support 19 by the transfer technique without flipping.

The addressing lines L1, L2 and the addressing columns C1, C2 are produced on the support 19. The common electrode of the diode block B1 is transferred to a pad 20 of the support 19 electrically connected to the line L1. The common electrode of the diode block B2 is transferred to a pad 21 of the support 19 electrically connected to the line L2. The electrodes of the 2 diodes of block Bl which are not the common electrode are connected by connection wires, one to terminal 8 of elementary point PI, and the other to terminal 10 of elementary point P2. Likewise, the electrodes of the 2 diodes in block B2 which are not the common electrode are connected by connection wires, one to terminal 12 of elementary point P3, and the other to terminal 14 of point elementary P4. In addition to the advantages already mentioned above, this second embodiment of the invention has the advantage of being inexpensive.

Whatever the embodiment of the invention, the transfer of the diode blocks to the support (17, 19) can be done individually, diode block by diode block, or collectively, all or part of the diode blocks being previously grouped.

Furthermore, according to the embodiments described in Figures 1 and 2, the supports 17 and 19 are made in one piece. The invention however relates to other embodiments for which each support (17, 19) can be made of several separate blocks.

FIG. 3 represents a sectional view of a block of diodes according to an exemplary embodiment of the invention.

According to the exemplary embodiment of the invention shown in FIG. 3, the diodes of the block are mounted as a common anode. The semiconductor substrate from which the diodes are made is then a P-type substrate. According to another embodiment of the invention (not shown in the figures), the diodes of the block are mounted as a common cathode and the semiconductor substrate from which the diodes are made is a N-type substrate.

FIG. 3 represents 2 diodes with a common anode. A first diode consists of an electrode 28 forming a cathode, an N ⁺ doped region 30, a zone 31 of P-doped substrate, a region 32 doped P ⁺ and an electrode 33 forming a common anode.

A second diode consists of an electrode 29 forming a cathode, an N ⁺ doped region 21, a zone 22 of P-doped substrate, a region 23 doped P ⁺ and the electrode 33 forming a common anode. The conductivity of zones 32 and 23 of P ⁺ doped substrate is advantageously very high, for example equal to 100 Ω ^"1 .cm ^{" 1} , and regions 31 and 22 are part of a zone P whose doping and thickness are compatible with the voltage withstand of the diodes in reverse, that is, for example, a few tens of volts. The zone P is advantageously obtained by epitaxy on the substrate P ⁺ .

To improve the crosstalk immunity between the 2 diodes, a P ⁺ doped area 24 separates the N ⁺ 30 and 21 doped regions. The area 24 is advantageously diffused so as to be in contact with the P ⁺ doped substrate area. The access resistance to the common anode is then minimal. The gain of the parasitic bipolar transistor made up of zones N ⁺ 30 and 21 and of zone P ⁺ 24 is consequently minimal, which induces minimal crosstalk. Oxidation 25, 26, 27 is carried out on the upper face of the diode block.

According to the embodiment of the invention shown in Figure 3, the common anode of the diodes of the diode block is located on the rear face, that is to say opposite the face where the cathodes are located 28 and 29. The invention however also relates to the case (not shown in the figures) where the common anode is located on the same face as that where the cathodes 28 and 29 are located. In this case, the common anode is produced using a metallization covering the zone 24 which separates the 2 diodes after opening in the oxide 26.

FIG. 4A represents the formation of the P ⁺ doped zones 24.

A silicon substrate 34 doped P in its upper part and P ⁺ in its lower part is covered on its upper face with an oxide layer 35 and on its lower face with an oxide layer 36. A set of masks Ml , M2, M3, M4 are placed on the oxide layer 35 which covers the upper face of the silicon substrate.

The P ⁺ doped zones 24 are produced by implantation or doping diffusion of ions on the upper face of the silicon substrate, for example boron ions. As mentioned previously, the P ⁺ doping is advantageously carried out so that the zones 24 join the P ⁺ doped zone of the substrate 34.

FIG. 4B represents the formation of the zones

30 and 21 N ⁺ doped.

At this stage, the masks M1, M2, M3 and M4 have been removed. Then a thick oxide is deposited on top of the oxide layer 35 forming a new oxide layer. Openings are then made by photolithography in this new oxide layer so that the zones 24 are covered with thick oxide layers 25, 26, 27 protecting them from implantation or diffusion. During this etching, the oxide 36 is incidentally removed. The N ⁺ zones are then produced by implantation or doping diffusion of ions, for example arsenic or phosphorus ions, in the P-doped upper part of the substrate 34.

FIG. 4C represents the metallization of the front and rear faces of the diode block. The metallization 28 is formed in contact with the N ⁺ doped region 30 and the metallization 29 is formed in contact with the N ⁺ doped region 21. The underside of the silicon substrate 34 is covered with metallization 33.

According to the embodiment shown in FIG. 4C, the metallization 33 constitutes the common anode contact on the rear face of the diode block. As mentioned earlier, the contact common anode can also be made on the front face.

A fraction of at least one zone 24 is then covered with a metallization to ensure contact with the common anode on the front face.

According to the invention, the diodes for selecting the elementary points can be produced according to a simple process which makes it possible to obtain chips at low cost while guaranteeing minimal parasitic structures.

A print head with the following characteristics was obtained:

- density of 600 dpi,

- diodes 62 μm long and 42 μm wide, - nominal current flowing through a 400 mA diode at a direct voltage of approximately 1.3 volts,

- withstand in reverse voltage greater than or equal to 20 volts,

- crosstalk between diodes less than 1% of the write current.

Claims

1. Printhead comprising at least one bar of L x C elementary points and a matrix addressing device of elementary points of type L rows x C columns for selecting an elementary point of the bar, the addressing device comprising selection diodes, each selection diode being paired and connected to an elementary point of the strip, characterized in that the diodes are grouped on a support (17, 19) in L blocks (Bl, B2) independent of C diodes per block , the diodes of the same block being mounted as a common electrode.

2. Printhead according to claim 1, characterized in that the strip of elementary dots is produced in the support (17).

3. Printhead according to claim 1, characterized in that the strip of elementary dots is made in a substrate (18) and in that the substrate is transferred to the support (19).

4. Printhead according to any one of claims 1 to 3, characterized in that the diodes of the same block are diodes separated by doped areas (24) to minimize crosstalk between diodes.

5. Printhead according to any one of the preceding claims, characterized in that the diodes of the same block are mounted as a common anode.

6. Print head according to any one of claims 1 to 4, characterized in that the diodes of the same block are mounted as a common cathode.

7. Printhead according to any one of claims 5 or 6, characterized in that the common anode or the common cathode is produced by all of the doped zones (24) to minimize crosstalk between diodes.

8. Printhead according to any one of the preceding claims, characterized in that an elementary point is a self-induction.

9. Printhead according to any one of claims 1 to 7, characterized in that an elementary point is a resistor.

10. Printing head manufacturing process comprising at least one bar of L x C elementary points and a matrix addressing device of elementary points of type L rows x C columns for selecting an elementary point of the bar, the device d addressing comprising selection diodes, each selection diode being paired and connected to an elementary point, characterized in that it comprises a step of manufacturing L independent blocks of C diodes per block and a step of transferring the blocks onto a support (17, 19), the diodes of the same block being mounted as a common electrode.

11. A method of manufacturing a print head according to claim 10, characterized in that it comprises a step of manufacturing the bar of elementary points in the support (17).

12. A method of manufacturing a print head according to any one of claims 10 or 11, characterized in that the step of transferring the L blocks onto the support (17) is a step of transferring onto the substrate by inversion.

13. A method of manufacturing a print head according to claim 10, characterized in that it comprises a step of manufacturing the strip of elementary dots in a substrate (18), a step of transferring the substrate (18) onto the support (19) and a step of transferring the diode blocks (B1, B2) to the support (19).

14. A method of manufacturing a print head according to claim 13, characterized in that the transfer of the substrate (18) and / or of the diode blocks (B1, B2) is a step of transfer to the substrate by inversion.

15. A method of manufacturing a print head according to any one of claims 10 to 14, characterized in that the diode blocks (Bl, B2) are produced collectively and then cut.

16. A method of manufacturing a print head according to any one of claims 10 to 15, characterized in that the production of the diode blocks comprises a step of implantation or doping diffusion of ions between the diodes of the same block so as to create a set of doped zones to minimize crosstalk between diodes of the same block.

17. A method of manufacturing a print head according to any one of claims 10 to 16, characterized in that the transfer of the blocks. diodes (Bl, B2) on the support (17, 19) is done block by block.

18. A method of manufacturing a print head according to any one of claims 10 to 16, characterized in that the transfer of the diode blocks (B1, B2) on the support (17, 19) is done collectively.