WO2001018933A1 - An arrangement for protecting a dc source - Google Patents

An arrangement for protecting a dc source Download PDF

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Publication number
WO2001018933A1
WO2001018933A1 PCT/SE2000/001442 SE0001442W WO0118933A1 WO 2001018933 A1 WO2001018933 A1 WO 2001018933A1 SE 0001442 W SE0001442 W SE 0001442W WO 0118933 A1 WO0118933 A1 WO 0118933A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch
load
cuπent
transient
swl
Prior art date
Application number
PCT/SE2000/001442
Other languages
French (fr)
Inventor
Nils BÄCKMAN
Jan-Olof Classon
Kjell Rolleberg
Original Assignee
Emerson Energy Systems Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Emerson Energy Systems Ab filed Critical Emerson Energy Systems Ab
Priority to AU60434/00A priority Critical patent/AU6043400A/en
Publication of WO2001018933A1 publication Critical patent/WO2001018933A1/en

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00—Details of emergency protective circuit arrangements
    • H02H1/04—Arrangements for preventing response to transient abnormal conditions, e.g. to lightning or to short duration over voltage or oscillations; Damping the influence of dc component by short circuits in ac networks
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H02H3/087—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current for dc applications

Definitions

  • the invention relates to an overcurrent protector for a DC voltage source connected to a load.
  • One such known overcurrent protector comprises a first transistor which is connected in series with a load and a current sensing resistor between the output terminals of a DC voltage source, and a second transistor which in series with a current limiting resistor is connected in parallel with the first transistor.
  • the sensed load current is compared with a reference level. If the load current exceeds the reference level, the first transistor is turned off. The current to the load will then pass through the second transistor and the current limiting resistor.
  • a timer is triggered.
  • the second transistor is turned off at the same time as the first transistor is kept turned off.
  • the load is disconnected from the DC voltage source.
  • transient overcurrents are meant currents that rise during a rise time to a certain value above a permitted load current range, and that then decay during a fall time to a value within the permitted load current range.
  • a transient overcurrent will normally occur as an inrush current when connecting a load to the DC voltage source as a consequence of charging an input capacitance present in the load.
  • non-transient overcurrents are meant currents that rise -to a certain value above the permitted load current range during a rise time, and stay above the permitted load current range without decaying.
  • a typical non-transient overcurrent may be caused by an overload condition caused by e.g. accidental short-circuiting of the load terminals or a fault occurring in the load.
  • overcu ⁇ -ent protectors cannot distinguish between transient overcu ⁇ ents and non-transient overcu ⁇ ents is that the overcu ⁇ ent protectors will be turned on and off with considerable power losses, which cause a tem- perature rise in the overcu ⁇ ent protectors.
  • this problem is dealt with by designing the on-time of the timer short enough to get an acceptable margin in the worst case, so that the temperature is kept below permitted values according to manufacturer specifications in the electrical circuit.
  • the object of the invention is to bring about an overcu ⁇ ent protector that can distinguish between transient overcu ⁇ ents and non-transient overcu ⁇ ents in order to handle transient overcu ⁇ ents differently than non-transient overcu ⁇ ents.
  • the overcu ⁇ ent protector will limit the overcu ⁇ ent to a predetermined value, turn off the load cu ⁇ ent and thereby disconnect the load from the DC voltage source within a predetermined time interval in order to protect the DC voltage source.
  • the predetermined time interval is chosen to be short enough to protect the transistors and the cu ⁇ ent limiting resistor from overheating.
  • Fig. 1 illustrates an embodiment of an electrical overcu ⁇ ent pro- tector in accordance with the invention to handle transient overcu ⁇ ents
  • Fig. 2 is a diagram illustrating how a transient overcu ⁇ ent is handled by the overcu ⁇ ent protector in Fig. 1.
  • an embodiment of an overcu ⁇ ent protector in accordance with the invention for protecting a DC voltage source 1 against transient overcu ⁇ ents is connected in series with a load 2 to output terminals (+) and (-) of the DC voltage source 1.
  • the overcu ⁇ ent protector comprises a switch in the form of a field effect transistor SWl, which is connected in series with a current limiting resistor Rl and a load cu ⁇ ent sensing device 3 between one terminal of the load 2 and the (-) terminal of the DC voltage source 1.
  • the cu ⁇ ent sensing device 3 generates an output voltage that is proportional to the sensed load cu ⁇ ent, and can comprise e.g. a resistor, a Hall generator, etc.
  • a switch in the form of a field effect transistor SW2 5 is connected in parallel with the field effect transistor SWl and the current limiting resistor Rl.
  • the gate of the field effect transistor SWl is connected to a supply voltage +Vc via a resistor R2 and to the collector of a transistor TRl.
  • the emitter of the transistor 10 TRl is connected to the source of the field effect transistor SWl, and the base of the transistor TRl is connected to an output terminal of a timer 4 via a resistor R3.
  • the gate of the field effect transistor SW2 is connected to the output of a voltage amplifier 5, and to the collector of a transistor TR2.
  • the emitter of the transistor TR2 is connected to the source of the field effect transistor SW2, and the base of the transistor TR2 is connected to the output of the timer 4 via a resistor R4.
  • the output of the cu ⁇ ent sensing device 3 is connected to the (-) input terminal of 20 the voltage amplifier 5 and to the (+) input terminal of a comparator 6.
  • the (-) input terminal of the comparator 6 is connected to a reference voltage source 7.
  • the reference voltage source 7 provides a reference voltage that is proportional to a nominal load cu ⁇ ent value INOM. Load cu ⁇ ents that are higher than INOM are 25 overcu ⁇ ents to be detected.
  • a transient detector 9 is provided to detect that an overcu ⁇ ent is a transient overcu ⁇ ent.
  • the transient detector 9 is connected with its input to the output of the cu ⁇ ent sensing device 3 and with its output to an inverting input of the AND circuit 8.
  • the transient detector 9 does not necessarily have to be connected with its input to the output of the cu ⁇ ent sensing device 3. To de- tect transient overcu ⁇ ents, the transient detector 9 can equally well be connected with its input to e.g. a point between the load 2 and the cu ⁇ ent limiting resistor Rl to detect the voltage across that resistor.
  • the (+) input terminal of the voltage amplifier 5 is connected to a reference voltage source 10.
  • the reference voltage source 10 that can be implemented by means of e.g. a voltage divider provides a reference signal that can assume two different values IOFF and ION.
  • the value IOFF represents the load cu ⁇ ent value at which the transistor SW2 is to be turned off
  • the value ION represents the load cu ⁇ ent value at which the transistor SW2 is to be turned on again as will be described more in detail below with reference to Fig. 2.
  • the transient overcu ⁇ ent protector detects that the overcu ⁇ ent is a transient overcurrent by means of the transient detector 9.
  • a transient overcu ⁇ ent has a rise time which is a fraction of the time that is required for the timer 4 to run out and turn off both the transistor SW2 and the transistor With reference to Fig. 2, it is supposed that a transient overcu ⁇ ent appears at time tl.
  • the cu ⁇ ent is peak limited at a value IMAX as shown in Fig. 2.
  • the cu ⁇ ent value IMAX is set by the resistance value of the cu ⁇ ent limiting resistor Rl, since the transistor SWl is still fully conducting. Having reached its peak at IMAX, the transient cu ⁇ ent starts to decay as illustrated in Fig. 2.
  • the timer 4 is not triggered even if the output signal from the comparator 6 is high (the load cu ⁇ ent > INOM) and the output signal from the transient detector 9 also is high. However, since the latter is inverted at the inverting input of the AND circuit 8, the output signal of the AND circuit 8 is kept low.
  • a negative feedback loop is formed by the voltage amplifier 5, the transistor SW2, the cu ⁇ ent sensing device 3, and the reference voltage source 10 which has assumed the value ION.
  • the output voltage of the voltage amplifier 5 starts to increase, and the transistor SW2 starts to conduct an increasing cu ⁇ ent ISW2 as illustrated in Fig. 2.
  • the transistor SW2 gradually "takes over" the load cu ⁇ ent from the transistor SWl and the cu ⁇ ent limiting resistor Rl.
  • the transistor SW2 is gradually conducting more cu ⁇ ent at the same rate of change as the voltage across the load 2 is increasing, e.g. due to charging of an input capacitance of the load 2.
  • the transient cu ⁇ ent no longer exists and the cu ⁇ ent is then limited by the load 2 only.
  • the current will then be of a value below the nominal value INOM.
  • the output of the transient detector 9 goes low. Since the output of the comparator 6 still is high, the output of the AND circuit goes high triggering or enabling the timer 4.
  • the timer 4 is set in such a manner that it does not run out before the input capacitance of the load 2 has been fully charged.

Landscapes

  • Emergency Protection Circuit Devices (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

To protect a DC voltage source (1), connected to a load (2), against overcurrents, a first switch (SW1) in series with a current limiting resistor (R1) is connected in series with the load (2), and a second switch (SW2) is connected in parallel with the first switch (SW1) and the current limiting resistor (R1). Said first and second switches (SW1, SW2) are turned on in the absence of overcurrents. Upon an overcurrent, said second switch (SW2) is turned off. A transient detector (9) is connected to detect transient overcurrents. Upon a transient overcurrent, said second switch (SW2) is turned on when the current has decayed to a predetermined value (ION) to supply the load (2) with a decreasing current via the first switch (SW1) and the current limiting resistor (R1), and a correspondingly increasing current via the second switch (SW2) until the load (2) is supplied with current only via the second switch (SW2).

Description

AN ARRANGEMENT FOR PROTECTING A DC SOURCE
TECHNICAL FIELD
The invention relates to an overcurrent protector for a DC voltage source connected to a load.
BACKGROUND OF THE INVENTION
Electrical overcurrent protectors are known per se.
One such known overcurrent protector comprises a first transistor which is connected in series with a load and a current sensing resistor between the output terminals of a DC voltage source, and a second transistor which in series with a current limiting resistor is connected in parallel with the first transistor.
The sensed load current is compared with a reference level. If the load current exceeds the reference level, the first transistor is turned off. The current to the load will then pass through the second transistor and the current limiting resistor.
At the same time as the first transistor is turned off, a timer is triggered.
When the timer runs out, the second transistor is turned off at the same time as the first transistor is kept turned off.
Hereby, the load is disconnected from the DC voltage source.
To reconnect the load to the DC voltage source, means are provided for turning on the two transistors.
A disadvantage of the overcurrent protectors known so far is that they cannot distin- guish between transient overcurrents and non-transient overcurrents. By transient overcurrents are meant currents that rise during a rise time to a certain value above a permitted load current range, and that then decay during a fall time to a value within the permitted load current range.
A transient overcurrent will normally occur as an inrush current when connecting a load to the DC voltage source as a consequence of charging an input capacitance present in the load.
By non-transient overcurrents are meant currents that rise -to a certain value above the permitted load current range during a rise time, and stay above the permitted load current range without decaying.
A typical non-transient overcurrent may be caused by an overload condition caused by e.g. accidental short-circuiting of the load terminals or a fault occurring in the load.
A consequence of that the known overcuπ-ent protectors cannot distinguish between transient overcuπents and non-transient overcuπents is that the overcuπent protectors will be turned on and off with considerable power losses, which cause a tem- perature rise in the overcuπent protectors. Normally, this problem is dealt with by designing the on-time of the timer short enough to get an acceptable margin in the worst case, so that the temperature is kept below permitted values according to manufacturer specifications in the electrical circuit.
SUMMARY OF THE INVENTION
The object of the invention is to bring about an overcuπent protector that can distinguish between transient overcuπents and non-transient overcuπents in order to handle transient overcuπents differently than non-transient overcuπents.
This is attained in accordance with the invention by inhibiting disconnection of the load in response to transient overcuπents. Hereby, the operation of the load does not have to be interrupted when transient overcuπents appear.
If a non-transient overcurrent is detected, the overcuπent protector will limit the overcuπent to a predetermined value, turn off the load cuπent and thereby disconnect the load from the DC voltage source within a predetermined time interval in order to protect the DC voltage source. To minimize the conduction losses in the overcuπent protector, the predetermined time interval is chosen to be short enough to protect the transistors and the cuπent limiting resistor from overheating.
BRIEF DESCRIPTION OF THE DRAWING
The invention will be described more in detail below with reference to the appended drawing on which Fig. 1 illustrates an embodiment of an electrical overcuπent pro- tector in accordance with the invention to handle transient overcuπents, and Fig. 2 is a diagram illustrating how a transient overcuπent is handled by the overcuπent protector in Fig. 1.
DESCRIPTION OF THE INVENTION In Fig. 1, an embodiment of an overcuπent protector in accordance with the invention for protecting a DC voltage source 1 against transient overcuπents, is connected in series with a load 2 to output terminals (+) and (-) of the DC voltage source 1.
In a manner known per se, to protect the DC voltage source 1 against non-transient overcuπents, the overcuπent protector comprises a switch in the form of a field effect transistor SWl, which is connected in series with a current limiting resistor Rl and a load cuπent sensing device 3 between one terminal of the load 2 and the (-) terminal of the DC voltage source 1. The cuπent sensing device 3 generates an output voltage that is proportional to the sensed load cuπent, and can comprise e.g. a resistor, a Hall generator, etc.
Also, in a manner known per se, a switch in the form of a field effect transistor SW2 5 is connected in parallel with the field effect transistor SWl and the current limiting resistor Rl.
The gate of the field effect transistor SWl is connected to a supply voltage +Vc via a resistor R2 and to the collector of a transistor TRl. The emitter of the transistor 10 TRl is connected to the source of the field effect transistor SWl, and the base of the transistor TRl is connected to an output terminal of a timer 4 via a resistor R3.
In accordance with the invention, the gate of the field effect transistor SW2 is connected to the output of a voltage amplifier 5, and to the collector of a transistor TR2. " 15 The emitter of the transistor TR2 is connected to the source of the field effect transistor SW2, and the base of the transistor TR2 is connected to the output of the timer 4 via a resistor R4.
The output of the cuπent sensing device 3 is connected to the (-) input terminal of 20 the voltage amplifier 5 and to the (+) input terminal of a comparator 6.
The (-) input terminal of the comparator 6 is connected to a reference voltage source 7. The reference voltage source 7 provides a reference voltage that is proportional to a nominal load cuπent value INOM. Load cuπents that are higher than INOM are 25 overcuπents to be detected.
The output terminal of the comparator 6 is connected to an input of a timer disable circuit shown as an AND circuit 8. The output of the AND circuit 8 is connected to the input of the timer 4. 30 In accordance with the invention, a transient detector 9 is provided to detect that an overcuπent is a transient overcuπent.
In the embodiment in Fig. 1, the transient detector 9 is connected with its input to the output of the cuπent sensing device 3 and with its output to an inverting input of the AND circuit 8.
It is however to be understood that the transient detector 9 does not necessarily have to be connected with its input to the output of the cuπent sensing device 3. To de- tect transient overcuπents, the transient detector 9 can equally well be connected with its input to e.g. a point between the load 2 and the cuπent limiting resistor Rl to detect the voltage across that resistor.
The (+) input terminal of the voltage amplifier 5 is connected to a reference voltage source 10. The reference voltage source 10 that can be implemented by means of e.g. a voltage divider provides a reference signal that can assume two different values IOFF and ION. The value IOFF represents the load cuπent value at which the transistor SW2 is to be turned off, and the value ION represents the load cuπent value at which the transistor SW2 is to be turned on again as will be described more in detail below with reference to Fig. 2.
Generally, the transient overcuπent protector according to the invention detects that the overcuπent is a transient overcurrent by means of the transient detector 9.
Normally, when there are no overcuπents, the transistors SWl and SW2 are fully conducting, and the load current through the cuπent sensing device 3 is lower than INOM.
A transient overcuπent has a rise time which is a fraction of the time that is required for the timer 4 to run out and turn off both the transistor SW2 and the transistor With reference to Fig. 2, it is supposed that a transient overcuπent appears at time tl.
When the cuπent has risen above IOFF as indicated in Fig. 2, the output signal from the voltage amplifier 5 goes low. Hereby, the transistor SW2 is instantaneously turned off.
The cuπent is peak limited at a value IMAX as shown in Fig. 2. The cuπent value IMAX is set by the resistance value of the cuπent limiting resistor Rl, since the transistor SWl is still fully conducting. Having reached its peak at IMAX, the transient cuπent starts to decay as illustrated in Fig. 2.
This decay is detected by means of the transient detector 9.
If the decay is fast enough, the timer 4 is not triggered even if the output signal from the comparator 6 is high (the load cuπent > INOM) and the output signal from the transient detector 9 also is high. However, since the latter is inverted at the inverting input of the AND circuit 8, the output signal of the AND circuit 8 is kept low.
When the transient load cuπent has decayed to the value ION, e.g. at a time t2, a negative feedback loop is formed by the voltage amplifier 5, the transistor SW2, the cuπent sensing device 3, and the reference voltage source 10 which has assumed the value ION. The output voltage of the voltage amplifier 5 starts to increase, and the transistor SW2 starts to conduct an increasing cuπent ISW2 as illustrated in Fig. 2.
At the same time, the cuπent though the transistor SWl starts to decrease coπe- spondingly as indicated by ISW1 in Fig. 2.
Thus, the transistor SW2 gradually "takes over" the load cuπent from the transistor SWl and the cuπent limiting resistor Rl. In other words, the transistor SW2 is gradually conducting more cuπent at the same rate of change as the voltage across the load 2 is increasing, e.g. due to charging of an input capacitance of the load 2.
When the input capacitance of the load 2 is fully charged, the transient cuπent no longer exists and the cuπent is then limited by the load 2 only. In the normal case, the current will then be of a value below the nominal value INOM.
At a predetermined inclination of the transient, as detected by the transient detector 9, the output of the transient detector 9 goes low. Since the output of the comparator 6 still is high, the output of the AND circuit goes high triggering or enabling the timer 4.
The timer 4 is set in such a manner that it does not run out before the input capacitance of the load 2 has been fully charged.
This controlled behavior of both voltage and cuπent in the transistor SW2 makes it possible to design the overcuπent protector for a minimum power loss in transistor SW2. The power loss in the transistor SWl is always low because the transistor SWl is fully conducting. As a consequence, the voltage drop across the transistor SWl is very low.

Claims

CLAIM
An arrangement for protecting a DC voltage source (1), connected to a load (2), against overcuπents, comprising a first switch (SWl) which in series with a cuπent limiting resistor (Rl) is connected in series with the load (2), a second switch
(SW2) which is connected in parallel with the first switch (SWl) and the cuπent limiting resistor (Rl), and a control circuit for controlling said first and second switches (SWl, SW2), the control circuit comprising means for keeping said first and second switches (SWl, SW2) turned on in the absence of overcuπents, means for detecting an overcuπent, means for turning off said second switch (SW2) in response to a detected overcuπent to supply the load (2) with cuπent only via the first switch (SWl) and the cuπent limiting resistor (Rl), and a timing circuit (Bl for turning off said first switch (SWl) after a predetermined time to disconnect the load (2), characterized in that the control circuit moreover comprises - a transient detector (9) for detecting transient overcuπents,
- means (8) for inhibiting the turning off of the first switch (SWl) in response to detected transient overcuπents, and
- means (3, 5, 10) for turning on said second switch (SW2) in response to that the transient cuπents through the first switch (SWl) and the cuπent limiting resistor (Rl) have decayed to a predetermined value (ION) to supply the load (2) with a decreasing cuπent via the first switch (SWl) and the cuπent limiting resistor (Rl), and a coπespondingly increasing cuπent via the second switch (SW2) until the load (2) is supplied with cuπent only via the second switch (SW2).
PCT/SE2000/001442 1999-09-06 2000-07-06 An arrangement for protecting a dc source WO2001018933A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU60434/00A AU6043400A (en) 1999-09-06 2000-07-06 An arrangement for protecting a dc source

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9903137A SE9903137L (en) 1999-09-06 1999-09-06 Device for protecting a direct current source
SE9903137-9 1999-09-06

Publications (1)

Publication Number Publication Date
WO2001018933A1 true WO2001018933A1 (en) 2001-03-15

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Application Number Title Priority Date Filing Date
PCT/SE2000/001442 WO2001018933A1 (en) 1999-09-06 2000-07-06 An arrangement for protecting a dc source

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CN (1) CN1372712A (en)
AU (1) AU6043400A (en)
SE (2) SE516363C2 (en)
WO (1) WO2001018933A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1724899B1 (en) * 2005-05-17 2016-08-03 Continental Automotive GmbH Apparatus for short circuit protection
CN101248358B (en) * 2005-06-29 2012-04-18 Abb研究有限公司 Device for current detection and method for operating the same
CN102684178B (en) * 2011-03-11 2015-05-06 同方泰德国际科技(北京)有限公司 Multi-output circuit using power supply load short-circuit protection circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19640446A1 (en) * 1996-09-30 1998-04-16 Siemens Ag Over-current protection circuit arrangement

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19640446A1 (en) * 1996-09-30 1998-04-16 Siemens Ag Over-current protection circuit arrangement

Also Published As

Publication number Publication date
CN1372712A (en) 2002-10-02
SE9903137D0 (en) 1999-09-06
AU6043400A (en) 2001-04-10
SE9903137L (en) 2001-03-07
SE516363C2 (en) 2002-01-08

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