WO2001017166A8 - Ethernet 10/100 media access controller core - Google Patents

Ethernet 10/100 media access controller core

Info

Publication number
WO2001017166A8
WO2001017166A8 PCT/US2000/023647 US0023647W WO0117166A8 WO 2001017166 A8 WO2001017166 A8 WO 2001017166A8 US 0023647 W US0023647 W US 0023647W WO 0117166 A8 WO0117166 A8 WO 0117166A8
Authority
WO
WIPO (PCT)
Prior art keywords
level functions
ethernet
design
mii
support
Prior art date
Application number
PCT/US2000/023647
Other languages
French (fr)
Other versions
WO2001017166A3 (en
WO2001017166A9 (en
WO2001017166A2 (en
Inventor
Ramana Kalapatapu
Original Assignee
Insilicon
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Insilicon filed Critical Insilicon
Priority to AU75735/00A priority Critical patent/AU7573500A/en
Publication of WO2001017166A2 publication Critical patent/WO2001017166A2/en
Publication of WO2001017166A3 publication Critical patent/WO2001017166A3/en
Publication of WO2001017166A9 publication Critical patent/WO2001017166A9/en
Publication of WO2001017166A8 publication Critical patent/WO2001017166A8/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/351—Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/354—Switches specially adapted for specific applications for supporting virtual local area networks [VLAN]

Abstract

A design tool for designing a MAC contains the functionality for performing an Ethernet data link layer protocol and also includes a variety of system-level functions. These system level functions include, for example, RMII, SMII, VCI, preamble generation and removal, automatic thirty-two bit CRC generation and checking, insertion and stripping of padding bytes on transmission and reception, address filtering, a configurable counter for system management support, control of MII compatible PHYs, CSMA/CD, a test environment for verifying functional compliance, VLAN support, synchronization of the MII clocks to the application clock, and Big/Little endian data format support for the application interface. The inclusion of the system-level functions simplifies the design of a MAC, reduces the time to market, ensures compatibility with the Ethernet standards, and enables increased certainty of design due to the built-in test environment.
PCT/US2000/023647 1999-09-01 2000-08-29 Ethernet 10/100 media access controller core WO2001017166A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU75735/00A AU7573500A (en) 1999-09-01 2000-08-29 Ethernet 10/100 media access controller core

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US38755899A 1999-09-01 1999-09-01
US09/387,558 1999-09-01

Publications (4)

Publication Number Publication Date
WO2001017166A2 WO2001017166A2 (en) 2001-03-08
WO2001017166A3 WO2001017166A3 (en) 2002-01-24
WO2001017166A9 WO2001017166A9 (en) 2002-09-12
WO2001017166A8 true WO2001017166A8 (en) 2003-11-13

Family

ID=23530396

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/023647 WO2001017166A2 (en) 1999-09-01 2000-08-29 Ethernet 10/100 media access controller core

Country Status (2)

Country Link
AU (1) AU7573500A (en)
WO (1) WO2001017166A2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100460149B1 (en) * 2001-11-28 2004-12-08 주식회사 코어세스 Apparatus and Method for arbitrating data transmission of devices based on SMII standard
US7042893B1 (en) 2001-12-05 2006-05-09 Marvell International Ltd. Serial media independent interface with double data rate
AU2002237149A1 (en) * 2001-12-30 2003-07-15 Legend (Beijing) Limited. A means and control method for adapting different media of transmission link of network on physical layer.
WO2007091128A1 (en) 2006-02-09 2007-08-16 Freescale Semiconductor, Inc. A method for exchanging information with physical layer component registers
KR101203529B1 (en) 2006-09-22 2012-11-21 삼성전자주식회사 Method and apparatus for synchronizing applications of terminals in a communication network
KR101244915B1 (en) 2006-10-20 2013-03-18 삼성전자주식회사 Method for providing synchonizing information with application layer from medium access control layer and apparatus therefor
US8155157B2 (en) * 2006-09-22 2012-04-10 Samsung Electronics Co., Ltd. Method and apparatus for synchronizing applications of terminals in communication network
CN104468071B (en) * 2014-06-27 2017-08-22 许继电气股份有限公司 A kind of intelligent substation Synchronization Clock anti-interference method
CN106375155B (en) * 2016-09-09 2019-09-27 盛科网络（苏州）有限公司 The control method and control system of MAC simulating, verifying model

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5544067A (en) * 1990-04-06 1996-08-06 Lsi Logic Corporation Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation

Also Published As

Publication number Publication date
WO2001017166A3 (en) 2002-01-24
WO2001017166A9 (en) 2002-09-12
WO2001017166A2 (en) 2001-03-08
AU7573500A (en) 2001-03-26

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