AU7573500A - Ethernet 10/100 media access controller core - Google Patents
Ethernet 10/100 media access controller coreInfo
- Publication number
- AU7573500A AU7573500A AU75735/00A AU7573500A AU7573500A AU 7573500 A AU7573500 A AU 7573500A AU 75735/00 A AU75735/00 A AU 75735/00A AU 7573500 A AU7573500 A AU 7573500A AU 7573500 A AU7573500 A AU 7573500A
- Authority
- AU
- Australia
- Prior art keywords
- ethernet
- media access
- access controller
- controller core
- core
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/35—Switches specially adapted for specific applications
- H04L49/351—Switches specially adapted for specific applications for local area network [LAN], e.g. Ethernet switches
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/35—Switches specially adapted for specific applications
- H04L49/354—Switches specially adapted for specific applications for supporting virtual local area networks [VLAN]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Small-Scale Networks (AREA)
- Communication Control (AREA)
- Information Transfer Systems (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US38755899A | 1999-09-01 | 1999-09-01 | |
US09387558 | 1999-09-01 | ||
PCT/US2000/023647 WO2001017166A2 (en) | 1999-09-01 | 2000-08-29 | Ethernet 10/100 media access controller core |
Publications (1)
Publication Number | Publication Date |
---|---|
AU7573500A true AU7573500A (en) | 2001-03-26 |
Family
ID=23530396
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU75735/00A Abandoned AU7573500A (en) | 1999-09-01 | 2000-08-29 | Ethernet 10/100 media access controller core |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU7573500A (en) |
WO (1) | WO2001017166A2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106375155A (en) * | 2016-09-09 | 2017-02-01 | 盛科网络(苏州)有限公司 | MAC simulation verification model, and control method and control system thereof |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100460149B1 (en) * | 2001-11-28 | 2004-12-08 | 주식회사 코어세스 | Apparatus and Method for arbitrating data transmission of devices based on SMII standard |
US7042893B1 (en) | 2001-12-05 | 2006-05-09 | Marvell International Ltd. | Serial media independent interface with double data rate |
WO2003056775A1 (en) * | 2001-12-30 | 2003-07-10 | Legend (Beijing) Limited. | A means and control method for adapting different media of transmission link of network on physical layer. |
US7949800B2 (en) | 2006-02-09 | 2011-05-24 | Freescale Semiconductor, Inc. | Method for exchanging information with physical layer component registers |
KR101244915B1 (en) | 2006-10-20 | 2013-03-18 | 삼성전자주식회사 | Method for providing synchonizing information with application layer from medium access control layer and apparatus therefor |
US8155157B2 (en) | 2006-09-22 | 2012-04-10 | Samsung Electronics Co., Ltd. | Method and apparatus for synchronizing applications of terminals in communication network |
KR101203529B1 (en) | 2006-09-22 | 2012-11-21 | 삼성전자주식회사 | Method and apparatus for synchronizing applications of terminals in a communication network |
CN104468071B (en) * | 2014-06-27 | 2017-08-22 | 许继电气股份有限公司 | A kind of intelligent substation Synchronization Clock anti-interference method |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5544067A (en) * | 1990-04-06 | 1996-08-06 | Lsi Logic Corporation | Method and system for creating, deriving and validating structural description of electronic system from higher level, behavior-oriented description, including interactive schematic design and simulation |
-
2000
- 2000-08-29 WO PCT/US2000/023647 patent/WO2001017166A2/en active Application Filing
- 2000-08-29 AU AU75735/00A patent/AU7573500A/en not_active Abandoned
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106375155A (en) * | 2016-09-09 | 2017-02-01 | 盛科网络(苏州)有限公司 | MAC simulation verification model, and control method and control system thereof |
CN106375155B (en) * | 2016-09-09 | 2019-09-27 | 盛科网络(苏州)有限公司 | The control method and control system of MAC simulating, verifying model |
Also Published As
Publication number | Publication date |
---|---|
WO2001017166A3 (en) | 2002-01-24 |
WO2001017166A8 (en) | 2003-11-13 |
WO2001017166A9 (en) | 2002-09-12 |
WO2001017166A2 (en) | 2001-03-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |