WO2001017032A1

WO2001017032A1 - Capacitor structure

Info

Publication number: WO2001017032A1
Application number: PCT/EP2000/008307
Authority: WO
Inventors: Reinhard Losehand; Hubert Werthmann
Original assignee: Infineon Technologies Ag
Priority date: 1999-08-27
Filing date: 2000-08-25
Publication date: 2001-03-08
Also published as: DE19940825A1; TW475255B

Abstract

The invention relates to a capacitor structure, comprising a capacitor region, a border region and optionally comprising a contact region. Said capacitor region has a first conductive layer (1), a continuous first insulation layer which is applied to the first conductive layer and a continuous second conductive layer (6) which is applied to the insulation layer (5). In addition, elongated recesses are incorporated into the capacitor region. The capacitor structure is characterised in that the second insulation layer (7) is located either between the first electrically conductive layer and the first insulation layer, or between the first electrically conductive layer and the second electrically conductive layer.

Description

description

capacitor structure

The present invention relates to a capacitor structure according to the preamble of claim 1.

Capacitor structures of a semiconductor material having etched to increase the active capacitor surface of elongated recesses which termaterials starting extend in depth from a top side of the semiconducting ^¬ be ^¬ are already known. For example, European Patent Application EP 0 528 281 and Lehmann et al., A new capacitor technology based on porous Silicon, Solid State Technology, November 1995, pages 99 and 100, describe one

Capacitor structure in which a plurality of elongated depressions or also hole openings are produced on a first surface of an n-doped, single-crystalline silicon layer by means of electrochemical etching. The Innenwan- d _ü nts of the perforated openings and the first surface of the silicon layer are completely covered with a dielectric layer (eg. B. consisting of Si0 ₂₎ covered, on which in turn a conductive layer (eg. B. consisting of doped n-of Polysili- zium) is arranged. An electrical connection contact is located on a second surface of the silicon layer and on the conductive layer, the connection contacts being made of aluminum, for example.

DE 197 13 052 describes a capacitor structure with a breakdown voltage that is constant or even increased during manufacture. In this structure, an additional insulating layer is located in a capacitor edge zone of the capacitor structure, which enables reliable separation or electrical insulation between the connection contact of the substrate and the second electrically conductive layer in the region of the capacitor structure. This means that at least in a part of the capacitor edge zone, in the one Edge region of the second electrically conductive layer and the main surface of the first electrically conductive layer come to lie next to one another, an insulating layer is present. The insulating layer prevents the capacitor edge zone in which the dielectric

Layer next to the two electrically conductive layers is exposed and, due to the manufacturing process, is thinner than within the capacitor area and in which the thickness of the dielectric layer decreases to a thickness of zero within a few micrometers outside the capacitor area, surface leakage currents of an ionic type, metal bridges between the two electrically conductive Form layers that would cause the capacitor to short.

During the manufacture of the generic capacitor structures, in particular when manufacturing large numbers of the capacitor structures, the connection contacts must be made by machine bonding, e.g. Nailhead bonding can be connected to external electrical connections. It has been shown that the capacitor arrangement described above can be damaged during the mechanical stresses occurring during bonding. In individual cases, cracks can occur in the insulation layer during so-called nailhead bonding, in particular when contact has to be made in the area of the capacitor structure (capacitor area). The cracks in the insulation layer to be prevented will sooner or later lead to short circuits in the capacitor, making it unusable. This problem occurs in particular when a comparatively thin dielectric layer is applied to increase the capacitance of the capacitor structure.

The invention relates to an improved capacitor structure according to claim 1.

According to the invention it is provided that the additional insulating layer already provided in DE 197 13 052 (second Insulation layer) either between the first electrically conductive layer, which is for example a silicon substrate, and the first insulation layer, which is generally the dielectric layer of the capacitor, or that this additional second insulation layer between the first electrically conductive layer and the second electrically conductive layer is arranged. This second insulation layer is preferably considerably thicker than the first insulation layer. The second insulation layer preferably extends far beyond the edge region of the capacitor. It is also preferred that the first insulation layer also extends over substantially the entire edge region.

The capacitor structure according to the invention effectively prevents short circuits in the edge region, that is to say in the region of the exposed thin dielectric layer.

As already explained above, damage to the dielectric can occur, particularly in the case of a thin dielectric layer, during the contacting of the capacitor. In general, at least one capacitor contact is arranged on the top of the capacitor. If this contact is positioned in the area above the capacitor structure, for example, the underlying dielectric layer can be damaged. The layer sequence according to the invention enables the production of capacitor contacts arranged on the upper side also outside the capacitor zone, that is to say the capacitor contacting takes place in a preferred embodiment of the invention in a separate contact area which is generally outside the capacitor structure. As a result of the layer sequence claimed according to the invention, both the contact area and the edge area are additionally insulated from the substrate by a comparatively thick insulation layer, which is preferably an oxide material. The connection contact for the first conductive layer is preferably arranged on the underside of the substrate. This embodiment, which is also referred to as rear-side contacting, is particularly advantageous when the elongated depressions are produced using a dry etching process known per se. It is therefore preferred to produce the elongated depressions in the capacitor structure according to the invention by means of a dry etching process known per se.

Show it

FIG. 1 shows a schematic representation of a cross section of a capacitor structure according to the invention,

FIG. 2 shows a schematic illustration of an enlarged area of the capacitor structure shown in FIG. 1,

FIG. 3 shows a schematic representation of a further cross section of a capacitor structure according to the invention, in which, in addition to the edge region 14, the contact region 15 is also shown and

FIG. 4 shows a schematic illustration of an enlarged illustration of a detail from the cross section in FIG. 3.

The capacitor structure shown in FIG. 1 has an n-doped single-crystalline silicon layer as the first electrically conductive layer 1. This is interspersed with a large number of elongated depressions 3, which protrude from the top into the substrate. The hole depth of the elongated depressions is in the range from 100 to 250 micrometers when using a wet etching process known per se, and in the range from 5 to 30 micrometers when using a dry etching process known per se. The hole width is preferably 0.5 to 3 micrometers. The elongated depressions 3 have inner walls 4 which are completely covered with a first insulation layer 5. As material for the first ω ω M INJ H »

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FIG. 2 shows an enlarged schematic illustration of the region highlighted by the circle K in FIG. 1. The edge region 14 has a second insulation layer 7, which lies directly on the first electrically conductive material in the region of the capacitor edge zone. Underneath the second insulation layer 7 there can be elongate depressions that cannot be used electrically. The comparatively thicker second insulation layer 7 ends in the direction of the electrically active capacitor cells. The first insulation layer 5, which is relatively thin, runs continuously from the capacitor region 13 into the edge region 14, which covers the second insulation layer 7 in the edge region. This results in a step in the area of the edge 12 of the second insulation layer 7. This step is preferably beveled. The second electrically conductive layer 6, preferably applied after the first insulation layer 5, likewise runs continuously from the capacitor region over the step to the region of the edge of the capacitor structure. The connection contact layer 9 can also extend into the edge region.

The further embodiment shown in FIG. 3 for a capacitor structure according to the invention includes three capacitor areas: a capacitor area 13 with a layer sequence that corresponds to the layer sequence in the capacitor area of the exemplary embodiment from FIG. 1, an edge region 14 according to the exemplary embodiment in FIG. 1 and an additional contact area 15 The illustration in FIG. 3 is a simplified illustration compared to FIG. 1, since the thin first insulation layer 5 has been omitted. FIG. 3 shows the following structure in the contact area 15, starting from the first electrically conductive layer 1 on the upper side: First, the second insulation layer 7 is applied both in the contact area 15 and in the edge area 14 to the surface of the first conductive layer. It extends beyond the first insulation layer 5, not shown, continuously over all capacitor regions. The second electrically conductive layer 6 now also extends continuously over this layer. The second electrically conductive layer 6 ends in the edge region 14. Because in this region, due to the second insulation layer 7, none there is spatial proximity to the first electrically conductive layer 1, there is increased electrical breakdown or short-circuit safety. Following the course of the second electrically conductive layer 6, a contact layer 9 known per se is now applied. A contact element 11 is preferably connected in a conductively connected manner to this top-side connection contact 9. This contact element can be, for example, a wire fastened by nailhead bonding.

FIG. 4 schematically shows an enlarged representation of the cross-sectional zone highlighted by the circle J in FIG. Contact layer 9, which is located on the second electrically conductive layer as described above, is deformed by mechanical application of the contact element 11, so that an elevation 17 made of the material of the contact layer is formed directly next to the contact element.

Reference symbol list:

1 first electrically conductive layer

2 first main surface 3 elongated depression

4 inner walls

5 first insulation layer

6 second electrically conductive layer

7 second insulation layer 8 elongated depressions

9 connection contact

10 substrate contact

11 contact element

12 edge 13 capacitor area

14 edge area

15 contact area

16 survey

Claims

claims

1. capacitor structure with a capacitor region (13), an edge region (14) and possibly a contact region (15), in which in the capacitor region (13) a first conductive layer (1), which is in particular a conductive semiconductor substrate, one on the first conductive Layer applied continuous first insulation layer (5) and a second conductive layer (6) continuously applied on the insulation layer (5), wherein the first insulation layer (5) is shaped in such a way that the conductive layers (1,6) from each other are electrically insulated, in which elongated depressions (3, 8) are also worked into the semiconductor substrate in the capacitor region (13) and possibly in the edge region (14) to enlarge the active surface of the capacitor, a second insulation layer in the edge region (14) (7) is present, and wherein at least one connection contact (9) of the capacitor is arranged on the top of the capacitor, thereby characterized in that the second insulation layer (7) is arranged either between the first electrically conductive layer (1) and the first insulation layer (5) or between the first electrically conductive layer (1) and the second electrically conductive layer (6).

2. Capacitor structure according to claim 1, characterized in that the second insulation layer is considerably thicker than the first insulation layer.

3. Capacitor structure according to claim 1 or 2, characterized in that the connection contact (10) for the first conductive layer on the underside of the substrate and Terminal contact (9) for the second conductive layer is arranged on the top of the substrate.

4. Capacitor structure according to claim 3, characterized in that the connection contact (9) arranged on the upper side is located in a contact area (15) which is arranged between two capacitor areas (13).

5. capacitor structure according to at least one of claims 1 to 4, characterized in that the first insulation layer (5) extends over substantially the entire edge region (14) and any contact region (15).

6. capacitor structure according to at least one of claims 1 to 5, characterized in that the second insulation layer (7) extends over substantially the entire edge region (14) and possibly existing contact region (15).

7. capacitor structure according to at least one of claims 1 to 6, characterized in that the second insulation layer (7) has a bevelled edge (12) which between the last to the edge region (14) adjacent elongated recess (3 ') of the capacitor region ( 13) and the first elongated recess (3 '') is arranged in the edge region (14).