WO2001015202A2 - Procedes et systeme de commande en boucle fermee de lampes fluorescentes - Google Patents

Procedes et systeme de commande en boucle fermee de lampes fluorescentes Download PDF

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Publication number
WO2001015202A2
WO2001015202A2 PCT/US2000/022940 US0022940W WO0115202A2 WO 2001015202 A2 WO2001015202 A2 WO 2001015202A2 US 0022940 W US0022940 W US 0022940W WO 0115202 A2 WO0115202 A2 WO 0115202A2
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Prior art keywords
lamp
signal
intensity
wavelength
desired intensity
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PCT/US2000/022940
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English (en)
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WO2001015202A3 (fr
Inventor
Terry Harris
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Bausch & Lomb Incorporated
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Publication date
Application filed by Bausch & Lomb Incorporated filed Critical Bausch & Lomb Incorporated
Priority to AU67940/00A priority Critical patent/AU6794000A/en
Publication of WO2001015202A2 publication Critical patent/WO2001015202A2/fr
Publication of WO2001015202A3 publication Critical patent/WO2001015202A3/fr

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14—Circuit arrangements
    • H05B41/36—Controlling
    • H05B41/38—Controlling the intensity of light
    • H05B41/39—Controlling the intensity of light continuously
    • H05B41/392—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor
    • H05B41/3921—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations
    • H05B41/3922—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations and measurement of the incident light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
    • H05B41/14—Circuit arrangements
    • H05B41/36—Controlling
    • H05B41/38—Controlling the intensity of light
    • H05B41/39—Controlling the intensity of light continuously
    • H05B41/392—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor
    • H05B41/3921—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations
    • H05B41/3924—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations by phase control, e.g. using a triac

Definitions

  • the invention concerns the use and control of fluorescent lamps. More specifically, the invention concerns maintaining a particular intensity of a wavelength emitted by PL-S fluorescent lamps based on a sensed wavelength, as well as quick lamp startup.
  • the PL-S style lamp is a two-pin, twin tube, compact fluorescent lamp with an integral starter and produces the bulk of its light between 350-800 nm. This type of lamp has been used for many years in contact lens/hydrogel curing and manufacture as a source of ultraviolet (UV) radiation that induces cure in hydrogels. Recently, PL-S style lamps have garnered more attention in the lighting industry as an efficient, relatively high-output light source with low operation costs and stands to replace traditional incandescent lamps in many niches.
  • Fluorescent lamps especially PL-S fluorescent lamps, present a plurality of problems when one attempts to maintain their emissions at a particular intensity. Firstly, lamp and ballast manufacturing variability, temperature effects, line voltage fluctuations, and lamp aging all induce intensity variations that introduce error into currently implemented control schemes. Secondly, some light detectors experience a reduction in sensitivity over time; for example, UV radiation detectors lose sensitivity due to solarization of the detector or of a protective coating over the detector. Lastly, lamps must go through a long warm up period to achieve full intensity or to achieve full readiness and responsiveness to a control system.
  • my closed loop control scheme can regulate the lamp intensity of a PL-S lamp by sensing lamp intensity and controlling lamp power through AC phase modulation.
  • the control scheme regulates UV intensity by sensing visible light output by the PL-S lamp.
  • My scheme provides compensation for lamp and ballast manufacturing variability, temperature effects, line voltage fluctuations, and lamp aging.
  • the control system detects visible light, it eliminates performance degradation due to solarization of UV detectors.
  • the controller can set the intensity of multiple banks of lamps and any lamp can be assigned to any bank. Once set, the variability of light intensity can be controlled to within ⁇ 40 ⁇ W/cm 2 (measured substantially at the lamp) and the need to measure the intensity of the process occurs only at regular PMS intervals.
  • the controller monitors and reports lamp failure and near end of lamp life.
  • Soft start circuitry eliminates on/off cycling stresses and cycling lamps on only when needed yields increased lamp useful life. Further, the system reduces typically long warm up periods experienced in the prior art to a few minutes. Description of the Drawings
  • FIG. 1 is a chart showing the emission spectrum of a typical PL-S style fluorescent lamp.
  • FIG. 2 is a chart showing PL-S lamp output intensity as the number of hours of on time for the lamp increases.
  • FIG. 3 is a chart of PL-S lamp intensity as a function of temperature.
  • FIG. 4 is a chart of PL-S lamp intensity as a function of line voltage.
  • FIG. 5 is a chart showing PL-S lamp intensity variation of a typical PL-S lamp in a typical usage situation after the lamp has been on and warmed up for some time.
  • FIG. 6 is a chart showing the behavior of a typical PL-S lamp as it starts up.
  • FIG. 7 is a schematic block diagram of a preferred controller of the invention.
  • FIG. 8 is a schematic circuit diagram of a preferred zero crossing circuit of the invention.
  • FIG. 9 is a schematic diagram of a preferred ramp generator of the invention.
  • FIG. 10 is a schematic diagram of a preferred soft start circuit of the invention.
  • FIG. 11 is a schematic diagram of a preferred power on reset circuit of the invention.
  • FIG. 12 is a chart showing the typical spectral response of a preferred photodiode used in the invention.
  • FIG. 13 is a schematic diagram of a preferred filter/error amplifier circuit of the invention.
  • FIG. 14 is a schematic diagram of a preferred limiter circuit of the invention.
  • FIG. 15 is a schematic diagram of a preferred phase modulator circuit of the invention.
  • FIG. 16 is a schematic diagram of a preferred power stage circuit of the invention.
  • FIG. 17 is a schematic diagram of a preferred alarm discrete circuit of the invention.
  • FIG. 18 is a schematic diagram of a preferred controller alarm circuit of the invention.
  • FIG. 19 is a chart showing the variation of the primary AC voltage, ramp voltage, triac trigger voltage, sensed light signal voltage, and filtered sensed light signal voltage produced by respective preferred circuits of the invention over time, thus illustrating the relative timings of the variations of the voltages.
  • the key factors that affect the intensity level from a PL-S lamp include age, temperature, and lamp power level.
  • the exemplary monitored source of radiation in the preferred embodiment of my invention is a low-pressure, mercury fluorescent lamp known as the PL-S 9W/10.
  • the PL-S style lamp is a two-pin, twin tube 4, compact fluorescent lamp with an integral starter 5 that produces the bulk of its light between 350-800 nm.
  • FIG. 1 shows the typical emission spectrum of such a PL-S lamp.
  • a typical lamp and ballast configuration running continuously under nominal conditions of line and temperature can produce intensity levels as high as 12 mW/cm 2 during the first few hours of life to as low as 3 mW/cm 2 after 2000 hours of continuous use, intensity being measured substantially at the lamp.
  • FIG. 2 shows the relationship of intensity as a function power on hours (POH) for a typical lamp whose intensity was measured using a Spectronics gauge. This intensity is the combination of gauge response and lamp spectral emission and represents the total energy in the emitted spectrum.
  • POH only accumulate when the lamp is on, as the name suggests.
  • the intensity of the lamp is also affected by temperature as shown in FIG. 3.
  • the lamp's output is dominated by the quantum conversion efficiency of the lamp gas. This phenomenon is a function of current density of the discharge column, which depends on the vapor pressure of the gas and current flowing through the lamp. For fixed lamp current, the current density increases as temperature increases due to increased vapor pressure. At higher temperatures, the phosphor coating's conversion efficiency decreases as temperature increases and becomes the factor dominating the output.
  • FIG. 4 shows the relationship between line input voltage and lamp intensity.
  • the first part of the plot shows the lamp's intensity at 120 VAC, the second at 100 VAC, and the third at 140 VAC.
  • the voltage affects intensity at about 100 ⁇ W/cm 2 ⁇ /RMS.
  • ballast inductance accounts for as much as 1000 ⁇ W/cm 2 as a result of the relationships discussed above.
  • Intensity is affected by the location of the lamp relative to its reflector, the shape of the reflector, the surface condition of the reflector, and the interaction of the light spectral response to any transmission medium through which the light must pass.
  • any spatial differences in the orientation of a target or a sensor relative to the source will add to the variability of intensity at the target or sensor.
  • light from each lamp adjacent to a particular target position aids the lamp directly above the target position as do the lamps adjacent to these lamps, etc.
  • a target directly below one lamp in a circular fixture with three equidistant lamps would experience a lower intensity than it would if it were directly below the same lamp by the same distance in a circular fixture of the same diameter with four equidistant lamps.
  • FIG. 6 shows a plot of UV intensity vs. time at startup for a PL-S lamp with and without closed loop control. The plot shows that at 5 minutes, the open loop lamp intensity is still climbing to the final value whereas the closed loop lamp's intensity stabilized within about 15 seconds.
  • FIG. 7 shows a block diagram of an exemplary embodiment of the closed loop system 1 , which forms the basic principle used in controlling the intensity of light emitted by the lamp 3 when driven by an AC power source 2 and the controller 1.
  • a disturbance comes along, such as an increase in line voltage, the power delivered to the lamp 3 increases and the intensity increases as well.
  • a decrease in line voltage decreases power to the lamp and lamp 3 intensity. Increased light incident on the photosensor increases its output voltage.
  • the exemplary controller of FIG. 7 includes the photosensor, such as the light detector 11 , preferably disposed on an light-to-voltage (LTV) distribution board 10 and connected to a filter 21 (such as a low pass filter) on a control board 20 that also carries a comparator 22 (such as a summation circuit), an error amplifier 23, a limiter circuit 24, an alarm circuit 25, a phase modulator 26, a triac drive 27, and a power stage 28.
  • the filter 21 is connected to the comparator 22, which in turn is connected to the error amplifier 23, which sends its output to the limiter circuit 24.
  • the limiter 24 sends its output to the phase modulator 26, which controls the triac drive 27 via a one shot 26a, and the triac drive 26 controls the power stage 28.
  • the phase modulator 26 of the exemplary controller 1 in FIG. 7 is also connected to a control device 30, such as a programmable logic controller (PLC), and to components on a timing and alarm board 40, including a power on reset circuit 41 , which is also connected to the control device 30, and a ramp generator 42, which is connected to a soft start circuit 43 and a zero crossing detector 44.
  • the alarm circuit 25 of the control board 20 is connected to another alarm circuit 45 on the timing and alarm board 40, which is also connected to the control device 30.
  • the output voltage of the photosensor 11 is filtered by a filter 21 , such as a low pass filter, and scaled to produce a DC voltage inversely proportional to the incident light intensity.
  • a filter 21 such as a low pass filter
  • the filtered, scaled DC voltage level decreases.
  • This voltage is compared to a reference (set point) voltage at the comparator 22, and the difference is amplified by the error amplifier 23. Under steady state conditions, these voltages would be the same and the output from the error amplifier 23 would be some constant value. However, due to the disturbance of increased incident intensity, an unbalanced condition exists and the output voltage from the error amplifier 23 increases.
  • the limiter circuit 24 will limit this voltage; but if not, the limiter circuit 24 has no effect on the control and the signal passes through undisturbed.
  • the error amplifier voltage is applied to the phase modulator 26 and increases the delay in triggering the triac drive 27 and power stage 28. This delay decreases the power supplied to the load which decreases the lamp's intensity proportionally. This decrease in power produces the correct adjustment through careful selection of gain and dynamic compensation of the error amplifier 23. If the disturbance is a decrease in line voltage, the description of the process is the same except the word "decrease" replaces the word "increase.”
  • a group of circuits produce a logic level low pulse of about 100 ⁇ sec every time the AC primary voltage crosses zero. This pulse provides the timing to terminate and initiate a new voltage ramp cycle and controls the firing phase angle of the power stage.
  • FIG. 8 shows the schematic of this circuit, the zero crossing detector 44.
  • a sample of the sinusoidal AC primary voltage from the AC power source 2 is sensed across a transformer T1 and squared up by a clamped, analog voltage comparator 441 , preferably including a LM339 unit, that produces a symmetric square wave.
  • Resistors R5 and R6 provide a small amount of hysteresis to suppress spurious oscillations near the zero crossing point, and resistors R4/R5 and resistors R3/R2 bias the signal into the range of the single supply voltage comparator.
  • This waveform is applied to a "one-shot" multivibrator 442 triggered on the rising edge of the square wave and also to another one-shot triggered 443 on the falling edge of the square wave.
  • both one-shots are 74LS123 units.
  • Resistor R7 provides a TTL logic compatible high level to the preferred 74LS123 trigger inputs, and resistor R8/capacitor C2 and resistor R9/capacitor C3 determine the pulse widths at the outputs.
  • the ramp generator shown in FIG. 9 preferably includes an open collector, logic compatible comparator 421 , and a constant current source U4.
  • the outputs of the zero crossing detector's one-shots are "wire-ANDed" together at the input 422 to the comparator 421 to produce a 100 ⁇ sec pulse at two times the AC primary wavelength. While these specific values for the pulse duration and wavelength are preferred, other durations and wavelengths can be used depending on the particular needs of the user.
  • a precision constant current source programmed by a potentiometer preferably charges a capacitor C4 creating a linearly rising ramp.
  • the comparator terminates the ramp cycle by applying the short across the timing capacitor.
  • the charging rate and the time between reset pulses determines the maximum voltage the ramp attains; I prefer to set the voltage to about 7V.
  • the comparator is preferably made TTL logic compatible by setting the logic high level to .45V via the voltage divider R13/R14.
  • the one shot pulses are summed using resistor R10, resistor R11 , and resistor R12 such that any one low logic level is guaranteed to produce less than the .45V at the positive input and two logic level highs are required to produce a voltage greater than the .45V.
  • the comparator applies ground to its output discharging capacitor C4.
  • Resistor R15 is used to program the constant current source U4 and charges capacitor C4 at a constant rate. Since the voltage on a capacitor is equal to the product of the capacitor current times the time the current flows divided by the capacitance, a constant charging current will produce a linear voltage ramp.
  • the open collector transistor at the output of the comparator discharges the timing capacitor every time a one shot triggers, which resets the capacitor voltage to zero and begins a new cycle once the short is removed.
  • the ramp voltage amplitude is preferably reduced below the minimum clamped error signal of the control loops by diverting ramp charging current away from the ramp capacitor 431. Since the ramp voltage is less than the error signal, power stage trigger pulses are inhibited and the lamp 3 is turned off, as is discussed in the description of the phase modulator.
  • a voltage controlled current sink 432 diverts the ramp capacitor charging current so that the final ramp voltage is allowed to increase with time.
  • trigger pulses are again delivered to the power stage every half cycle of the AC line voltage. As the ramp voltage increases, the trigger delay decreases, which in turn increases the current delivered to the lamp filaments. The slowly increasing lamp current warms the filaments slowly and eliminates the cold start stresses.
  • FIG. 10 shows the implementation of this circuit.
  • the current sink 432 includes op-amp U5, transistor Q5, and resistor R18.
  • the large gain of op-amp U5 guarantees that the inverting and non-inverting terminals of the op-amp are at the same potential.
  • the non-inverting op-amp configuration applies a voltage necessary at pin 1 to cause transistor Q5 to conduct and sink current such that the voltage drop across resistor R18 is equal to the voltage at the non-inverting input.
  • the voltage at pin 3 is a linearly falling ramp that starts at ground and decreases to a predetermined voltage over a predetermined period. Preferably, the voltage drops to about -5 volts in about 3 seconds. This signal diverts the ramp capacitor's charging current from about 9 ⁇ A at start to zero current at the end of the time out. I prefer to use a 2N2222 transistor at Q5 and a 560K resistor at R18.
  • Resistor R25 through resistor R27 and transistor Q3 form a 2.5 ⁇ A constant current source 433 that charges capacitor C9 forming a ramp generator 434.
  • the ramp is linear from ground to about -4.3 volts where transistor Q3 saturates. After saturation, the cap continues to charge to -5 volts at an exponential rate.
  • Reset of capacitor C9 is provided by the optocoupler U8 which is controlled by *POR. I prefer to use 3.9K , 1.2K , and 200K resistors at R25, R26, and R27, respectively; a 1 ⁇ F capacitor at C9; a 2N2222 transistor at Q3; and a CNY 17-1 optocoupler at U8.
  • Power on reset (*POR) is provided after powering up of the system, particularly the timing and alarm board, to allow the power supply voltages time to stabilize and also to guarantee known startup conditions for all circuitry.
  • *POR is also gated with the PLC "ON" signal and is used to provide lamp on/off control.
  • a single power on reset can be used; and the *POR can be made available to each respective phase modulator in this case so that, when the power on reset is active, it turns each lamp off.
  • * POR can also be applied to the soft start circuit.
  • FIG. 11 shows a preferred arrangement of the power on reset circuit 41.
  • Constant current source U3 and resistor R17 provide a constant current of about 2.4 ⁇ A into capacitor C1 , which produces a linear voltage ramp. This voltage is compared to the 4.3 V output of the voltage divider 411 , including resistor R19 and resistor R20, by comparator U2. Until the ramp exceeds 4.3 volts, the voltage comparator's output is at ground, which removes base drive from transistor Q1 turning it off. With transistor Q1 off, base drive is available to transistor Q2, which turns it on, pulling * POR to ground. After about 2, seconds the timing capacitor's voltage rises to greater than 4.3V and the comparator's output switches to its logic level high pulled up by resistor R23.
  • Transistor Q1 is biased on through resistor R23, which removes base drive from transistor Q2, turning it off.
  • Resistors R21 and R22 provide hysteresis to eliminate oscillations near the comparator's switching point.
  • Transistors Q1 and Q2, resistor R23, and resistor R24 provide increased current sinking capability for the load on *POR. I prefer to use 270K , 1.5K , 2.7K , and 1 M , resistors at R17, R19, R21 , and R22, respectively, and 10K resistors at R20, R23, and R24. I also prefer to use a LM339 unit at U2, a LM334 constant current source at U3, and 2N2222 transistors at Q1 and Q2.
  • PLC on/off control is accomplished by optocoupler U9, resistor R32, resistor R33, and transistor Q7.
  • the PLC provides a 24 V logic discrete, which indicates a lamp on condition. This voltage biases the LED portion of the optocoupler U9 on through resistor R32. The transistor portion then conducts and removes base drive from transistor Q7, turning it off. This allows the controller to turn lamps on under normal control.
  • the 24 V discrete is removed, the LED and transistor of U9 turn off and base drive is restored to transistor Q7, which turns on and sinks the base drive of transistor Q1 , making *POR true as explained above. This action results in the lamps turning off.
  • Light is preferably sensed using a Texas Instruments TSL252 light to voltage converter 11 operating on a 5 V DC supply.
  • the preferred spectral response shown in FIG. 12 is from 300 nm to 1100 nm.
  • the detector also has sufficient wavelength bandwidth to faithfully reproduce the 120 Hz light pulse signal from the lamp and is shown in FIG. 19.
  • the sensor is coupled to the lamp by means of a fiber optic cable.
  • the detector includes a bandwidth selector, such as a filter, with a 600 nm cutoff that effectively creates a 600 nm to 1100 nm spectral bandwidth system.
  • the energy contained in the bandwidth is integrated by the TSL252 and delivered as a voltage waveform.
  • I refer to the detector as sensing a particular wavelength.
  • the detector senses a range of wavelengths and I select the detector to sense a range including the particular wavelength, but I refer to the detector as sensing the particular wavelength for the sake of convenience.
  • a detector will be developed that can sense only the particular wavelength.
  • the output of the light 10 sensor is preferably scaled and filtered to provide a low ripple DC voltage of 0-5 VDC over the range of programmable lamp intensities.
  • FIG. 13 shows a preferred exemplary arrangement of the filter 21 and error amplifier 23 circuit, which also preferably includes the summation circuit 22.
  • the scaling can be adjustable and can be used for calibrating the controller to match the PLC control voltage range. Minimum lamp intensity is attained at 5 VDC, and maximum lamp intensity is attained at 0 VDC.
  • Capacitor C8 provides filtering and, with resistor R101 , sets a pole at 10 Hz. Resistors R102 and R103 provide offset adjustment, and resistors R104 and R101 provide span adjustment.
  • FIG. 19 shows the effect of the filter 21 for a typical TSL output.
  • a lossy integrating error amplifier is provided to compensate the control loop feedback and provide for stable operation.
  • the amplifier operates in a differential mode with the conditioned intensity voltage and the set point control voltage as inputs.
  • the loop gain is set by the feedback capacitor C7 and resistor R100 with a pole at about 3Hz. Bandwidth of the loop is determined by the filtering stage preceding the error amplifier and the feed back pole.
  • the output of the error amplifier is a DC control voltage used to modulate the firing angle of the power stage.
  • FIG. 19 shows the timing for these waveforms.
  • the phase modulation control voltage must be limited to an upper and lower level to guarantee stable operation due to the inductive nature of the load and the lower permissible operating temperature of the lamp 3. This is accomplished by the precision clamping circuit with independently adjustable upper and lower limits included in the preferred limiter circuit 24 shown in FIG. 14.
  • the phase modulation control voltage is unaffected by this circuit as long as its voltage remains between the limits of V min and V max .
  • the lower limit establishes the maximum intensity (minimum phase delay) that the lamp can produce
  • the upper limit establishes the minimum intensity (maximum phase delay) that the lamp can produce. Any phase delay less than the minimum phase determined by the power factor of the load will result in an additional 180° of phase in the control loop and will cause the controller to become unstable. This instability will cause the lamp to cycle on and off and will eventually destroy the lamp. Any phase delay greater than the maximum will cause the lamp to cool too much resulting again in on and off cycling and eventual destruction of the lamp.
  • both op-amps 243, 244 operate in open loop fashion and become saturated with an output voltage that back biases diodes D1 and D2. If the error voltage increases above V max , then the upper op-amp's 243 output will be driven low enough to forward bias diode D1 through resistor R94 and close the feedback loop, creating a non-inverting unity gain amplifier. The inverting and non-inverting inputs of this op-amp 243 would then be at the same potential, which is V max .
  • any additional voltage provided from the error voltage would be dropped across resistor R94. If the error voltage were to decrease below V min , then the lower op-amp's 244 output will be driven high enough to forward bias diode D2 and close the feedback loop, again creating a non-inverting unity gain amplifier. The output of the amplifier would be V min , and any additional voltage provided from the error voltage would be dropped across resistor R94, as well.
  • the preferred arrangement of the phase modulator of the invention shown in FIG. 15 includes a comparator U10, a one-shot, and an optocoupler U14.
  • the phase modulation control voltage is preferably compared to the ramp voltage to produce a high-to-low logic transition when the ramp voltage exceeds the control voltage and a low-to-high transition when the control voltage exceeds the ramp voltage.
  • the falling edge of this waveform triggers a one-shot to produce a 200 ⁇ sec pulse used to initiate conduction of the power stage.
  • the pulse is isolated from the load by an optocoupled triac driver.
  • the switch can be used to turn the triac on continuously in the bypass mode or to inhibit the triac in the off mode.
  • * POR is used to momentarily inhibit triggering of the power stage after power up.
  • FIG. 19 shows the timing for these waveforms.
  • the error signal is preferably compared to the ramp voltage by comparator U10 and initiates a high-to-low transition at its output when the ramp voltage is greater than the error voltage.
  • This transition momentarily couples what is substantially ground (a true ground is nearly impossible to achieve here and this is instead a small, negligible negative voltage) across capacitor C5 that removes base drive from transistor Q17, turning it off.
  • the off state of transistor Q17 allows transistor Q18 to regain its base drive and turn on, conducting the optocoupler's LED bias current, which in turn drives the optotriac into conduction.
  • the current supplied from the optotriac is used to trigger the power triac.
  • capacitor C5 When capacitor C5 reaches a preferred voltage of about 0.7 V by charging through resistor R95, transistor Q17 begins to conduct again and removes base drive from transistor Q18, turning it off. The LED bias current is removed, and the optotriac output current is removed from the power triac. At the end of a predetermined ramp voltage cycle, preferably 8.33 msec, the ramp voltage is reset to ground and the comparator's output transitions from low-to- high pulled up through resistor R89.
  • the timing capacitor C5 couples the 5 V pull-up voltage across itself and discharges through transistor Q17's base/emitter junction and resistor R89. Since resistor R89 is less than resistor R95, the discharge time constant is a fraction of the charge time constant, which guarantees a return to a stable start condition.
  • the controller can be bypassed and the lamp turned on fully by applying ground to the base of transistor Q17.
  • S2 provides this function, which removes base drive from transistor Q17, turning it off continuously.
  • transistor Q17 off transistor Q18 will be on, which enables continuous LED and optotriac current; and hence, the power triac will be conducting continuously.
  • Continuous conduction will apply full voltage to the lamp, and lamp voltage must be kept below a predetermined level in this mode to avoid lamp failure and to enhance safety.
  • Lamps can be turned off by applying ground to the output of the comparator which inhibits the discharging of capacitor C5 and keeps transistor Q17 conducting continuously. This state will turn the power triac off until the ground is removed as explained above.
  • the power stage includes a RC snubber circuit (resistor R98, resistor R99, and capacitor C6, preferably of 180 , 680 , and 0.068 ⁇ F, respectively) and a triac (Q25) as shown in FIG. 16.
  • the triac is used to switch the hot side of the AC load and is applied to the lamp ballast.
  • the snubber reduces stress on the triac and output of the optocoupler.
  • Each alarm control circuit 250 monitors the control voltage necessary to produce the desired UV intensity from the lamp it is controlling.
  • Two active low signals are produced and used to drive three front panel indicating lamps. These lamps signal green for normal operation, yellow if the control voltage is near the end of its operating range, and red if the control is beyond its operating range.
  • Each of the active low signals are combined with others of their kind from the rest of the control circuits to provide two separate digital discretes 450 to indicate controller status to the PLC.
  • Each discrete 450 is preferably made available as an uncommitted, optocoupled transistor output located on the Timing and Alarm Board in the alarms circuit 45.
  • the first discrete 450 indicates whether any control circuit is failing to control its lamp's intensity as would happen if the lamp 3 burned out or was unable to produce the required intensity set by the PLC.
  • the second discrete 450 indicates if any control circuit is near the end of its controllable range as would happen if a lamp were near the end of its usable life. Both are powered from the 5 V power supply such that a failure of the power supply will look like two alarm conditions to the PLC.
  • An option is available on the control board to disable an individual control circuit's contribution to the alarm or warning discretes but still indicate the state of the control signal at the front panel by the LEDs.
  • This optional control is preferably located in the alarm control circuit area represented by the control board alarm circuit 25 shown in FIG. 7, an exemplary control circuit of which is shown in FIG. 18.
  • FIG. 17 shows the preferred topology used for both logic discretes 450.
  • Resistor R31 provides base drive for transistor Q4, enabling bias current for the LED 451 of optocoupler U6 to flow under non-alarm conditions. With the LED bias current flowing, the optocoupler output transistor 452 can conduct current supplied from the PLC input logic device. When * Warn (*Alarm) goes low, the base drive is removed from transistor Q4 and the LED bias current is removed. The optocoupler's output transistor 452 will no longer conduct any current and can hold off up to 70 volts from the PLC logic input device. I prefer to use resistors of 330 and 10K at R30 and R31 , respectively; a 2N2222 transistor at Q4; and a CNY 17-1 optocoupled transistor at U6.
  • Each alarm control circuit 250 preferably has a window comparator 251 that compares the phase modulator control voltage to V max and V m ⁇ n as shown in FIG. 18. If the control voltage is less than V max , pin 14 of comparator U3 will be pulled high through resistor R12; or, if the control voltage is greater than V m ⁇ n , pin 13 of comparator U3 will be pulled high through resistor R9. This voltage is applied to the red LED drive circuit 252 (which includes resistor R1 , resistor R5, transistor Q1 , and L1 ) and the green LED drive circuit 253 (which includes resistor R4, resistor R3, resistor R2, and transistors Q2 and Q4).
  • the voltage applied to the red and green LED drive circuits 252, 253 turns the red LED off and the green LED on indicating a normal operating condition for this control circuit.
  • the signal is also applied to the open collector nand gate U1 , along with *Disable, an active low discrete. Whenever * Disable is active, the output of open collector nand gate U1 pin 3 ( * fault) will be open collector regardless of the state of the other signal; but when * Disable is inactive the output will be low when this signal is high or high when this signal is low.
  • the lamp can only be regulated to an intensity below that which it could go to if it was driven off the line by the standard ballast scheme.
  • the system takes advantage of the relationship between increased intensity and increased voltages. For example, the AC primary voltage is stepped up to 140 VRMS so that a lamp that normally operates at 10 mW/cm 2 at a line voltage of 120 VRMS would produce 12 mW/cm 2 at a line voltage of 140 VRMS.
  • the controller can now reduce the current into the lamp to restore the intensity down to the 10 mW/cm 2 level and have enough overhead to compensate for a 2 mW/cm 2 reduction in intensity due the aging of the lamp.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Circuit Arrangements For Discharge Lamps (AREA)
  • Discharge-Lamp Control Circuits And Pulse- Feed Circuits (AREA)

Abstract

La présente invention concerne un procédé de commande en boucle fermée qui régule l'intensité lumineuse d'une lampe PL-S dans une longueur d'onde en détectant le rendement lumineux de la lampe dans une autre longueur d'onde et en commandant la puissance de la lampe par modulation de phase c.a.. De préférence, ce procédé régule l'intensité de la lampe en réaction à une lumière détectée émise par la lampe. Ce procédé permet de corriger la variabilité de fabrication de la lampe et du ballast, les effets de la température, les fluctuations de la tension de ligne, et le vieillissement de la lampe. Le dispositif de commande peut déterminer l'intensité d'un certain nombre de groupes de lampes, n'importe quelle lampe pouvant être attribuée à n'importe quel groupe. Une fois la détection d'une longueur d'onde de lumière visible et la commande de la longueur d'onde UV déterminées, la variabilité de l'intensité de la lumière UV est commandée dans une plage ±40 νW/cm2 à un niveau 12,000 νW/cm2 (mesuré sensiblement au niveau de la lampe), représentant 33 % d'erreur; le besoin de mesurer l'intensité du processus n'intervenant qu'à des intervalles PMS réguliers. Le dispositif de commande surveille et signale le grillage de la lampe et l'étape proche de la fin de vie de la lampe. Les circuits de mise sous tension sans appel de courant empêchent les contraintes de cyclage marche/arrêt et les lampes de cyclage seulement lorsque les rendements recherchés augmentent la durée de vie utile de la lampe. Par ailleurs, ce système réduit généralement à quelques minutes les longues périodes de mise en fonctionnement connues dans les techniques précédentes.
PCT/US2000/022940 1999-08-23 2000-08-21 Procedes et systeme de commande en boucle fermee de lampes fluorescentes WO2001015202A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU67940/00A AU6794000A (en) 1999-08-23 2000-08-21 Method of and system for closed loop control of fluorescent lamps

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US58584499P 1999-08-23 1999-08-23
US60/585,844 2004-07-08

Publications (2)

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WO2001015202A2 true WO2001015202A2 (fr) 2001-03-01
WO2001015202A3 WO2001015202A3 (fr) 2001-10-04

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PCT/US2000/022940 WO2001015202A2 (fr) 1999-08-23 2000-08-21 Procedes et systeme de commande en boucle fermee de lampes fluorescentes

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AU (1) AU6794000A (fr)
WO (1) WO2001015202A2 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005006820A1 (fr) * 2003-06-13 2005-01-20 Ictel, Llc Ballast electronique
WO2007033966A1 (fr) * 2005-09-23 2007-03-29 Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH Circuit pour mesurer la luminosité de sources lumineuses
WO2008058994A1 (fr) * 2006-11-17 2008-05-22 Osram Gesellschaft mit beschränkter Haftung Lampe à décharge à basse pression et procédé de commande d'une lampe à décharge à basse pression

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US4346331A (en) * 1980-05-27 1982-08-24 Enertron, Inc. Feedback control system for applying AC power to ballasted lamps
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EP0508526A1 (fr) * 1991-04-10 1992-10-14 Koninklijke Philips Electronics N.V. Circuit
EP0563716A1 (fr) * 1992-03-30 1993-10-06 Otto Diez Elektromaschinenbau Dispositif à lampe UV
WO1994014301A1 (fr) * 1992-12-10 1994-06-23 Intelliswitch, Inc. Variateur de lumiere automatique pour lampes a decharge
US5414325A (en) * 1994-04-13 1995-05-09 General Electric Company Gas discharge lamp ballast circuit with automatically calibrated light feedback control
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US5726534A (en) * 1995-06-05 1998-03-10 Samsung Electronics Co., Ltd. Preheat current control circuit based upon the number of lamps detected
US5786801A (en) * 1996-09-06 1998-07-28 Sony Corporation Back light control apparatus and method for a flat display system

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US4032817A (en) * 1974-12-12 1977-06-28 Harris Corporation Wide range power control for electric discharge lamp and press using the same
US4346331A (en) * 1980-05-27 1982-08-24 Enertron, Inc. Feedback control system for applying AC power to ballasted lamps
US4642526A (en) * 1984-09-14 1987-02-10 Angstrom Robotics & Technologies, Inc. Fluorescent object recognition system having self-modulated light source
EP0508526A1 (fr) * 1991-04-10 1992-10-14 Koninklijke Philips Electronics N.V. Circuit
EP0563716A1 (fr) * 1992-03-30 1993-10-06 Otto Diez Elektromaschinenbau Dispositif à lampe UV
WO1994014301A1 (fr) * 1992-12-10 1994-06-23 Intelliswitch, Inc. Variateur de lumiere automatique pour lampes a decharge
US5598042A (en) * 1993-09-22 1997-01-28 The Watt Stopper Moveable desktop load controller
US5414325A (en) * 1994-04-13 1995-05-09 General Electric Company Gas discharge lamp ballast circuit with automatically calibrated light feedback control
US5726534A (en) * 1995-06-05 1998-03-10 Samsung Electronics Co., Ltd. Preheat current control circuit based upon the number of lamps detected
US5786801A (en) * 1996-09-06 1998-07-28 Sony Corporation Back light control apparatus and method for a flat display system

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CLS Electrical Distributors 1997: Fluorescent Lamp Size Guide. www.cisco.com/size/fllamp.htm XP002152995 *
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Philips Corporation, Product specifications: Fluorescent lamps PL-S/4p XP002153100 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005006820A1 (fr) * 2003-06-13 2005-01-20 Ictel, Llc Ballast electronique
WO2007033966A1 (fr) * 2005-09-23 2007-03-29 Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH Circuit pour mesurer la luminosité de sources lumineuses
KR101457021B1 (ko) * 2005-09-23 2014-10-31 오스람 게엠베하 광원들의 명도를 측정하기 위한 회로
WO2008058994A1 (fr) * 2006-11-17 2008-05-22 Osram Gesellschaft mit beschränkter Haftung Lampe à décharge à basse pression et procédé de commande d'une lampe à décharge à basse pression

Also Published As

Publication number Publication date
AU6794000A (en) 2001-03-19
WO2001015202A3 (fr) 2001-10-04

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