WO2001010021A1

WO2001010021A1 - Analog filter

Info

Publication number: WO2001010021A1
Application number: PCT/EP2000/006537
Authority: WO
Inventors: Sven Mattisson
Original assignee: Telefonaktiebolaget Lm Ericsson (Publ)
Priority date: 1999-08-03
Filing date: 2000-07-10
Publication date: 2001-02-08
Also published as: JP2003506946A; EP1201030A1; DE19936430A1; CN1369135A; AU6157500A

Abstract

The invention relates to an analog filter (IF) including at least one filter stage (FSTi) having an input terminal (INi), an output terminal (OUTi) and an impedance network (INET') connected between said input and output terminals (INi, OUTi) and ground (GND), said impedance network (INET') having arranged three impedance elements (La, Lb, Lc, G2, G3, G4) in a Delta-configuration, such that a first node (N1i) of the Delta-configuration is connected to the input terminal (INi), a second node (N2i) of the Delta-configuration is connected to the output terminal (OUTi) and the third node (N3i) is connected to ground (GND). Optionally, a capacitive network (CNET) is inserted between said third node (N3i) and ground (GND). Using the star-delta transformation parasitic nodes, in particular purely resistive nodes in the filter transfer function when gyrators are used to replace inductances, are avoided since each inductance connection node (N1i, N2i, N3i) is respectively connected to a capacitive element (C1, CNET, C5).

Description

ANALOG FILTER

Field of the invention

The present invention relates to an analog filter. In particular, the invention relates to on-chip IF filters which require a high accuracy and thus a careful implementation. The analog filters considered by the invention may be passive analog filters using only passive components like coils and capacitors. However, the analog filters of the present invention may also be active analog filters where inductances are replaced by gyrators (gyrator-C or gm-C filters) .

Background of the invention

Fig. 1 shows a typical construction of a conventional filter circuit. The filter circuit comprises at least one filter stage FSTi and a plurality of filter stages FST1, ... FSTi ...FSTI can be cascaded. Typically the filter circuit is fed by a source S and terminated with a termination impedance T. Basically, if each filter stage FSTi adds one pole to the filter transfer function, then the filter transfer function is of the order I. As is well known, the filter transfer function of an analog filter is represented by a polynomial of order I having a plurality of zeros and poles in the complex plane. However, when the theoretically designed filter transfer function is practically implemented by a plurality of filter stages using real components like capacitors and inductances (coils) , then parasitic effects may distort the filter transfer function and can cause undesired performance of the analog filter. Such parasitic effects are a result of the creation of internal nodes which do not belong to the theoretically designed filter transfer function (filter topology). Furthermore, additional internal nodes can be created when network transformations result in purely resistive nodes. That is, in order that the filter has desired properties, mathematical transformations can alter the zero/pole structure of the transfer function and may thus result in different properties. However, especially in the case of purely resistive nodes any stray capacitance will add undesired poles and/or zeros in the filter transfer function.

Therefore, the used components must have very exact values or automatic tuning circuits of the resonator (filter) components must be used, in order to minimize the influence of parasitics, especially those that cannot be compensated by existing desired components. Such automatic tuning can for example be preferably used in the case of gyrator-C or gm-C filters .

Therefore, it is always desired to design the filter in such a way that changes in the component values and/or parasitic effects do not result in additional nodes in the real transfer function which would otherwise not be present and cause instability or a different filter performance.

Description of the prior art

The design of analog filters is well advanced and various techniques are available how a predetermined desired filter transfer function is realized in practice. Typically, the design starts from a basic, low-pass prototype filter circuit comprising at least one filter stage FSTI. One example of such a filter stage is shown in Fig. 2a. A capacitor Cl is connected between ground GND and an input terminal INI of the filter stage FSTI. Likewise, a capacitor C5 is connected between ground GND and an output terminal OUTI of the filter stage FSTI. Furthermore, there is provided as a termination the resistor R5 and at the input the filter stage FSTI is supplied from a source S which e.g. consists of a current source I and a resistor Rl .

In the filter stage FSTI a capacitive network formed by the capacitor C3 can be present and be connected to ground GND and an impedance network, for example an inductive network formed by star-connection of the inductances L2 , L3 , L4, is connected between the capacitor C3 and the input and output terminals INI, OUTI. Whilst the impedance network LI, L2 , L3 is always present, there are filter circuits where the capacitive network is missing, i.e. the capacitor C3 is just a wire to ground.

As shown in Fig. 3a, there can be provided a plurality of filter stages FSTI, FST2 , FST3 each having the basic construction as shown in Fig. 2a. The filter stages FSTI, FST2 , FST3 are cascaded, such that the respective inductances L41, L22; L42, L23 are serially connected. Of course the circuit in Fig. 3a is reduced to the filter in Fig. 3b where the coils L41, L22; L42, L23 are merged into a single inductance L', L' ' which results in the filter circuit in Fig. 3b. Using such a cascading of filter stages a filter circuit of a predetermined order can be implemented.

Starting with the basic filter design for one filter stage FSTI as shown in Fig. 2a, it has recently been proposed to provide means for transforming the configuration into sets of grounded resonators which are free from solitary parasitics (adding new undesired poles or zeros) . Typically, a band-pass transformation is applied to the filter stage FSTI in Fig. 2a resulting in a typical conventional bandpass prototype transformation as shown in Fig. 2b. Fig. 2c shows a typical gyrator realisation of Fig. 2b where the coils are replaced by gyrators as shown in Fig. 4a (to be described later) .

Essentially, Fig. 2c is the bandpass transformed version of

Fig. 4b showing the gyrator realisation of Fig. 2a.

The inventor has investigated such a band-pass transformation for transforming structure into sets of ground resonators and has discovered that the filter transfer function of such a transformed structure is more stable since it is free from solitary parasitics as explained before.

However, the inventor has discovered that using such a bandpass transformation including gyrators as shown in Fig. 2c for the structure in Fig. 2a, the node P connecting the inductances L2 , L3 and L4 will result in a purely resistive node which again causes an undesirable behaviour of the filter because the filter transfer function realized in practice deviates from the theoretically designed filter transfer function.

The purely resistive node will be obtained if the bandpass transformation is applied to filter circuit inductances L2 , L4 , L3 realized by active filter circuitry using gyrator structures as can be seen from Fig. 4a, 4b. After bandpass transformation of Fig. 4b, there is the undesirable purely resistive node in the bandpass transformed gyrator circuit Fig. 2c.

However, even if gyrators are avoided and indeed the coils are not realized by gyrators, the inventor has found that there are undesirable solitary parasitics in the filter circuit in Fig. 2b, e.g. stray capacitances to ground and to other circuit components after the bandpass-transformation. Such solitary parasitics as a result of the bandpass transformation correspond to the problematic additional purely resistive nodes in case of the gyrator replacement of the coils. This is also true independent as to how the star- type impedance network is realised, i.e. only coils or only capacitors or coils and capacitors. This is also independent as to whether the capacitor C3 in Fig. 2a (or the corresponding elements in Fig. 2b, 2c, 3a, 3b, 4b) is present or whether a direct connection to ground is used.

Active filter circuits in which a stable frequency characteristic can be obtained for the change of parasitic capacitance and a Q value can be adjusted by a mutual conductance amplifier in a one stage constitution is for example known from patent abstracts of Japan JP 08196642. Here, the stable frequency characteristic is obtained by means of additional tuning circuitry.

Furthermore, US 5,192,884 describes an active filter having a differential-type voltage controlled source. The aforementioned documents do not disclose that any kind of transformations causes additional purely resistive nodes.

Summary of the invention

As explained above, when using conventional network theory techniques like a band-pass transformation for the design of analog filters in order to avoid parasitic effects, it was discovered by the inventor that solitary parasitics (in the non-gyrator type bandpass transformed filter as shown in Fig. 2b) or an additional resistive node (in the gyrator type bandpass transformed filter as shown in Fig. 2c) are caused in the filter transfer function. Therefore, the object of the present invention is to provide an analog filter having one or more filter stages as explained above in which no solitary parasitics or additional purely resistive nodes are caused in the filter transfer function.

Solution of the object

This object is solved by an analog filter including at least one filter stage having an input terminal, an output terminal and an impedance network connected between said input and output terminals and ground, said impedance network having arranged three impedance elements in a Delta-configuration, such that a first node of the Delta-configuration is connected to the input terminal, a second node of the Delta- configuration is connected to the output terminal and the third node is connected to ground.

Preferably, a further network is inserted between said third node and ground.

Preferably, said impedance network comprises three inductors or three capacitors or a mixture of inductors/capacitors in a delta-configuration .

Preferably, said further network comprises a capacitor or an inductor or a parallel or serial capacitor-inductor network.

The analog filter according to the invention has no additional purely resistive nodes, since the delta configuration of the three impedance elements ensures that all inductor terminals can be connected to capacitors. Therefore, no undesired poles/zeros are caused in the filter transfer function. Inductances of the impedance network can be realized by coils or pairs of gyrators.

Hereinafter, embodiments of the invention will be described with reference to the attached drawings. However, it should be understood that the present invention is not limited to the disclosed embodiments and various modifications and variations can be performed. In particular, the invention comprises embodiments which result from combinations of features which are separately claimed in the claims and/or separately disclosed in the specification.

Brief description of the drawings

Fig. 1 shows basic construction of an analog filter IF having a plurality of filter stages FSTi;

Fig. 2a shows a typical conventional low-pass prototype filter having a single filter stage FSTI;

Fig. 2b shows a typical conventional bandpass prototype transformation of Fig. 2a;

Fig. 2c shows a typical gyrator realisation of the circuit in Fig. 2b;

Fig. 3a, 3b shows the construction of a multiple stage filter where each filter stage has the basic construction as shown in Fig. 2a;

Fig. 4a, 4b shows the construction of a conventional analog filter using gyrators to replace the coils in Fig. 2a; Fig. 5 shows a basic construction of the filter circuit according to the invention;

Fig. 6 shows an embodiment of the analog filter according to Fig. 5;

Fig. 7a, 7b shows circuits including a delta-configuration for a multiple stage filter; and

Fig. 8a, 8b shows an active filter where the inductances in Fig. 6 are replaced by gyrators.

Description of the invention

Fig. 5 shows a principle block diagram of the analog filter according to the invention where only one filter stage FSTi is used. However, the following explanations will be equally true if the invention is applied to each filter stage of a multiple-stage filter circuit.

The analog filter has an input terminal INi, an output terminal OUTi, and an impedance network INET connected to ground GND and to the input INi and the output OUTi . As explained above, optionally there can be a further network CNET (shown in dashed lines) which can be inserted between the impedance network INET and ground GND, i.e. in this case there is no straight wire to ground between INET and GND. The further network CNET can be a capacitive network and the impedance network INET can be a purely inductive network. However, most importantly, independent as to whether the INET network is formed by inductances and/or capacitors, the important issue is that one starts off with a star-type interconnection of impedances. Furthermore, a first capacitor Cl can be connected between the input terminal INi and ground GND and a second capacitor

C5 can be connected between the output terminal OUTi and ground GND. The resistors Rl and R5 serve as the source and termination impedances. All components Cl, C5, Rl , R2 are optional elements as far as the inventive principle is concerned.

Assuming as an example that the low-pass prototype filter circuit of Fig. 5 has an impedance network INET formed of an inductive network including a star-type connection of inductances L2 , L3 , L4 and there is a further network CNET formed by a capacitive network, i.e. a capacitor C3 , according to the invention - instead of using a band-pass transformation - a star-delta-transformation is used resulting in the structure of the impedance (inductive) network INET' shown in Fig. 6. The star-delta transformation according to the invention can be applied to any star-type impedance network INET, i.e. the impedances LI, L2 , L3 themselves may be constituted by impedance networks comprising parallel and/or serial connections of inductors and/or capacitors.

Again, it should be observed that the capacitor shown in dashed lines in Fig. 6 is only optional and that the invention is generally applicable if the capacitor is replaced by a direct connection to ground.

Furthermore, in the general case where the INET network consists of a star-connection of general impedances (i.e. only inductances and/or capacitors) , of course also the impedances of the delta-configuration La, Lb, Lc are general impedances, i.e. inductances and/or capacitances. That is, all impedances

Ll, L2 , L3 of the original network INET can be impedance networks themselves and thus also the impedances La, Lb, Lc of the transformed impedance network INET' can generally be impedance networks.

The star-delta transformation is usually used in power engineering for example to transform a star-type connection of stator coils into a delta-type configuration of stator coils in an electric motor as is well known for persons skilled in the art. As shown in Fig. 6, the star-delta transformation leads to a configuration where the three inductor or in the general case impedance elements La, Lb, Lc are arranged in a delta-configuration such that a first node Nli of the delta-configuration is connected to the input terminal INi, a second node N2i of the delta-configuration is connected to the output terminal OUTi and the third node N3i is connected to the capacitive network CNET which can again be formed by a capacitor C3 as in Fig. 2a or directly to ground (if the capacitor C3 is missing) .

As explained before, the first node Nli is connected to the capacitor Cl, the second node N2i is connected to the capacitor C5 and the third node N3i is connected to a capacitor C3 or a capacitive network CNET or directly to ground depending on the type of filter circuit.

Due to the star-delta transformation the following values for the impedances (e.g. inductances) La, Lb, Lc are obtained:

La = L2 + L3 + L2*L3 (la)

L4 Lb = L2 + L4 + L2*L4 (lb)

L3

Lc = L3 + L4 + L3*L4 (lc)

L2

As mentioned above, if the impedances Ll, L2 , L3 are all inductances then of course also the transformed impedances will be inductances. If they are capacitances, then La, Lb, Lc will be capacitances, and if they are a mixture of coils and/or capacitors, then the impedances La, Lb, Lc will also be a mixture of coils and/or capacitors.

Therefore, the invention is not specifically restricted to any special kind of impedance network INET, INET' (as long as INET is a star-configuration and INET' is a delta- configuration) and also the further network is optional. In any case, the star-delta transformation according to the invention removes the parasitic nodes (for gyrator configurations) and the solitary parasitics (in case of inductances not realized by gyrators) and thus eliminates the instability problem of the filter transfer function.

Only the filter coefficient spread and size will increase with this transformation since the values of the impedances La, Lb, Lc obviously increase due to the transformation as shown in the equation (1) .

The star-delta transformation can also be applied to a multistage analog filter shown in Fig. 7a or 7b. Comparing Fig. 7 with Fig. 3, all star-type connections in Fig. 3a, 3b have been replaced by delta-configurations of coils. Therefore also in the multi-stage filter the advantages of the present invention are prevalent. If each inductor element for example in the filter circuit of

Fig. 6 are replaced by active components like gyrators, also an active filter as shown in Fig. 8a, 8b can benefit from the star-delta transformation according to the invention.

Therefore, also gyrator-C or gm-C active filters where solitary parasitic nodes are removed by the star-delta transformations on the prototype filters can be constructed.

Industrial applicability

The present invention can be applied to any type of analog filter having star-type connections of coils and/or capacitors and is not limited to active filters where the impedance network is realized by inductors and where inductors are replaced by gyrators. Any type of filter circuit with a star-type impedance network INET with/without a further network CNET can benefit from the star-delta transformation according to the invention.

Furthermore, the invention can be embodied differently as described herein and the invention can be practiced with many other variations and modifications as they appear to the person skilled in the art on the basis of the above description and the claims. In particular, the invention can comprise features which have been described separately in the description and the claims.

Reference numerals in the claims only serve clarification purposes and do not limit the scope of the attached claims.

Claims

1. An analog filter (IF) including at least one filter stage (FSTi) having an input terminal (INi), an output terminal (OUTi) and an impedance network (INET') connected between said input and output terminals (INi, OUTi) and ground (GND), characterized by said impedance network (INET') having arranged three impedance elements (La, Lb, Lc , G2 , G3 , G4) in a Delta- configuration, such that a first node (Nli) of the Delta-configuration is connected to the input terminal (INi) , a second node (N2i) of the Delta-configuration is connected to the output terminal (OUTi) and the third node (N3i) is connected to ground (GND) .

2. An analog filter (IF) according to claim 1, characterized in that a further network (CNET) is inserted between said third node (N3i) and ground (GND) .

3. An analog filter (IF) according to claim 1, characterized in that said impedance network (INET') comprises three inductors (La, Lb, Lc) or three capacitors or a mixture of inductors/capacitors in a delta-configuration.

4. An analog filter (IF) according to claim 3 or 2 , characterized in that said further network (CNET) comprises a capacitor or an inductor or a parallel or serial capacitor-inductor network .

5. An analog filter (IF) according to claim 1, characterized by one filter stage (FSTi) and an input capacitor (Cl) connected between said input terminal (INI) and ground (GND) and an output capacitor (C5) connected between said output terminal (OUTI) and ground (GND) .

6. An analog filter (IF) according to claim 3, characterized in that said inductor elements are coils (L2, L4 , L3 ) .

7. An analog filter (IF) according to claim 3 or 6 , characterized in that said inductor elements are respectively formed by a pair of gyrators (Gl, G2 , G3 ) .

8. An analog filter (IF) according to claim 4, characterized in that said capacitive network (CNET) comprises at least one capacitor (C3 ) .

9. An analog filter (IF) according to claim 1, characterized in that said analog filter is a gyrator-C or a gm-C filter.

10. An analog filter (IF) according to claim 1, characterized in that said analog filter is a bandpass, a low-pass, a highpass, a band-stop, an all-pass filter or a combination of said filters.