WO2000074449A1 - Carte mere comportant une carte de circuits montee sur cette derniere - Google Patents

Carte mere comportant une carte de circuits montee sur cette derniere Download PDF

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Publication number
WO2000074449A1
WO2000074449A1 PCT/DE2000/001345 DE0001345W WO0074449A1 WO 2000074449 A1 WO2000074449 A1 WO 2000074449A1 DE 0001345 W DE0001345 W DE 0001345W WO 0074449 A1 WO0074449 A1 WO 0074449A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit board
base plate
printed circuit
layer
insulation layer
Prior art date
Application number
PCT/DE2000/001345
Other languages
German (de)
English (en)
Inventor
Karl Smirra
Frank Franzen
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Publication of WO2000074449A1 publication Critical patent/WO2000074449A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0315—Oxidising metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits

Definitions

  • the invention relates to a method for short-circuit-proof attachment of a printed circuit board to a base plate and an arrangement of base plate and printed circuit board mounted thereon.
  • circuits consisting of a printed circuit board with electrical components mounted thereon and electrically contacted by the printed circuit board are used.
  • the wiring of the circuit is usually realized by the circuit board.
  • the circuit board typically consists of one
  • Layer system which comprises one or more interconnect layers and one or more insulation layers electrically separating the interconnect layers.
  • circuit boards are mostly produced as prefabricated individual elements, bestuckt below with the electrical components and then applied to the base plate up ⁇ .
  • the circuit board can also be populated after it has been attached to the base plate.
  • the bottom layer layer of the printed circuit board facing the base plate always consists of an insulation layer in order to rule out the possibility of a short circuit m in the lowest interconnect level can, provided the circuit board is attached to a metallic base plate.
  • US Pat. No. 4,495,378 describes a circuit board structure specially designed for high heat dissipation, which consists of a metal or carbon core on which a copper or silver layer is attached. An aluminum layer is provided on top. The aluminum layer is provided with an electrically insulating, anodized surface layer on which the conductor tracks of the circuit board run.
  • German patent application DE 40 30 532 AI describes a multi-layer circuit constructed in hybrid technology.
  • Several flexible glass ceramic foils with printed circuit structures are placed on top of one another on a metal base body and are fired in a sintering process to form a glass ceramic body.
  • the bottom glass ceramic layer connects to the metal body.
  • an electronic control module which comprises a circuit board body which is glued to a base plate of the housing via an adhesive film.
  • control device which contains a circuit board which is carried by a floor of the housing.
  • An electrically insulating filler is provided between the housing floor and the printed circuit board.
  • the invention has for its object to provide an inexpensive method for attaching a prefabricated circuit board on a base plate. Furthermore, the invention aims to provide an arrangement of base plate and printed circuit board mounted thereon which can be produced cost-effectively. When using a metallic base plate in particular good heat dissipation from the circuit board to the base plate can also be achieved.
  • a lowermost layer of insulation layer on the printed circuit board is omitted, i.e. the circuit board is manufactured without an insulation layer on the bottom. This leads to significant cost savings in the manufacture of the circuit board due to material savings and lower manufacturing costs.
  • inexpensive printed circuit boards can therefore be used.
  • the base plate is made of an electrically conductive material, the short-circuit protection when the printed circuit board is applied to the base plate is made possible by the electrically insulating material previously produced on the surface of the base plate
  • An electrically non-conductive adhesive is preferably used to fix the circuit board to the base plate.
  • the plate with the circuit board to a flexible circuit ⁇ wherein the insulation layer (s) consist of a plastic film.
  • Flexible printed circuit boards are preferably used as connection and assembly elements for compact, lightweight and m predetermined housing shapes, adaptable electrical circuits. They can be implemented as one-sided flexible printed circuit boards (ie only one side of an insulation layer layer serving as a base plastic film), as two-sided flexible printed circuit boards (ie printed circuit layers are realized on both sides of an insulation layer layer serving as a base plastic film) and as multilayer systems. Electrical through-contacts between the individual conductor track layers can be provided at suitable points on the circuit board.
  • a further preferred embodiment of the invention is characterized in that the printed circuit board is a printed circuit board with an insulation layer layer (s) consisting of a glass fiber reinforced plastic plate.
  • Printed circuit boards constructed in this way are also known in the art as FR4 printed circuit boards. Single-sided or double-sided printed circuit boards as well as multilayer systems can be used.
  • a third preferred variant of the invention is characterized in that the printed circuit board is a printed circuit board with an insulating layer layer (s) consisting of a ceramic material.
  • Such circuit boards are generally referred to as ceramic substrates.
  • Various forms of implementation are known, such as HTCC (high temperature cofired ceramics), LTCC (low temperature cofired ceramics) and DCB substrates and are suitable for the invention. Cost advantages are in turn achieved through material savings and simplified production of the ceramic substrates.
  • a first preferred possibility is to use an electrically insulating layer on the base plate surface
  • the choice of coating method depends both on the material of the base plate to be coated and on the requirements (e.g. with regard to mechanical and chemical resistance) which the circuit board, which is preferably glued to the base plate, must meet.
  • the electrically insulating layer can advantageously be produced by etching.
  • etching When enamelling, a glass-like coating is formed on the top of the base plate, which due to its good chemical resistance and high hardness is well suited for safe electrical insulation.
  • a fundamentally different procedure which is also preferred within the scope of the invention, consists of the electrically insulating layer on the base plate top side by means of a to generate structural transformation of the base plate surface.
  • chemical conversion processes are particularly suitable because they can be largely automated and can be carried out very inexpensively.
  • the insulating layer is preferably produced by anodizing (electrolytic oxidizing). This process is particularly suitable for a base plate made of aluminum.
  • a metal oxide layer Al 2 Oj
  • Al 2 Oj is produced on the surface of the aluminum base plate which, in contrast to the A1_0, -Pass ⁇ v ⁇ réellessch ⁇ cht already created by natural oxidation processes, has a sufficiently large thickness to ensure reliable electrical insulation. Due to the high hardness of the anodized layer, the risk of damage to the same is relatively low, for example due to the introduction of scratches during the manufacturing process.
  • the electrically insulating layers produced by anodizing, chromating and phosphating offer a good primer for additional paint or enamel coatings that can be applied.
  • the arrangement according to the invention has, in addition to the advantageous properties and manufacturing advantages already mentioned, the further advantage that it is generally thinner than a comparable conventional arrangement, since even if an electrically insulating layer has to be applied to a metallic base plate, the latter can regularly be made thinner than the insulation layer layer saved on the printed circuit board.
  • Figure 1 is a schematic sectional view of a metallic base plate with a flexible printed circuit board mounted thereon according to the prior art.
  • FIG. 2 shows a schematic sectional illustration of a metallic base plate with a flexible printed circuit board attached thereon according to a first exemplary embodiment of the invention
  • Fig. 3 is a schematic, partially cut perspec ⁇ tivansicht a metallic base plate with thereon anbritter ceramic circuit board according to a second exemplary embodiment of the invention.
  • FIG. 4 shows a schematic sectional illustration through the arrangement shown in FIG. 3 along the line I-I in FIG. 3.
  • the flexible circuit board 2 comprises a base foil 3, a cover foil 4 and in between a conductor track layer 5.
  • the conductor track layer 5 comprises individual conductor tracks 6, usually made of Cu, which are embedded in an optional filling compound 7 made of adhesive.
  • FIG. 2 shows a schematic sectional illustration of a metallic base plate 1 with a flexible printed circuit board 20 attached thereon according to a first exemplary embodiment of the invention.
  • the same parts as m Fig. 1 are identified by the same reference numerals.
  • the flexible circuit board 20 shown in FIG. 2 corresponds to the conventional circuit board 2.
  • the essential difference is that there is no bottom-side
  • Insulation layer (m Fig. 1, the base film 3) is present.
  • the printed circuit board 20 can be applied directly to the surface of the base plate.
  • a thin metal foil for example Cu foil, is first rolled or electrolytically deposited on the cover foil 4 (here with the adhesive 7 located thereon) which realizes the base material. Rolling or deposition takes place in a roll-to-roll process.
  • the conductor track image (i.e. the individual conductor tracks 6) is then formed using photolithographic and etching techniques.
  • a conven- tional circuit board 2 will now for the preparation of the surface-side exposed Lei ⁇ terbahnen 6 with a further, optionally provided with an adhesive layer insulation film layer covered. This process does not apply to the printed circuit board 20 shown in FIG. 2.
  • circuit board 20 has a plurality of conductor track levels 5, these can be electrically or selectively connected to one another by forming suitable plated-through holes.
  • the exposed conductor tracks 6 of the circuit board 20 can still be protected against tarnishing by applying an organic material that evaporates at low temperatures to the conductor tracks 6.
  • the tarnish protection does not provide sufficient electrical insulation of the conductor tracks 6, which would make it possible to bring the circuit board 20 directly into contact with an electrically conductive surface.
  • the electrically insulating layer 8 is applied to the surface of the base plate 1.
  • a possible process sequence for this - namely the anodizing of an Al base plate 1 - is described below.
  • the AI -Grundplatte 1 is surface-side acidic with dilute sodium hydroxide or mixtures of nitric acid m, river ⁇ or chromic acid pickled and then compared with egg ner insoluble electrode an acidic electrolyte Siert anodic m.
  • an as is "hard anodising” used denote ⁇ tes cocurrent process, the working temperatures at reduced Tem ⁇ (about 0 ° C) and particularly hard and scratch generated ⁇ solid oxide layers also have good thermal conductivity also.
  • the hardness and abrasion resistance of the oxide layer produced is increased by compacting the layer in hot water, steam or in salt solutions. This process increases the dielectric strength of the layer.
  • the attachment of the printed circuit board 20 to the base plate 1 is described below:
  • an electrically non-conductive adhesive based on epoxy, acrylic or phenol is applied either to the anodized surface layer 8 of the base plate 1 or to the underside of the printed circuit board 20 (i.e. also to the exposed conductor tracks 6).
  • the adhesive can be identical with the adhesive filling compound 7 that was used to build up the conductor track layer 5 of the printed circuit board 20.
  • the two components (base plate 1 and printed circuit board 20) are glued together.
  • the electrically non-conductive adhesive provided between the conductor tracks 6 and the base plate 1 - provided that there was no insulating surface layer 8 - could not guarantee short-circuit protection sufficient in practice.
  • the insulating layer 8 produced on the metallic base plate 1 is therefore imperative in order to achieve effective, safe and long-term electrical insulation of the conductor tracks 6 from the base plate metal.
  • FIG. 3 shows a perspective view of a second exemplary embodiment of the invention, which differs from the first exemplary embodiment essentially only in the use of a different type of printed circuit board.
  • the same parts are also designated with the same reference numerals here.
  • the printed circuit board is designed in the form of a multilayer ceramic substrate 200, which is constructed from alternately arranged ceramic layer layers 204 and conductor track layers 205.
  • Base side of the ceramic substrate 200 is a printed circuit ⁇ web layer 205 consisting of exposed individual conductors ⁇ tracks provided 206th
  • the top of the ceramic substrate 200 can be realized by a ceramic layer layer 204 with conductor tracks 206 running thereon.
  • the conductor tracks 206 running on the upper side of the ceramic substrate 200 contact electrical components, such as ICs 209 or thin film resistors 210, which are glued to the ceramic substrate 200.
  • the individual conductor tracks 206 of different conductor track layers 205 are selectively in electrical contact with one another via electrical bushings 207.
  • Fig. 4 illustrates the structure of circuit board 200 and
  • Base plate 1 based on a sectional view along the Li
  • the ceramic substrate 200 is produced from a ceramic raw material (green tape), which is rolled off a roll and cut into m matching pieces with the same contours.
  • the holes for the vias 207 are then punched out and filled with a metallic paste.
  • the conductor pattern is then applied to the individual ceramic raw material pieces by screen printing or a photolithography process.
  • the individual pieces are stacked on top of one another in the correct order and in a last step of the printed circuit board production, the multilayer stack is sintered, i.e. pressed to a ceramic solid at high temperatures.
  • co-fire technology can be used to produce HTCC or LTCC circuit boards according to the sintering temperature.
  • the plated-through ceramic raw material pieces can first be fired individually, subsequently are provided with the conductor tracks 206, are stacked and later fired or sintered again.
  • Printed circuit boards manufactured using this technology are referred to as FC (fired ceramics) printed circuit boards and can also be used.
  • DCB substrate Another type of ceramic circuit board that can be used within the scope of the invention is known in the art as a DCB substrate or also thermal clad.
  • the exemplary embodiments described have in common that the coating and surface conversion processes for producing the insulating layer 8 can be combined with one another and that, in addition to or instead of the processes already mentioned, powder coating processes, roll coating processes and hot dip processes can be used.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Laminated Bodies (AREA)

Abstract

L'invention concerne un procédé pour monter une carte de circuits (20) sur une carte mère (1), ledit procédé faisant appel à une carte de circuits (20) constituée de couches de tracés conducteurs (5) et de couches isolantes (4). Cette carte de circuits (20) ne présente, côté base, aucune couche isolante (4). Si la carte mère (1) est électroconductrice, une couche électro-isolante (8) est produite sur la surface, orientée vers la carte de circuits (20), de la carte mère (1). La carte de circuits (20) est ensuite fixée sur la carte mère (1).
PCT/DE2000/001345 1999-05-26 2000-04-28 Carte mere comportant une carte de circuits montee sur cette derniere WO2000074449A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE1999124080 DE19924080A1 (de) 1999-05-26 1999-05-26 Grundplatte mit darauf angebrachter Leiterplatte
DE19924080.9 1999-05-26

Publications (1)

Publication Number Publication Date
WO2000074449A1 true WO2000074449A1 (fr) 2000-12-07

Family

ID=7909213

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2000/001345 WO2000074449A1 (fr) 1999-05-26 2000-04-28 Carte mere comportant une carte de circuits montee sur cette derniere

Country Status (2)

Country Link
DE (1) DE19924080A1 (fr)
WO (1) WO2000074449A1 (fr)

Cited By (1)

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WO2008068118A1 (fr) * 2006-12-04 2008-06-12 Continental Automotive Gmbh Procédé de fixation d'une carte de circuit imprimé sur une plaque de fond et disposition contre les courts-circuits d'une carte de circuit imprimé sur une plaque de fond électriquement conductrice

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DE10130789A1 (de) * 2001-06-26 2003-01-23 Hella Kg Hueck & Co Schaltungsanordnung
DE10132150A1 (de) * 2001-07-03 2003-01-16 Krauss Maffei Wegmann Gmbh & C Verfahren zum Befestigen von elektrischen, elektromechanischen und elektronischen Bauteilen und Baugruppen auf einem Träger sowie nach dem Verfahren hergestellte Einrichtung und elektrisches Gerät

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US3259805A (en) * 1963-02-06 1966-07-05 Westinghouse Electric Corp Metallic based printed circuits
GB1594834A (en) * 1978-05-08 1981-08-05 Plessey Co Ltd Method of bonding a heat sink to a printed circuit board
GB2074152A (en) * 1980-03-08 1981-10-28 Int Ceramics Ltd Coating method
WO1984004441A1 (fr) * 1983-04-26 1984-11-08 Ibiden Co Ltd Substrat de cablage imprime
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DE8623251U1 (fr) * 1986-08-29 1987-12-23 Robert Bosch Gmbh, 7000 Stuttgart, De
EP0282625A2 (fr) * 1987-03-19 1988-09-21 Furukawa Denki Kogyo Kabushiki Kaisha Procédé de fabrication d'un circuit imprimé multicouche de type rigide
US4959116A (en) * 1988-03-24 1990-09-25 Alps Electric Co., Ltd. Production of metal base laminate plate including applying an insulator film by powder coating

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DE3936906C2 (de) * 1989-11-06 1995-02-02 Telefunken Microelectron Gehäuse für Kfz-Elektronik
DE4118308C2 (de) * 1991-06-04 1994-12-22 Siemens Ag Schaltungsträger für SMD-Bauelemente
DE19505180A1 (de) * 1995-02-16 1996-08-22 Telefunken Microelectron Elektronisches Steuermodul
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DE19654353A1 (de) * 1996-12-24 1998-06-25 Bosch Gmbh Robert Montageanordnung eines Halbleiterbauelements auf einer Leiterplatte

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Publication number Priority date Publication date Assignee Title
US3259805A (en) * 1963-02-06 1966-07-05 Westinghouse Electric Corp Metallic based printed circuits
GB1594834A (en) * 1978-05-08 1981-08-05 Plessey Co Ltd Method of bonding a heat sink to a printed circuit board
GB2074152A (en) * 1980-03-08 1981-10-28 Int Ceramics Ltd Coating method
WO1984004441A1 (fr) * 1983-04-26 1984-11-08 Ibiden Co Ltd Substrat de cablage imprime
JPS62128592A (ja) * 1985-11-29 1987-06-10 日立コンデンサ株式会社 ほうろう配線板
DE8623251U1 (fr) * 1986-08-29 1987-12-23 Robert Bosch Gmbh, 7000 Stuttgart, De
EP0282625A2 (fr) * 1987-03-19 1988-09-21 Furukawa Denki Kogyo Kabushiki Kaisha Procédé de fabrication d'un circuit imprimé multicouche de type rigide
US4959116A (en) * 1988-03-24 1990-09-25 Alps Electric Co., Ltd. Production of metal base laminate plate including applying an insulator film by powder coating

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Title
"Double-layer circuit board on anodized aluminum", IBM TECHNICAL DISCLOSURE BULLETIN., vol. 28, no. 4, September 1985 (1985-09-01), IBM CORP. NEW YORK., US, pages 1566, XP002144955, ISSN: 0018-8689 *
DATABASE WPI Week 8446, Derwent World Patents Index; AN 1984-288321, XP002144956 *
DATABASE WPI Week 8729, Derwent World Patents Index; AN 1987-201661, XP002144957 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008068118A1 (fr) * 2006-12-04 2008-06-12 Continental Automotive Gmbh Procédé de fixation d'une carte de circuit imprimé sur une plaque de fond et disposition contre les courts-circuits d'une carte de circuit imprimé sur une plaque de fond électriquement conductrice

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