WO2000070121A1 - UTILIZATION OF SiH4, SOAK AND PURGE IN DEPOSITION PROCESSES - Google Patents

UTILIZATION OF SiH4, SOAK AND PURGE IN DEPOSITION PROCESSES Download PDF

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Publication number
WO2000070121A1
WO2000070121A1 PCT/US2000/013785 US0013785W WO0070121A1 WO 2000070121 A1 WO2000070121 A1 WO 2000070121A1 US 0013785 W US0013785 W US 0013785W WO 0070121 A1 WO0070121 A1 WO 0070121A1
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WIPO (PCT)
Prior art keywords
chamber
nitrogen
substrate
dichlorosilane
combination
Prior art date
Application number
PCT/US2000/013785
Other languages
French (fr)
Inventor
Karl Littau
Jennifer M. Tseng
Mei Chang
Ramanujapuram A. Srinivas
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Applied Materials, Inc.
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Publication date
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Priority to JP2000618524A priority Critical patent/JP2002544394A/en
Priority to EP00936088A priority patent/EP1185723A1/en
Publication of WO2000070121A1 publication Critical patent/WO2000070121A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/42Silicides
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56After-treatment

Definitions

  • the present invention relates to an improved chemical vapor deposition process, such as a process for the deposition of tungsten si cide (WS.J from tungsten hexafluo ⁇ de (WF 6 ) and dichlorosilane (DCS)
  • Tungsten sihcide (WSi.) thin films have been deposited by low pressure chemical vapor deposition (LPCVD) onto semiconductor substrates using silane (S ⁇ H 4 ) and tungsten hexafluo ⁇ de (WF 6 ) as the precursor gases.
  • LPCVD low pressure chemical vapor deposition
  • the WSi- thin film is deposited onto a semiconductor wafer having a layer of silicon oxide beneath a polysihcon layer
  • the deposited coating is not as conformal over stepped topographies as is desired
  • films so deposited have a high residual fluorine content that adversely affects device performance
  • elevated temperatures e g , about 850 " C or higher, as du ⁇ ng annealing
  • the excess fluoride ions migrate through the underlying polysihcon layer and into the underlying silicon oxide layer
  • the effective thickness of the silicon oxide layer thus appears to increase This effective thickness increase in turn leads to an adverse change in elect ⁇ cal properties of semiconductor devices including such layers
  • the substrate to be coated w ith tungsten sihcide first is cleaned using a fluorine plasma scrub to remov e native oxide from the polvsihcon layer
  • the cleaned substrate is then transferred into a substrate transfer chamber
  • This transfer chamber has a nitrogen or argon atmospnere (subatmosphe ⁇ c) to prevent re-oxidation of the substrate, and contains a robot to transfer the substrate into a processing chamber, e g , a tungsten deposition chamber, through a slit v alve having an O- ⁇ ng seal
  • This CVD process has become the standard for depositing tungsten sihcide from S ⁇ H 4 and WF 6
  • the above problems of step coverage and residual fluorine using this deposition process have become c ⁇ tical limitations for
  • the DCS process desc ⁇ bed above typically includes a purge step employing DCS as the purge gas It has been found, however, that depositing WSi.
  • a substrate such as a semiconductor wafer
  • a substrate is processed in a chamber of a vacuum processing apparatus by depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases remaining from the depositing step by flowing SiH 4 into the chamber in combination with nitrogen or one or more noble gases.
  • WSi x is deposited on a surface of a semiconductor wafer using a mixture comprising WF 6 and dichlorosilane, and the chamber is subsequently purged of residual WF 6 and dichlorosilane by flowing SiH 4 into the chamber, in combination with nitrogen or with nitrogen and one or more noble gases.
  • the use of nitrogen to purge WSi. is discovered to not impair film properties in the absence of oxygen or water vapor.
  • an optional DCS partial purge is carried out after WSi. deposition and prior to the SiH 4 purge.
  • SiH 4 in combination with nitrogen or one or more noble gases, is employed to condition a vacuum processing chamber prior to a deposition process.
  • the SiH 4 conditioning step can be employed independently of, or in combination with, the foregoing SiH 4 purge step as part of a method for processing substrates in a vacuum deposition chamber.
  • semiconductor wafers processed according to the foregoing processes are also provided.
  • the wafers so produced are characterized by reduced variation in sheet resistance, and are further characterized by reduced film stress as deposited.
  • a vacuum processing apparatus comprising a chamber, means for depositing a material, such as Wsi , on a surface of a substrate disposed within the chamber, and means for purging the chamber with SiH 4 , in combination with nitrogen or one or more noble gases.
  • Preferred means for depositing the material on the substrate surface include a source of at least one reactive gas and means for introducing the reactive gas into the chamber.
  • the apparatus preferably includes sources of VvT b and DCS. and means for combining the gases to form a reactive gas mixture.
  • Means for purging the chamber with SiH preferably include a source of SiH 4 , a source of dry nitrogen, a source of a noble gas, and means for introducing the SiH 4 , nitrogen, and optionally a noble gas into the chamber.
  • Figure 1 is a schematic cross-sectional view of an exemplary vacuum processing apparatus, more specifically a tungsten deposition chamber, which is useful in practicing a method of the present invention
  • Figure 2 is a detailed schematic diagram of a preferred gas mixing assembly generally indicated in Figure 1 ;
  • Figure 3 is a graph of film stress measured during annealing as a function of temperature for a comparison WSi. film deposited on a semiconductor wafer according to a conventional DCS process, with values measured during heating of the film indicated by rectangles, and values measured during cooling of the film indicated by triangles;
  • Figure 4 is a corresponding graph of stress as a function of temperature for an exemplary WSi. film deposited on a semiconductor wafer according to a method of the 00/70121 -- PCTtUSOO/13785
  • Figure 5 is a flowchart illustrating an exemplary method for processing a semiconductor wafer according to the invention.
  • Figures 6A-D are graphs showing the vanation of sheet resistance (0) and uniformity (o) for semiconductor wafers processed according to the methods desc ⁇ bed for Figures 3 and 4, wherein Figures 6A-B show the variations observed after production of 25 wafers for the conventional and inventive processes, respectively, and Figures 6C-D show the va ⁇ ations observed after production of 500 wafers for the conventional and inventive processes, respectively.
  • the present invention uses silane, or more precisely monosilane (SiH 4 ), in combination with nitrogen or a noble gas, to purge a tungsten deposition chamber after depositing WSi. on semiconductor wafers using WF 6 and DCS.
  • the process of the invention substantially reduces the short and long-term downward drift in sheet resistance of the semiconductor wafers so processed.
  • Methods according to the invention can, 'if desired, be carried out employing conventional chemical vapor deposition (CVD) systems used to practice the known DCS processes, without the need for modifications to the vacuum deposition chamber.
  • CVD chemical vapor deposition
  • a method of the invention can be earned out using the apparatus provided by Applied Materials, Inc. as described by Chang et al. in U.S. Patent Application Serial No. 08/136,529.
  • a CVD system 10 compnses deposition chamber 12, vacuum exhaust system 14, gas combining assembly generally indicated at 16, diffuser 18 wafer lift 20, baffle plate 22, lift fingers 24 and susceptor lift 26
  • a substrate 28, such as a silicon wafer having a layer of polysihcon thereon, is disposed on a support or susceptor 30
  • Heating means 32 maintains a uniform temperature dunng processing of the susceptor 30 and the substrate 28 mounted thereon
  • the deposition or reaction zone 34 lies above the substrate
  • heating means 32 is an external array of 1000 watt lamps directing colhmated light through quartz window 36 Other known heating means can also be employed A particularly useful heating means 32 compnses resistive heating means rather than lamps When resistive heating means are employed, quartz window 36 can be omitted Thus, use of resistive heating means obviates the need for pe ⁇ odic cleaning and/or replacement of the quartz window, with attendant maintenance and downtime expenses
  • a preferred vacuum processing apparatus including resistive heating means which can be employed in the practice of the present invention is desc ⁇ bed in U S Patent Application Se ⁇ al No 08/200,074, filed February 23, 1994 by Lei et al , which is incorporated herein b ⁇ reference
  • Gas combining assembly 16 can include a gas box or plenum and one or more valves for controlling the flow of the va ⁇ ous process gases, including purge gases, earner gases, reactive gases for deposition of WSi- or other matenals, and cleaning gases, such as NF 3 for pe ⁇ odic chamber cleaning processes
  • FIG. 1 illustrates an exemplary gas combining assembly 16 for use with the chamber of Figure 1
  • Feed lines 38 and 40 deliver process gases into plenum 42 and subsequently into chamber 12 v ia diffuser 18
  • Feed lines 38 and 40 are linked by mixing lines 44 and 46, which in rum are joined by divert line 48.
  • Valves 50 and 52 are disposed between mixing lines 44 and 46 on feed lines 38 and 40, respectively Inlet mixing valves 54 and 56 are disposed on mixing line 44 as shown, and outlet mixing valves 58 and 60 are correspondingly disposed on mixing line 46 Divert valve 62 is disposed on divert line 48
  • Sources of process gases are connected to feed lines 38 and 40
  • fluonne- contaimng gas sources are connected to one of the feed lines 38 and 40
  • silicon- contaimng gas sources are connected to the remaining feed line.
  • WF 6 source 64 and NF 3 cleaning gas source 66 are connected to feed line 38 via supply valves 68 and 70, respectively.
  • DCS source 72 and S ⁇ H 4 source 74 similarly are connected to feed line 40 via supply valves 76 and 78, respectively.
  • a non-reactive gas source 80 which preferably is a source of nitrogen, argon, or a mixture of nitrogen and argon, is connected to feed lines 38 via supply valve 82.
  • valves 50 and 52 are open; all other valves are closed.
  • the deposition process begins with the entry of process gases (i.e., reaction and carrier gases) into the deposition chamber 12 via gas combining assembly 16 and "showerhead" type diffuser 18.
  • a conventional process mixture includes DCS, WF 6 and argon.
  • Gas combining assembly 16 mixes the process gases upstream of diffuser 18, ensuring the gas mixture is of uniform composition before being supplied to the diffuser 18.
  • the diffuser 18 has numerous openings over an area corresponding to that of the substrate 28 beneath it. The spacing between the diffuser 18 and the substrate 28 can be adjusted to from about 200-1000 mils (5-25 mm) to define the reaction zone 34 The diffuser 18 feeds the combined process gases to the reaction zone 34.
  • the area of the chamber below the plane of the susceptor 30 is purged via bottom purge line 88 with a noble gas, preferably argon, to prevent reactive gases from extending into the area of the chamber 12 below the susceptor 30.
  • the base pressure in the chamber is about 10 milhtorr.
  • Exhaust system 14 is fitted with a throttle valve 86 hich can regulate the pressure of the chamber.
  • a non- reactive earner gas e g argon, nitrogen, or a mixture of argon and nitrogen
  • WF 6 and DCS are mixed in gas combining assembly 16
  • WT 6 is introduced from source 64 into gas combining assembly 16 through feed line 38 by opening supply valve 68
  • the WF 6 preferably is introduced into gas combining assembly 16 together with the non-reactive earner gas, which is delivered from source 80 by opening supply valve 82
  • Dichlorosilane from source 72 is introduced into gas combining assembly 16 through feed line 40 by opening supply valve 76
  • the noble earner gas preferred herein for reasons of economy is argon, but other noble gases can also be used.
  • nitrogen should not be used in the deposition process in accordance with the present process although nitrogen can be used for preconditioning or purging the deposition chamber
  • Mixing of the process gases is effected in the gas combining assembly 16 of Figure 2 by closing valves 50 and 52 and outlet mixing valves 58 and 60, and opemng inlet mixing valves- 4 and 56 and divert valve 62
  • the gases partially mix in mixing line 44, and initially flow through divert line 48 to exhaust system 14 until the flow is stabilized
  • divert valve 62 is closed and outlet mixing valves 58 and 60 are opened
  • the partially mixed gases return through mixing line 44 to feed lines 38 and 40, then enter plenum 42 where mixing is completed
  • the mixed process gases subsequently enter chamber 12 via diffuser 18
  • the tungsten sihcide deposition is generally earned out at from about 500-600 ' C, preferably at about 550 * C
  • the pressure during deposition can be from about 0 3-10 torr, but preferably is earned out at about 0 7-1 5 torr
  • the flowrates of process gases into chamber 12 are related to the volume of the chamber
  • a typical chamber volume is about 6 L.
  • a semiconductor wafer having a diameter of 6" (150 mm) can also be processed in a chamber of this volume
  • an appropnate flowrate of WF 6 is about 1-6 seem, preferably about 3 5 seem
  • Dichlorosilane is passed into chamber 12 at a flowrate of about 130-300 seem, preferably at about 175 seem
  • Argon is used as the earner gas and is passed into chamber 12 via line 38 at a flowrate of about 100- 1000 seem, preferably at 300-600 seem.
  • This argon flowrate is exclusive of the bottom purge flowrate, about 100-500 seem, preferably about 300 seem
  • the vanous flow ⁇ ates are adjusted so as to obtain a WSi, laver having a resisti itv of betw een 700 and 1400 u ⁇ -cm, preferably about 800 -.-cm
  • Deposition is most preferably earned out at 550 ° C and 1 ton- After the deposition process is completed, but before the S ⁇ H 4 purge step is initiated, it is preferred to carry out an optional partial purge step using DCS
  • the optional DCS purge step is earned out by simply closing supply valve 68 to stop the flow of WF 6 into the deposition chamber 12, while maintaining the previously established flow of DCS and argon into chamber 12
  • the optional DCS purge is earned out for 0 to about 5 seconds, preferably about 2-3 seconds
  • the DCS flowrate dunng this optional purge step is about 130 to 300 seem, preferably about 175 seem Preferred temperatures are as indicated for the deposition step
  • the optional DCS purge helps to remove any remaining WT 6 from gas combining assembly 16 This ensures that WF 6 does not come into contact with the subsequent flow of S ⁇ H 4 , in gas combining assembly 16
  • the S ⁇ H 4 , purge, or "cap” step is earned out
  • Supply valve 76 is closed, ending the flow of DCS from source 72 into chamber 12 If supply valve 68 was not previously closed to end the flow of WF 6 , it is closed at this time. All mixing valves 54, 56, 58 and 60 in Figure 2 are closed, and both valves 50 and 52 are opened.
  • Supply valve 78 is opened, allowing S ⁇ H 4 to flow from source 74
  • Supply valve 82 preferably remains open, continuing the flow of argon from source 80
  • argon can be replaced with nitrogen or mixed with mtrogen when combined with S ⁇ H 4 without changing the measured stress of the deposited film
  • Argon preferably also continues to flow into deposition chamber 12 through bottom purge line 88
  • S ⁇ H 4 from S ⁇ H 4 source 74 flows through feed line 40 and valve 52 into plenum 42 and thence into chamber 12.
  • Direct flow of the S ⁇ H 4 through valve 52 again helps to ensure that the S ⁇ H 4 does not come into contact with, and react with, any WF 6 which may remain in gas combining assembly 16
  • plenum 42 of the gas combining assembly 16 of Figure 2 be maintained at a temperature between about 10 ' C and 15 ' C, in order to prevent the S ⁇ H 4 from decomposing Prefe ⁇ ed cooling means include a water jacket (not shown) Other cooling means may also be employed.
  • the S ⁇ H 4 purge step is preferablv earned out for a time from about 10 to 30 seconds, more preferablv about 15 seconds
  • the total flowrate of S ⁇ H 4 into deposition chamber 12 is preferably about 100 to 500 seem, more preferably about 300 seem Dunng the S ⁇ H purge the total chamber pressure within deposition chamber 12 preferably is maintained at about 0 5 to 1 0 torr, more preferably about 0 7 torr
  • the temperature dunng the S ⁇ H 4 purge preferably is about 500-600°C, more preferably about 550 C Preferably the temperature is approximately the same as the temperature at which the deposition step is earned out
  • S ⁇ H 4 is removed from the deposition chamber 12
  • gas combining assembly 16 and feed lines 38 and 40 Valve 52 is closed, and mixing valve 56 and divert valve 62 are opened DCS, preferably combined with argon or nitrogen, is passed through feed line 40 and out divert line 48 to exhaust system 14 for about 5 to 10 seconds, preferably about 5 seconds, to purge residual S ⁇ H 4 DCS does not enter deposition chamber 12 dunng this step
  • deposition chamber 12 Next, argon or nitrogen flow, or a combination thereof, is maintained into deposition chamber 12 for about 5 to 1 seconds, preferably about 5 seconds, to remove residual S ⁇ H 4 from the chamber Finally, deposition chamber 12 and all reactive gas feed lines are pumped out to the base pressure of the pump employed (preferably about 5 to 15 milhto ⁇ )
  • base pressure of the pump employed preferably about 5 to 15 milhto ⁇
  • chamber 12 may be cleaned by conventional means, such as a plasma cleaning process employing a gas such as NF 3
  • the cleaning gas may be supplied to chamber
  • the cleaning gas may, if desired, be combined with a noble earner gas in the usual manner
  • S ⁇ H 4 can be introduced into a chamber of a vacuum processing apparatus pnor to deposition as well as subsequent to deposition
  • This initial chamber conditioning step, or "silane soak" step, pnor to the deposition step preferably is carried out by introducing SiH 4 into deposition chamber 12 via line 40.
  • Valve 52 is opened, and all other valves remain closed.
  • an argon bottom purge is earned out simultaneously with the SiH 4 step.
  • the argon flowrate preferably is about 100 to 500 seem, more preferably about 300 seem.
  • the SiH 4 soak step preferably is carried out after the semiconductor substrate 28 is introduced into deposition chamber 12.
  • SiH 4 is preferably introduced into deposition chamber 12 in combination with a non-reactive gas, such as nitrogen or a noble gas, or a combination of nitrogen and a noble gas, e.g. argon, used in carrying out the subsequent SiH 4 purge steps.
  • the SiH 4 soak step is preferably carried out for about 15 seconds to 1 minute, more preferably about 30 seconds.
  • the flowrate of SiH 4 into deposition chamber 12 preferably is about 100 to 500 seem, more preferably about 300 seem, assuming a chamber volume of about 6 L. Chamber pressure during the conditioning step is preferably about I to 10 ton, more preferably about 2 ton.
  • Conditioning times will depend on both the SiH 4 flowrate and the chamber pressure. Thus, 15 seconds is the prefe ⁇ ed minimum time for a SiH 4 flowrate of 500 seem at a chamber pressure of' 10 ton. About 30 seconds is sufficient for a flowrate of 300 seem at 2 torr.
  • the temperature during the conditioning step typically is the same employed for the deposition step, about 500-600 ' C, more preferably about 550 ' C. However, no minimum temperature is required for the conditioning step, since SiH 4 readily decomposes even at room temperature (250 ' C).
  • the conditioning step can be carried out in combination with, or independent of, the SiH 4 purge step.
  • two 8" semiconductor wafers were deposited with layers of WSi.
  • the first wafer was processed according to a conventional silane method without a silane cap
  • the second wafer was processed according to a DCS method with preceding S ⁇ H 4 soak and subsequent S ⁇ H 4 capping steps according to the present invention, as follows
  • the wafer was introduced into a 6 L vacuum deposition chamber, and S ⁇ H 4 (300 seem) was introduced into the chamber together with argon (300 seem) as the earner gas
  • the bottom of the chamber was simultaneously purged with argon (300 seem)
  • the S ⁇ H 4 soak step was earned out for 30 sec at 2 ton
  • the wafer was heated to 565 ° C in the chamber WF 6 (3 5 seem), DCS (175 seem) and argon (600 seem) were introduced into the chamber via a diffuser
  • the bottom of the chamber was purged with argon (300 seem)
  • Chamber pressure was 0 8 ton WSi. deposition was earned out for 110 seconds
  • Companson of Figures 3 and 4 shows the unexpected improvement in film stress achieved according to the present invention
  • the exemplary film produced according to the inventive process show s significantly lower stress than does a companson film formed according to the previously known DCS process over a range of temperatures including the range (about 500-600°C) in which the deposition process typically is earned out
  • WSi. films produced according to both the known and the inventive methods exhibit hysteresis in the stress measured dunng film annealing and subsequent cooling
  • the stress as determined dunng heating is lower than the stress determined dunng coolmg over the temperature range from about room temperature to about 600 ' C. Stress varied slightly between about 400 ' C and 600 ' C.
  • the stress as determined dunng heating becomes higher than that determined during cooling at about 200 ° C, and remains higher up to a temperature of about 675 ° C.
  • the exemplary film of Figure 4 also differs from the companson film of Figure 3 in that the film stress exhibits a negative value over a range of temperatures from about 400 ° C to about 500 ° C. That is, the exemplary film exhibits compression rather than tension over the foregoing temperature range, while the comparison film always exhibits tension.
  • the exemplary film exhibits a local maximum in stress at about 600 ' C, similarly to the comparison film. However, in the exemplary film, the measured stress at this temperature is much lower than the stress in the comparison film. Furthermore, both the rate of change in stress and the total reduction in stress shown by the comparison film during heating in the temperature range above about 600 ' C are much greater than those shown by the exemplary film. That is, the exemplary film shows a much smoother transition in stress in this tempe.r.ture range.
  • WSi- films are mixtures of two phases, hexagonal and tetragonal. During annealing, as the temperature is increased over the range from about 400 " C to 700 ' C, the hexagonal phase transforms into the tetragonal phase. By about 900 ' C, the films are comprised substantially completely of the tetragonal phase. From this point, whether produced by conventional methods or methods according to the invention, WSi- films will behave similarly on cooling.
  • SiH 4 reacts with residual tungsten atoms present on the surface of the wafers, and with residual WF 6 , thus forming a silicon-rich WSi. layer having a thickness of approximately 1-2 A on top of the layer formed during the DCS deposition process (hence the alternate reference to the SiH purge step as a "cap" step).
  • the reaction adds silicon to the films at the grain boundaries of the films and fills pores in the films, thus releasing stress in the films. It is further believed that the SiH 4 purge may actually result in a slight increase in sheet resistance.
  • Sheet resistance was measured in semiconductor wafers processed according to the conventional and inventive processes described in Example 1, above. The value of the sheet resistance was measured at 49 different sites over the surface of the wafers, and the average value and standard deviation of the measured values were calculated. The standard deviation is denoted herein as the "uniformity" of the sheet resistance. A high "uniformity" value thus indicates a large variation of sheet resistance from site to site over the surface of the wafer.
  • Figures 6A and 6B show the short-term drift in sheet resistance, measured in ⁇ /square, and uniformity ( ⁇ ) in % over 25 wafers for the conventional process and the inventive process, respectively.
  • Sheet resistance as measured for the conventional process varied from 31 to 29 ⁇ /square, for a decrease of about 2 ⁇ /square (about 6.5%).
  • the sheet resistance varied from 44.4 to 44.6 ⁇ /square, within experimental e ⁇ or.
  • Uniformity for the conventional process varied from about 1.7% to 2.4%; for the inventive process, the variation was from about 1.83% to 1.75%.
  • the inventive process affords significantly reduced short-term downward drift in sheet resistance.
  • FIGS 6C and 6D show co ⁇ esponding long-term drifts in sheet resistance and uniformity over 500 wafers for the conventional process and the inventive process, respectively.
  • Sheet resistance was measured for the first wafer in each batch of 25 wafers. After 25 wafers were processed, the vacuum deposition chamber was cleaned, and the process was repeated for the next 25 wafers.
  • sheet resistance varied from 31 to 27 ⁇ /square, for a decrease of about 4 ⁇ /square (about 13%).
  • Lniformity for the conv entional process was observ ed to increase from about 2% to 3 5° o for the inv entiv e process, the v ariation was from about 1% to 1 8%, with no trend upward or downward observed
  • the inventive process thus affords significantly reduced long-term downward dnft in sheet resistance as compared to the conventional process, as well as improved uniformity
  • the invention has been illustrated pnma ⁇ ly with reference to a DCS deposition process, the invention is not limited in its applicability to DCS processes or processes which deposit WSi. on a substrate
  • the S ⁇ H 4 conditioning and purge steps can be used with other deposition processes, particularly those which deposit a crystalline mate ⁇ al on a substrate
  • Such matenals include, for example, T ⁇ S ⁇ x , CoSi., TiCoSi., etc
  • Processing semiconductor wafers in accordance with the present invention results in a significant reduction in short and long-term downward d ⁇ ft in sheet resistance, and enables production of more uniform wafers
  • the present invention results in processed semiconductor wafers having significantly reduced film stress.

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Abstract

A method of processing a substrate, such as a semiconductor wafer, in a vacuum processing chamber includes depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases by flowing SiH4, in combination with nitrogen or a noble gas, into the chamber. WSix, is deposited on a semiconductor wafer using a mixture comprising WF6 and dichlorosiliane, and the chamber is subsequently purged of residual WF6 and dichlorosilane by flowing SiH4, in combination with nitrogen or a noble gas, into the chamber. A further method of processing a substrate in a vacuum processing chamber includes the step of conditioning the chamber by flowing SiH4, in combination with nitrogen, or with nitrogen and a noble gas, into the chamber prior to depositing a material on the surface of the substrate. Semiconductor wafers processed according to the inventive method are characterized by more uniform sheet resistance values and reduced film stress.

Description

UTILIZATION OF SiH4 SOAK ND PURGE IN DEPOSITION PROCESSES
Related Applications
This application is a continuation-in-part of pending United States Patent Application
No 09/162,336, filed September 28, 1998 [729 D2], which is a division of United States
Patent Application No 08/743,929 filed November 5, 1996, which has issued as United
States Patent No 5,817,576 [729 Fl], which is a file wrapper continuation of United States Patent Application No 08/314,161, filed September 27, 1994 [729]
BACKGROUND OF THE INVENTION Field of the Invention
The present invention relates to an improved chemical vapor deposition process, such as a process for the deposition of tungsten si cide (WS.J from tungsten hexafluoπde (WF6) and dichlorosilane (DCS)
Background of the Related Art
Tungsten sihcide (WSi.) thin films have been deposited by low pressure chemical vapor deposition (LPCVD) onto semiconductor substrates using silane (SιH4) and tungsten hexafluoπde (WF6) as the precursor gases. Typically, the WSi- thin film is deposited onto a semiconductor wafer having a layer of silicon oxide beneath a polysihcon layer The foregoing process, however, has proven less than completely satisfactory
One problem with the foregoing process is that the deposited coating is not as conformal over stepped topographies as is desired Another problem is that films so deposited have a high residual fluorine content that adversely affects device performance For example, when the wafer is exposed to elevated temperatures, e g , about 850"C or higher, as duπng annealing, the excess fluoride ions migrate through the underlying polysihcon layer and into the underlying silicon oxide layer The effective thickness of the silicon oxide layer thus appears to increase This effective thickness increase in turn leads to an adverse change in electπcal properties of semiconductor devices including such layers
When using a multichamber vacuum processing system such as that descnbed in U S Patent Application Seπal No 4,951,601, to Maydan et al , incorporated herein by reference, the substrate to be coated w ith tungsten sihcide first is cleaned using a fluorine plasma scrub to remov e native oxide from the polvsihcon layer The cleaned substrate is then transferred into a substrate transfer chamber This transfer chamber has a nitrogen or argon atmospnere (subatmospheπc) to prevent re-oxidation of the substrate, and contains a robot to transfer the substrate into a processing chamber, e g , a tungsten deposition chamber, through a slit v alve having an O-πng seal This CVD process has become the standard for depositing tungsten sihcide from SιH4 and WF6 However, as substrates become larger, and feature sizes for devices become smaller, the above problems of step coverage and residual fluorine using this deposition process have become cπtical limitations for future applications An improved process for depositing WSi. films using dichlorosilane (DCS) instead of
SιH4 has been proposed The resultant WSi. films have reduced fluorine content and are more conformal than those deposited using SιH4 as the precursor gas, thereby providing a solution to the SιH4 based deposition process limitations In order to deposit WSi. films which have good conformity, low fluoride content and good adhesion to a substrate such as a silicon wafer (which can have one or more layers thereon), it was found beneficial to exclude nitrogen sources from the deposition chamber dunng the deposition process Such an improved process is provided by U S Patent Application Seπal No 08/136,529, filed October 14, 1993 by Chang et al, which is incorporated herein by reference In this process (the "DCS process"), tungsten sihcide thin films are made by passing WF6, DCS and a noble earner gas into a tungsten deposition chamber from which nitrogen is excluded.
In deposition processes, it is customary to purge the deposition chamber and gas delivery lines after each semiconductor wafer is processed in order to remove residual reactive and earner gases from the chamber and the delivery lines The DCS process descπbed above typically includes a purge step employing DCS as the purge gas It has been found, however, that depositing WSi. on semiconductor wafers according to the DCS process is associated with a noticeable downward dnft in the sheet resistance of wafers so processed, over both short and long-terms Using the DCS process, the sheet resistance has been observed to decrease by 2 Ω/square over the course of processing 25 wafers This short-term resistivity dπft amounts to a decrease of 5% or more A long-term resistivity dnft over the course of processing 500 wafers, amounting to 4-5 Ω/square, has also been observed A need exists for an improvement in the known DCS deposition process which reduces the observed short and long-term downward dπfts in sheet resistivity.
Summary of the Invention In accordance with one aspect of the present invention, a substrate, such as a semiconductor wafer, is processed in a chamber of a vacuum processing apparatus by depositing a material on a surface of the substrate using a gas mixture, and purging the chamber of residual gases remaining from the depositing step by flowing SiH4 into the chamber in combination with nitrogen or one or more noble gases. In a more particular aspect of the invention, WSix is deposited on a surface of a semiconductor wafer using a mixture comprising WF6 and dichlorosilane, and the chamber is subsequently purged of residual WF6 and dichlorosilane by flowing SiH4 into the chamber, in combination with nitrogen or with nitrogen and one or more noble gases. The use of nitrogen to purge WSi. is discovered to not impair film properties in the absence of oxygen or water vapor.
According to a further aspect of the present invention, an optional DCS partial purge is carried out after WSi. deposition and prior to the SiH4 purge.
In accordance with yet another aspect of the present invention, SiH4, in combination with nitrogen or one or more noble gases, is employed to condition a vacuum processing chamber prior to a deposition process. The SiH4 conditioning step can be employed independently of, or in combination with, the foregoing SiH4 purge step as part of a method for processing substrates in a vacuum deposition chamber.
According to an additional aspect of the present invention, semiconductor wafers processed according to the foregoing processes are also provided. The wafers so produced are characterized by reduced variation in sheet resistance, and are further characterized by reduced film stress as deposited.
In accordance with still another aspect of the present invention, there is provided a vacuum processing apparatus comprising a chamber, means for depositing a material, such as Wsi , on a surface of a substrate disposed within the chamber, and means for purging the chamber with SiH4, in combination with nitrogen or one or more noble gases.
Preferred means for depositing the material on the substrate surface include a source of at least one reactive gas and means for introducing the reactive gas into the chamber. Particularly, the apparatus preferably includes sources of VvTb and DCS. and means for combining the gases to form a reactive gas mixture.
Means for purging the chamber with SiH, preferably include a source of SiH4, a source of dry nitrogen, a source of a noble gas, and means for introducing the SiH4, nitrogen, and optionally a noble gas into the chamber.
Other objects, features and advantages of the present invention will become apparent to those skilled in the art from the following detailed description. It is to be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the present invention, are given by way of illustration and not limitation. Many changes and modifications within the scope of the present invention may be made without departing from the spirit thereof, and the invention includes all such modifications.
Brief Description of the Drawings
So that the above recited features, advantages and objects of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments. The invention may be more readily understood by referring to the accompanying drawings in which:
Figure 1 is a schematic cross-sectional view of an exemplary vacuum processing apparatus, more specifically a tungsten deposition chamber, which is useful in practicing a method of the present invention; Figure 2 is a detailed schematic diagram of a preferred gas mixing assembly generally indicated in Figure 1 ;
Figure 3 is a graph of film stress measured during annealing as a function of temperature for a comparison WSi. film deposited on a semiconductor wafer according to a conventional DCS process, with values measured during heating of the film indicated by rectangles, and values measured during cooling of the film indicated by triangles;
Figure 4 is a corresponding graph of stress as a function of temperature for an exemplary WSi. film deposited on a semiconductor wafer according to a method of the 00/70121 -- PCTtUSOO/13785
present invention;
Figure 5 is a flowchart illustrating an exemplary method for processing a semiconductor wafer according to the invention; and
Figures 6A-D are graphs showing the vanation of sheet resistance (0) and uniformity (o) for semiconductor wafers processed according to the methods descπbed for Figures 3 and 4, wherein Figures 6A-B show the variations observed after production of 25 wafers for the conventional and inventive processes, respectively, and Figures 6C-D show the vaπations observed after production of 500 wafers for the conventional and inventive processes, respectively.
Detailed Description of the Preferred Embodiments
The present invention uses silane, or more precisely monosilane (SiH4), in combination with nitrogen or a noble gas, to purge a tungsten deposition chamber after depositing WSi. on semiconductor wafers using WF6 and DCS. The process of the invention substantially reduces the short and long-term downward drift in sheet resistance of the semiconductor wafers so processed.
Using methods of the present invention, all benefits of the known DCS deposition processes are retained, with the additional benefit that the short and long-term drifts in sheet resistance are reduced from about 5% to less than about 3%. Thus, semiconductor wafers processed according to the present invention display reduced variation in sheet resistance.
We have also unexpectedly discovered that, as a result of the inventive methods, stress in the deposited WSi. film is significantly reduced.
Methods according to the invention can, 'if desired, be carried out employing conventional chemical vapor deposition (CVD) systems used to practice the known DCS processes, without the need for modifications to the vacuum deposition chamber. For example, a method of the invention can be earned out using the apparatus provided by Applied Materials, Inc. as described by Chang et al. in U.S. Patent Application Serial No. 08/136,529. Howev er, the methods of the present invention are not to be considered confined in their application to the use of such apparatus In particular, the methods of the present invention may be earned out using a multichamber processing system rather than a single chamber processing system Refemng now to Figure 1, a CVD system 10 compnses deposition chamber 12, vacuum exhaust system 14, gas combining assembly generally indicated at 16, diffuser 18 wafer lift 20, baffle plate 22, lift fingers 24 and susceptor lift 26 A substrate 28, such as a silicon wafer having a layer of polysihcon thereon, is disposed on a support or susceptor 30
Heating means 32 maintains a uniform temperature dunng processing of the susceptor 30 and the substrate 28 mounted thereon The deposition or reaction zone 34 lies above the substrate
In the illustrated embodiment, heating means 32 is an external array of 1000 watt lamps directing colhmated light through quartz window 36 Other known heating means can also be employed A particularly useful heating means 32 compnses resistive heating means rather than lamps When resistive heating means are employed, quartz window 36 can be omitted Thus, use of resistive heating means obviates the need for peπodic cleaning and/or replacement of the quartz window, with attendant maintenance and downtime expenses
A preferred vacuum processing apparatus including resistive heating means which can be employed in the practice of the present invention is descπbed in U S Patent Application Seπal No 08/200,074, filed February 23, 1994 by Lei et al , which is incorporated herein b\ reference
Gas combining assembly 16 can include a gas box or plenum and one or more valves for controlling the flow of the vaπous process gases, including purge gases, earner gases, reactive gases for deposition of WSi- or other matenals, and cleaning gases, such as NF3 for peπodic chamber cleaning processes
Alternatively, gas mixing assembly 16 may be omitted and all process gases delivered directly to chamber 12 via diffuser 18 This alternative may, however, result in greater non- uniformity and thus may be less preferred for certain applications Figure 2 illustrates an exemplary gas combining assembly 16 for use with the chamber of Figure 1 Feed lines 38 and 40 deliver process gases into plenum 42 and subsequently into chamber 12 v ia diffuser 18 Feed lines 38 and 40 are linked by mixing lines 44 and 46, which in rum are joined by divert line 48. Valves 50 and 52 are disposed between mixing lines 44 and 46 on feed lines 38 and 40, respectively Inlet mixing valves 54 and 56 are disposed on mixing line 44 as shown, and outlet mixing valves 58 and 60 are correspondingly disposed on mixing line 46 Divert valve 62 is disposed on divert line 48
Sources of process gases are connected to feed lines 38 and 40 Preferably, fluonne- contaimng gas sources are connected to one of the feed lines 38 and 40, while silicon- contaimng gas sources are connected to the remaining feed line. As shown in Figures 1 and 2, WF6 source 64 and NF3, cleaning gas source 66 are connected to feed line 38 via supply valves 68 and 70, respectively. DCS source 72 and SιH4 source 74 similarly are connected to feed line 40 via supply valves 76 and 78, respectively. A non-reactive gas source 80, which preferably is a source of nitrogen, argon, or a mixture of nitrogen and argon, is connected to feed lines 38 via supply valve 82.
When process gases are not flowing into chamber 12, the default settings of the various valves are as follows: valves 50 and 52 are open; all other valves are closed.
Returning to Figure 1 , the deposition process begins with the entry of process gases (i.e., reaction and carrier gases) into the deposition chamber 12 via gas combining assembly 16 and "showerhead" type diffuser 18. A conventional process mixture includes DCS, WF6 and argon. Gas combining assembly 16 mixes the process gases upstream of diffuser 18, ensuring the gas mixture is of uniform composition before being supplied to the diffuser 18. The diffuser 18 has numerous openings over an area corresponding to that of the substrate 28 beneath it. The spacing between the diffuser 18 and the substrate 28 can be adjusted to from about 200-1000 mils (5-25 mm) to define the reaction zone 34 The diffuser 18 feeds the combined process gases to the reaction zone 34.
The area of the chamber below the plane of the susceptor 30 is purged via bottom purge line 88 with a noble gas, preferably argon, to prevent reactive gases from extending into the area of the chamber 12 below the susceptor 30. The base pressure in the chamber is about 10 milhtorr. Exhaust system 14 is fitted with a throttle valve 86 hich can regulate the pressure of the chamber. In the illustrated embodiment of a method of the present invention, three gases, a non- reactive earner gas (e g argon, nitrogen, or a mixture of argon and nitrogen), WF6 and DCS, are mixed in gas combining assembly 16 WT6 is introduced from source 64 into gas combining assembly 16 through feed line 38 by opening supply valve 68 The WF6 preferably is introduced into gas combining assembly 16 together with the non-reactive earner gas, which is delivered from source 80 by opening supply valve 82 Dichlorosilane from source 72 is introduced into gas combining assembly 16 through feed line 40 by opening supply valve 76
The noble earner gas preferred herein for reasons of economy is argon, but other noble gases can also be used As mentioned above, nitrogen should not be used in the deposition process in accordance with the present process although nitrogen can be used for preconditioning or purging the deposition chamber
Mixing of the process gases is effected in the gas combining assembly 16 of Figure 2 by closing valves 50 and 52 and outlet mixing valves 58 and 60, and opemng inlet mixing valves- 4 and 56 and divert valve 62 The gases partially mix in mixing line 44, and initially flow through divert line 48 to exhaust system 14 until the flow is stabilized After stabilization, divert valve 62 is closed and outlet mixing valves 58 and 60 are opened The partially mixed gases return through mixing line 44 to feed lines 38 and 40, then enter plenum 42 where mixing is completed The mixed process gases subsequently enter chamber 12 via diffuser 18
The tungsten sihcide deposition is generally earned out at from about 500-600'C, preferably at about 550*C The pressure during deposition can be from about 0 3-10 torr, but preferably is earned out at about 0 7-1 5 torr
In a typical deposition process, the flowrates of process gases into chamber 12 are related to the volume of the chamber For an exemplary apparatus including a chamber adapted to process a semiconductor wafer having a diameter of 8" (200 mm), a typical chamber volume is about 6 L. A semiconductor wafer having a diameter of 6" (150 mm) can also be processed in a chamber of this volume For such an apparatus, an appropnate flowrate of WF6 is about 1-6 seem, preferably about 3 5 seem Dichlorosilane is passed into chamber 12 at a flowrate of about 130-300 seem, preferably at about 175 seem Argon is used as the earner gas and is passed into chamber 12 via line 38 at a flowrate of about 100- 1000 seem, preferably at 300-600 seem. This argon flowrate is exclusive of the bottom purge flowrate, about 100-500 seem, preferably about 300 seem The vanous flowτates are adjusted so as to obtain a WSi, laver having a resisti itv of betw een 700 and 1400 uΩ-cm, preferably about 800 -.-cm Deposition is most preferably earned out at 550°C and 1 ton- After the deposition process is completed, but before the SιH4 purge step is initiated, it is preferred to carry out an optional partial purge step using DCS The optional DCS purge step is earned out by simply closing supply valve 68 to stop the flow of WF6 into the deposition chamber 12, while maintaining the previously established flow of DCS and argon into chamber 12 The optional DCS purge is earned out for 0 to about 5 seconds, preferably about 2-3 seconds The DCS flowrate dunng this optional purge step is about 130 to 300 seem, preferably about 175 seem Preferred temperatures are as indicated for the deposition step
The optional DCS purge helps to remove any remaining WT6 from gas combining assembly 16 This ensures that WF6 does not come into contact with the subsequent flow of SιH4, in gas combining assembly 16 Subsequent to the deposition process and optional DCS partial purge step, the SιH4, purge, or "cap", step is earned out Supply valve 76 is closed, ending the flow of DCS from source 72 into chamber 12 If supply valve 68 was not previously closed to end the flow of WF6, it is closed at this time. All mixing valves 54, 56, 58 and 60 in Figure 2 are closed, and both valves 50 and 52 are opened. Supply valve 78 is opened, allowing SιH4 to flow from source 74 Supply valve 82 preferably remains open, continuing the flow of argon from source 80 However, argon can be replaced with nitrogen or mixed with mtrogen when combined with SιH4 without changing the measured stress of the deposited film Argon preferably also continues to flow into deposition chamber 12 through bottom purge line 88 SιH4 from SιH4 source 74 flows through feed line 40 and valve 52 into plenum 42 and thence into chamber 12. Direct flow of the SιH4 through valve 52 again helps to ensure that the SιH4 does not come into contact with, and react with, any WF6 which may remain in gas combining assembly 16
It is preferred that plenum 42 of the gas combining assembly 16 of Figure 2 be maintained at a temperature between about 10'C and 15'C, in order to prevent the SιH4 from decomposing Prefeπed cooling means include a water jacket (not shown) Other cooling means may also be employed. The SιH4 purge step is preferablv earned out for a time from about 10 to 30 seconds, more preferablv about 15 seconds The total flowrate of SιH4 into deposition chamber 12 is preferably about 100 to 500 seem, more preferably about 300 seem Dunng the SιH purge the total chamber pressure within deposition chamber 12 preferably is maintained at about 0 5 to 1 0 torr, more preferably about 0 7 torr The temperature dunng the SιH4 purge preferably is about 500-600°C, more preferably about 550 C Preferably the temperature is approximately the same as the temperature at which the deposition step is earned out
Preferably an argon bottom purge flowrate of about 100 to 500 seem, more preferably about 300 seem, is maintained dunng the SιH4 purge step Upon completion of the SιH4 purge step, SιH4 is removed from the deposition chamber 12, gas combining assembly 16 and feed lines 38 and 40 Valve 52 is closed, and mixing valve 56 and divert valve 62 are opened DCS, preferably combined with argon or nitrogen, is passed through feed line 40 and out divert line 48 to exhaust system 14 for about 5 to 10 seconds, preferably about 5 seconds, to purge residual SιH4 DCS does not enter deposition chamber 12 dunng this step
Next, argon or nitrogen flow, or a combination thereof, is maintained into deposition chamber 12 for about 5 to 1 seconds, preferably about 5 seconds, to remove residual SιH4 from the chamber Finally, deposition chamber 12 and all reactive gas feed lines are pumped out to the base pressure of the pump employed (preferably about 5 to 15 milhtoπ) The foregoing SιH4 removal process is preferably earned out within the ranges of temperatures noted above with reference to the preceding steps
The purge process is completed at this point, and substrate 28 is ready to be removed from deposition chamber 12
Peπodically, chamber 12 may be cleaned by conventional means, such as a plasma cleaning process employing a gas such as NF3 The cleaning gas may be supplied to chamber
12 from source 66 by opening supply valve 70, closing mixing valves 54 and 58, and flowing the cleaning gas through valve 50 The cleaning gas may, if desired, be combined with a noble earner gas in the usual manner
According to the present invention, SιH4 can be introduced into a chamber of a vacuum processing apparatus pnor to deposition as well as subsequent to deposition This initial chamber conditioning step, or "silane soak" step, pnor to the deposition step preferably is carried out by introducing SiH4 into deposition chamber 12 via line 40. Valve 52 is opened, and all other valves remain closed.
Preferably, an argon bottom purge is earned out simultaneously with the SiH4 step. The argon flowrate preferably is about 100 to 500 seem, more preferably about 300 seem. The SiH4 soak step preferably is carried out after the semiconductor substrate 28 is introduced into deposition chamber 12. SiH4 is preferably introduced into deposition chamber 12 in combination with a non-reactive gas, such as nitrogen or a noble gas, or a combination of nitrogen and a noble gas, e.g. argon, used in carrying out the subsequent SiH4 purge steps. The SiH4 soak step is preferably carried out for about 15 seconds to 1 minute, more preferably about 30 seconds. The flowrate of SiH4 into deposition chamber 12 preferably is about 100 to 500 seem, more preferably about 300 seem, assuming a chamber volume of about 6 L. Chamber pressure during the conditioning step is preferably about I to 10 ton, more preferably about 2 ton.
Conditioning times will depend on both the SiH4 flowrate and the chamber pressure. Thus, 15 seconds is the prefeπed minimum time for a SiH4 flowrate of 500 seem at a chamber pressure of' 10 ton. About 30 seconds is sufficient for a flowrate of 300 seem at 2 torr.
The temperature during the conditioning step typically is the same employed for the deposition step, about 500-600'C, more preferably about 550'C. However, no minimum temperature is required for the conditioning step, since SiH4 readily decomposes even at room temperature (250'C).
The conditioning step can be carried out in combination with, or independent of, the SiH4 purge step.
By conditioning deposition chamber 12 as described above prior to the DCS deposition step, more uniform WSi. deposition is realized. It is believed that the SiH4 may serve as a catalyst to initiate deposition, and also may add a thin polysihcon layer to the surface of the semiconductor wafer prior to the DCS deposition process. Carrying out a SiH4 soak step therefore is most prefeπed. However, when the DCS deposition process is carried out at an elevated temperature, for example above about 650*C, the SiH4 soak step may be omitted. An exemplary process including a SiH4 conditioning step, a DCS deposition step, and a SiH4 purge step is shown in Figure 5. The inv ention is further illustrated bv the following non-hmtting examples
Example 1
In the example, two 8" semiconductor wafers were deposited with layers of WSi. The first wafer was processed according to a conventional silane method without a silane cap The second wafer was processed according to a DCS method with preceding SιH4 soak and subsequent SιH4 capping steps according to the present invention, as follows
Initially, the wafer was introduced into a 6 L vacuum deposition chamber, and SιH4 (300 seem) was introduced into the chamber together with argon (300 seem) as the earner gas The bottom of the chamber was simultaneously purged with argon (300 seem) The SιH4 soak step was earned out for 30 sec at 2 ton
Subsequently, the wafer was heated to 565°C in the chamber WF6 (3 5 seem), DCS (175 seem) and argon (600 seem) were introduced into the chamber via a diffuser The bottom of the chamber was purged with argon (300 seem) Chamber pressure was 0 8 ton WSi. deposition was earned out for 110 seconds
After the deposition was completed, a silane capping step was earned out for 15 seconds The total process time was 3 minutes
Stresses in the WSi. film on each wafer are then determined using a Tencor FLX-2908 thin-film stress measurement instrument (available from Tencor Instruments) Each wafer is heated in a nitrogen atmosphere to a temperature of 900'C over the course of 6 hours The wafers are held at 900'C for 30 minutes, then gradually cooled to room temperature (25°C) Stress in each film was determined dunng both heating and cooling Results are given in Figures 3 and 4, respectively
Companson of Figures 3 and 4 shows the unexpected improvement in film stress achieved according to the present invention The exemplary film produced according to the inventive process show s significantly lower stress than does a companson film formed according to the previously known DCS process over a range of temperatures including the range (about 500-600°C) in which the deposition process typically is earned out
More particularly, WSi. films produced according to both the known and the inventive methods exhibit hysteresis in the stress measured dunng film annealing and subsequent cooling In the exemplary film produced according to the invention (Figure 4), the stress as determined dunng heating is lower than the stress determined dunng coolmg over the temperature range from about room temperature to about 600'C. Stress varied slightly between about 400'C and 600'C. In the companson film of Figure 3, the stress as determined dunng heating becomes higher than that determined during cooling at about 200°C, and remains higher up to a temperature of about 675°C. The exemplary film of Figure 4 also differs from the companson film of Figure 3 in that the film stress exhibits a negative value over a range of temperatures from about 400°C to about 500°C. That is, the exemplary film exhibits compression rather than tension over the foregoing temperature range, while the comparison film always exhibits tension.
The exemplary film exhibits a local maximum in stress at about 600'C, similarly to the comparison film. However, in the exemplary film, the measured stress at this temperature is much lower than the stress in the comparison film. Furthermore, both the rate of change in stress and the total reduction in stress shown by the comparison film during heating in the temperature range above about 600'C are much greater than those shown by the exemplary film. That is, the exemplary film shows a much smoother transition in stress in this tempe.r.ture range.
While not wishing to be bound by any particular theory, we believe that the behavior of films produced according to the invention may be explained as follows. WSi- films are mixtures of two phases, hexagonal and tetragonal. During annealing, as the temperature is increased over the range from about 400"C to 700'C, the hexagonal phase transforms into the tetragonal phase. By about 900'C, the films are comprised substantially completely of the tetragonal phase. From this point, whether produced by conventional methods or methods according to the invention, WSi- films will behave similarly on cooling.
Stress in the films is observed to decrease on heating until the transitional temperature range is reached, at which point stress begins to increase as the phase transition begins. In films produced according to methods of the invention, the stresses at the beginning of the annealing process are much lower than the stresses in films produced according to prior art processes. The stresses remain significantly lower than the stresses in the prior art films during pre-transition heating, as shown, and can assume zero or even negative (compressive) values in this regime, although negative values will not necessarily be realized in every film produced according to the invention. It is believed that the reduction in stress shown by films produced in accordance with methods of the invention may be accomplished as follows. The processed semiconductor wafers remain in the chamber while SiH4 purges the chamber. SiH4 reacts with residual tungsten atoms present on the surface of the wafers, and with residual WF6, thus forming a silicon-rich WSi. layer having a thickness of approximately 1-2 A on top of the layer formed during the DCS deposition process (hence the alternate reference to the SiH purge step as a "cap" step). The reaction adds silicon to the films at the grain boundaries of the films and fills pores in the films, thus releasing stress in the films. It is further believed that the SiH4 purge may actually result in a slight increase in sheet resistance.
Example 2
Sheet resistance was measured in semiconductor wafers processed according to the conventional and inventive processes described in Example 1, above. The value of the sheet resistance was measured at 49 different sites over the surface of the wafers, and the average value and standard deviation of the measured values were calculated. The standard deviation is denoted herein as the "uniformity" of the sheet resistance. A high "uniformity" value thus indicates a large variation of sheet resistance from site to site over the surface of the wafer.
Figures 6A and 6B show the short-term drift in sheet resistance, measured in Ω/square, and uniformity (Φ) in % over 25 wafers for the conventional process and the inventive process, respectively. Sheet resistance as measured for the conventional process varied from 31 to 29 Ω/square, for a decrease of about 2 Ω/square (about 6.5%). For the inventive process, the sheet resistance varied from 44.4 to 44.6 Ω/square, within experimental eπor. Uniformity for the conventional process varied from about 1.7% to 2.4%; for the inventive process, the variation was from about 1.83% to 1.75%. As is apparent, the inventive process affords significantly reduced short-term downward drift in sheet resistance. Figures 6C and 6D show coπesponding long-term drifts in sheet resistance and uniformity over 500 wafers for the conventional process and the inventive process, respectively. Sheet resistance was measured for the first wafer in each batch of 25 wafers. After 25 wafers were processed, the vacuum deposition chamber was cleaned, and the process was repeated for the next 25 wafers.
For the conventional process, sheet resistance varied from 31 to 27 Ω/square, for a decrease of about 4 Ω/square (about 13%). For the inventive process, the sheet resistance v aπed from 44 5 to 43 (Ω/square, for a decrease of about 1 5 Ω/square (about 3%) Lniformity for the conv entional process was observ ed to increase from about 2% to 3 5° o for the inv entiv e process, the v ariation was from about 1% to 1 8%, with no trend upward or downward observed The inventive process thus affords significantly reduced long-term downward dnft in sheet resistance as compared to the conventional process, as well as improved uniformity
Furthermore, after 500 wafers the conventional process required an upward adjustment of the pressure dunng deposition, to about 1 2 ton, in order to produce deposited films having acceptable sheet resistance No such upward adjustment was required in the inventive process
Although the invention has been illustrated pnmaπly with reference to a DCS deposition process, the invention is not limited in its applicability to DCS processes or processes which deposit WSi. on a substrate The SιH4 conditioning and purge steps can be used with other deposition processes, particularly those which deposit a crystalline mateπal on a substrate Such matenals include, for example, TιSιx, CoSi., TiCoSi., etc
Processing semiconductor wafers in accordance with the present invention results in a significant reduction in short and long-term downward dπft in sheet resistance, and enables production of more uniform wafers In addition, the present invention results in processed semiconductor wafers having significantly reduced film stress. While the foregoing is directed to the prefened embodiment of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims which follow

Claims

What Is Claimed Is
1 A method of processing a substrate in a chamber of a vacuum processing apparatus which compnses (I) depositing WSi. on a surface of said substrate using a mixture compπsing WF6 and dichlorosilane, and (n) purging said chamber of residual WF6 and dichlorosilane by flowing SιH4, in combination with mtrogen or one or more noble gases, into said chamber pnor to removal of the substrate from the chamber
2 The method of claim 1 wherein said substrate is a semiconductor wafer
3 The method of claim 1 wherein (u) is earned out for about 10 to about 30 seconds
4 The method of claim 1 wherein the flowrate of said SιH4 is about 300 to about 500 seem
5 The method of claim 1 wherein the pressure in said chamber dunng (u) is about 0 5 to about 1 0 ton
6 The method of claim 1 further compπsing (in) removing said SιH4 from said chamber
7 The method of claim 1 wherein pnor to (l) said substrate is introduced into said chamber and said chamber is conditioned by introducing into the chamber a gas consisting of SιH4 in combination with nitrogen
8 The method of claim 7 wherein said chamber is conditioned with a flowrate of said SιH4 from about 100 to about 500 seem
9 The method of claim 8 wherein said chamber is conditioned at a pressure from about 1 to about 10 ton
10 A method of processing a substrate in a chamber of a v acuum processing apparatus which compnses1 (i) introducing said substrate into said chamber, (n) flowing SiH4, in combination with nitrogen or a noble gas into said chamber for about 15 seconds to about 1 minute; (in) depositing WSi- on a surface of said substrate using a mixture compnsing WF0 and dichlorosilane; (iv) at least partially purging said vacuum processing apparatus by flowing dichlorosilane into said apparatus; and (v) purging said chamber of residual WF6 and dichlorosilane by flowing SiH4 in combination with nitrogen, or with nitrogen and a noble gas, into said chamber after ceasing the flow of dichlorosilane into said apparatus.
11. The method of claim 10 wherein said substrate is a semiconductor wafer.
12. The method of claim 1 1 wherein said chamber has a bottom portion and said bottom portion is purged with argon at least during (iii).
13. A method of processing semiconductor wafers in a chamber of a vacuum processing apparatus which comprises: (i) depositing a film of WSi- on a surface of a semiconductor wafer using a mixture comprising WF6 and dichlorosilane; and (ii) purging said chamber of residual WF6 and dichlorosilane by flowing SiH4 in combination with nitrogen, or with nitrogen and a noble gas, into said chamber; (iii) whereby the sheet resistance of said WSi- film does not decrease by more than 3% over twenty-five consecutive repetitions of (i) - (ii) on different wafers.
14. A method of processing semiconductor wafers in a chamber of a vacuum processing apparatus which compnses: (i) flowing SiH4 and nitrogen into a chamber containing a semiconductor wafer; (ii) depositing WSi. on a surface of said semiconductor wafer using a mixture compnsing WF6 and dichlorosilane; (in) at least partially purging said vacuum processing apparatus bv flowing dichlorosilane and a noble gas, into said apparatus, (iv ) purging said chamber ot residual WF„ and dichlorosilane by flowing SιH in combination with nitrogen, or with nitrogen and a noble gas, into said chamber after ceasing the flow of dichlorosilane into said chamber, and (v) wherebv the sheet resistance of said WSi- film does not decrease by more than 3% over twenty-five consecutive repetitions of (l) - (iv)
15 A method of processing a substrate in a chamber of a vacuum processing apparatus which compnses (I) introducing said substrate into said chamber, (π) flowing a gas consisting of SιH4 in combination with nitrogen, or in combination with nitrogen and a noble gas, into said chamber, (in) subsequently depositing a WSi. film on a surface of said substrate at a tempe.-ture below about 650°C using a mixture compπsing WF6 and dichlorosilane, (iv) purging said chamber by flowing SιH4 in combination with mtrogen, or in combination with nitrogen and a noble gas, into said chamber after ceasing depositing the refractory metal sihcide and pnor to removal of the substrate
16 The method of claim 15 wherein said substrate is a semiconductor wafer
17 The method of claim 15 wherein said SιH4 is combined with nitrogen and is flowed into said chamber in (n) for about 15 seconds to about 1 minute
18 The method of claim 15, wherein (iv) compnses purging said chamber by flowing SιH4 and nitrogen into said chamber after ceasing the flow of dichlorosilane into said chamber
19 A method of processing a substrate in a chamber of a vacuum processing apparatus, compπsing (l) depositing WSi. on a surface of said substrate using a mixture compπsing WF6 and dichlorosilane, (ii) purging said chamber of residual WF^ and dichlorosilane by flowing SiH4 in combination with nitrogen, or with nitrogen and a noble gas, into said chamber; and (iii) removing said SiH from said chamber pnor to removing said substrate.
20. A method of processing a substrate in a chamber of a vacuum processing apparatus, comprising: (i) flowing SiH4 in combination with nitrogen, or with nitrogen and a noble gas, into said chamber after positioning said substrate in said chamber; (ii) depositing WSi- on a surface of said substrate using a mixture comprising WF6 and dichlorosilane; and (iii) purging said chamber of residual gases remaining from depositing said WSi. by flowing SiH4, in combination with nitrogen, or with nitrogen and a noble gas, into said chamber prior to removing said substrate from said chamber.
PCT/US2000/013785 1999-05-19 2000-05-19 UTILIZATION OF SiH4, SOAK AND PURGE IN DEPOSITION PROCESSES WO2000070121A1 (en)

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DE10102742C1 (en) * 2001-01-22 2002-09-12 Promos Technologies Inc Tungsten deposition process used in semiconductor manufacture comprises passing reactive mixed gas consisting of tungsten hexafluoride, silane and nitrogen through chamber to form tungsten crystal, and treating with silane and mixed gas

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EP0704551A1 (en) * 1994-09-27 1996-04-03 Applied Materials, Inc. Method of processing a substrate in a vacuum processing chamber
EP0863227A1 (en) * 1997-03-04 1998-09-09 Tokyo Electron Limited Method and apparatus for forming laminated thin films or layers

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EP0704551A1 (en) * 1994-09-27 1996-04-03 Applied Materials, Inc. Method of processing a substrate in a vacuum processing chamber
US5817576A (en) * 1994-09-27 1998-10-06 Applied Materials, Inc. Utilization of SiH4 soak and purge in deposition processes
EP0863227A1 (en) * 1997-03-04 1998-09-09 Tokyo Electron Limited Method and apparatus for forming laminated thin films or layers

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10102742C1 (en) * 2001-01-22 2002-09-12 Promos Technologies Inc Tungsten deposition process used in semiconductor manufacture comprises passing reactive mixed gas consisting of tungsten hexafluoride, silane and nitrogen through chamber to form tungsten crystal, and treating with silane and mixed gas

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JP2002544394A (en) 2002-12-24
TW469519B (en) 2001-12-21

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