WO2000008517A1

WO2000008517A1 - Liquid crystal display device

Info

Publication number: WO2000008517A1
Application number: PCT/EP1999/005506
Authority: WO
Inventors: Jeffrey A. Chapman
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 1998-08-05
Filing date: 1999-07-27
Publication date: 2000-02-17
Also published as: GB9816941D0

Abstract

In a liquid crystal display device, a drive IC (21) in chip form is disposed in a recess (22) in one support (14) beneath the seal line (16) and connected between internal pixel addressing electrodes (18) and external supply electrodes (27) carried on the support with the seal material extending over the recess and serving to encapsulate, and protect, the chip. In a matrix display device a plurality of chips (21) can be carried in an elongated recess beneath the sea line which together constitute the row driver and/or column driver circuits.

Description

DESCRIPTION

LIQUID CRYSTAL DISPLAY DEVICE

The present invention relates to a liquid crystal display device comprising a pair of supports which are bonded together by a peripheral seal and between which liquid crystal material is disposed and contained by the seal, at least one of the supports carrying on one of its surfaces a plurality of electrodes internally of the seal, a plurality of electrodes externally of the seal, and a drive IC chip operatively connected to the internal and external electrodes.

Liquid crystal display devices (LCDs) of this kind, having a drive IC carried on one of the supports, have been known for some time. The provision of part of the driving electronics in the form of an integrated circuit directly on the support in this way enables a reduction in the number of external connections required for the device. By using an, initially, unencapsulated IC (integrated circuit) chip, as compared with a standard packaged IC in which the chip is contained within a plastics housing, an important saving in space is obtained enabling a more compact display device to be produced in which the proportion of the overall area utilised for display purposes is increased. In, for example, a simple form of display device having, say, nine seven-segment display characters, then by providing a display control chip for controlling the voltage supplied to each of the segments on the support the number of external connections required can be reduced from 63 to just 4 while the amount of space needed to accommodate such a chip is comparatively small. In a large area matrix display device, for example an active matrix LCD as used, for example, in laptop computers, having thin film transistors (TFTs) connected to pixels electrodes arranged in rows and columns and driven by sets of row and column address electrodes, then typically there may be several hundred row address conductors and even more column address conductors to which row (scanning) and column (data signal) drive circuits are connected. Again, by disposing drive ICs on one of the supports of the LCDs, a considerable reduction in the number of external connections required can be achieved.

In GB-A-2160 693, an LCD is described in which the drive IC chip is provided on a peripheral surface region of one of the supports outside the seal region. Electrodes, comprising ITO with a metal overlayer, extend from the display region through the seal to this peripheral region of the support and supply lines, similarly comprising ITO and overlying metal, are provided solely on that region through which power and input signals for the chip are supplied. The terminal parts of the electrodes and the supply lines are arranged in accordance with contact pads on the underside of the chip and are electrically connected to those pads via conductive adhesive. The other ends of the supply lines are connected to respective leads carried on a separate substrate for electrically connecting the chip to remote circuitry. The chip, the supply lines and the parts of the electrodes extending into this peripheral region are all coated with a resin to protect against corrosion, e.g. the effects of moisture and the like. With this arrangement, however, it is still necessary to devote a significant part of the support area to the chip and its interconnections so that the area available for display purposes is, for a given size of support, consequently reduced. When using chips in this way, with the chips being mounted using, for example, COG (Chip On Glass) technology and subsequently coated with a resin, then adequate space must be provided between the chip and the other support to allow the chip to be coated. There is a continuing desire to minimise the overall size of LCDs, whilst maximising their effective display areas, and therefore making the edges of the panel as narrow as possible so that more of the glass supports can be used for display purposes, particularly for use in portable equipment where space is at a premium. Moreover, problems can be experienced with the resin coating used to protect components in the peripheral region. In particular temperature cycling or mechanical shocks can lead to cracks in the resin, leading to corrosion problems, and even in the chip.

In US-A-4394067, an alternative approach was suggested in which the chip is provided at the region of the seal. In the described structure, the chip is carried on the planar surface of one support and connected to electrodes extending over the display area and to supply lines extending to the periphery of the support. In order to accommodate the chip, whose height is greater than the spacing between the two supports, a recess is formed in the other, opposing, support overlying the chip. The seal bonding these two supports together extends as a band around the peripheries of the two supports except at the region of the chip where it is split into two parts or branches which extend respectively to either side the chip and the recess formed in the other support, with the chip effectively being contained in a cavity defined by parts of the seal and the other support spaced from the chip. As a consequence, the width of the seal along the side at which the chip is located is much wider than the width of the seal along the other, three, sides. Because of the increased width of the seal needed at this side the amount of space effectively saved by locating the chip at the region of the seal is reduced. A further complication, particularly in active matrix LCDs, is that the other support, i.e. the one not carrying the electrodes and the chip, tends to be thinner in order, inter alia, to reduce the weight of the panel, and due to its thinness it is not possible to form a recess in this other support to accommodate the chip without at least seriously effecting its integrity.

It is an object of the present invention to provide an improved LCD. It is another object of the present invention to provide an LCD in which the aforementioned problems are overcome at least to some extent.

According to the present invention, a liquid crystal display device of the kind described in the opening paragraph is characterised in that the IC chip is carried in a recess in the one support and the seal extends over the recess and covers the chip.

In this arrangement, the IC is actually located within the seal-line, rather than the seal being split into two paths extending around either side of the IC and requiring an increased width of seal. Thus, the overall width of the seal can be considerably smaller which leads to greater space savings, allowing the proportion of the area of the panel devoted to display production to be increased. Moreover, as the seal extends over and covers the IC, the seal material serves to support and encapsulate at least partially the IC and thus to protect the IC against corrosion and to an extent the effects of mechanical shocks. The seal additionally assists in ensuring that reliable electrical contact between the IC and the underlying electrodes is maintained. Also, there is no need to form a recess in the other, opposing, support which means that relatively thin glass sheets can be used for this other support, as is desirable particularly in active matrix LCDs. In such devices the support which carries the plurality of electrodes together with the TFTs is normally thicker and hence can conveniently tolerate a recess formed therein to accommodate the IC with detrimentally affecting significantly its structural rigidity. The recess preferably is of a depth corresponding approximately to the height of the IC and its contact structure so that the top of the IC is no higher than, and preferably approximately level with, the surface of the support. Thus, the thickness of the seal can be substantially the same at this region as elsewhere. The sidewalls of the recess are preferably sloped so that the plurality of internal electrodes and the supply electrodes, which typically would be formed by patterning a deposited thin film, can reliably be extended thereover from the surface of the support to the bottom of the recess, where connection to the IC is made. In a matrix LCD having sets of row and column address electrodes for addressing a row and column array of pixels, and comprising for example an active matrix LCD using thin film transistors associated with the array of pixels, a plurality of IC chips may be carried in a linear recess in the one support extending adjacent to one edge of the support and connected to respective groups of address electrodes of one set. Thus, the IC chips may comprise row drive circuits arranged to supply selection signals to the set of row address electrodes or the IC chips may comprise column drive circuits arranged to supply data signals to the set of column address electrodes. By using recesses extending along two edges of the support, both column drive and row drive IC chips can be provided.

Embodiments of liquid crystal display devices in accordance with the invention will now be described, by way of example, with reference to the accompanying drawings, in which:-

Figure 1 is a schematic plan view of an embodiment of LCD according to the invention; Figure 2 is an enlarged cross-sectional view along the line 2-2 of Figure

1 ; and

Figure 3 is an enlarged plan view of an edge part of one support of the device.

The Figures are merely schematic and have not been drawn to scale. The same reference numbers are used throughout the drawings to indicate the same or similar parts.

Referring to Figures 1 and 2, the liquid crystal display device 10 is in the form of a panel comprising two generally rectangular and planar supports 12 and 14 arranged parallel to one another to define a gap therebetween in which liquid crystal material 15 is disposed. The supports 12 and 14 comprise glass plates but any other suitable material may be used instead, providing that at least one of the supports is transparent. The supports are bonded together around their periphery by means of a seal 16 which contains the liquid crystal material and which borders and defines an LC cell providing a display area 11 in which display pixels are located. Spacing elements (not shown), for example comprising polymer spheres, may be provided between the supports so as to maintain the desired spacing in accordance with usual practice.

The inner surfaces of the supports are provided with electrodes to which drive voltages are applied in order to produce desired display effects. This particular display device comprises an active matrix device. The support 14 thus carries a row and column matrix array of pixel electrodes, which may be formed of ITO or reflective metal depending on whether the display is to be operated in a transmissive or reflective mode, which define a display area and are driven via thin film transistors (TFTs) that are connected to sets of row and column address electrodes in the form of conductive lines or tracks also carried on the support 14 internally of the seal region. Active matrix TFT LCDs are well known and it is not thought necessary to describe here in detail their general construction and operation. A typical example is described in US-A-5130 829 to which reference is invited in these respects. In operation, a selection (gating) signal is applied to each row address electrode in turn so as to turn on the TFTs of the selected row of pixels causing data signals then present on the column address electrodes to be transferred via the TFTs to the respective pixel electrodes. The other support 12 carries on its inner surface a continuous electrode which is common to all pixels and is held at a reference potential. Each display pixel consists of a pixel electrode, an overlying portion of this common electrode and LC material therebetween. The voltage supplied to the pixel electrode via the TFT determines the grey-scale output. LC orientation layers are provided over the electrode structures on both supports in known manner and polarising layers may be provided on their outer surfaces.

In the cross-sectional view of Figure 2, a row address electrode is shown at 18 while the common electrode on the other support 12 is indicated at 19. The orientation layers, for example of polyimide, are shown at 17 while the polarising layers have been omitted for simplicity. For a colour display, an array of colour filter elements would normally be provided also on the support 12, but could instead be provided on the support 14. Figure 3 shows in a highly simplified and schematic manner a plan view of a typical part of the support 14 adjacent one edge. In this Figure, part of the pixel array is shown, comprising pixel electrodes 30, TFTs 31 and the column address electrodes 32, as well as the row address electrodes 18.

Referring particularly to Figures 2 and 3, the support 14 is slightly longer in one dimension than the support 12 and provides a projecting edge 20 which extends beyond the edge of the other support 12.

The selection signals for the row address electrodes 18 are provided by a row driver circuit which consists of a number of semiconductor ICs (Integrated Circuits) 21 arranged juxtaposed in the column direction adjacent one edge. The ICs, which include digital shift register circuits, are of generally conventional form and provided as unencapsulated silicon semiconductor chips. Each chip is connected to a respective group of row address conductors and arranged to supply a selection signal to each of the electrodes in the associated group in turn, the chips being operable in this manner in sequence so that all row electrodes are scanned with a selection signal one at a time in turn in conventional manner. The chips are mounted in an elongate, linear channel - like recess 22 extending inwardly of, and parallel to, an edge of the support 14 directly below the seal 16 at this side of the panel. The row address electrodes 18 extend in a fan-in arrangement onto the bottom of this recess 22, via a sloping sidewall, where they connect with respective output contacts of the IC chips. Supply electrodes 27, via which power and timing signals are supplied to the ICs 21 , are provided on the surface of the projecting edge 20 of the support 14 and similarly extend, via a sloping sidewall 25, to the bottom of the recess 22 where they connect with respective input contacts of the ICs. In this example the chips 21 are mounted in the recess 22 with their input and output contacts connected to the underlying electrodes 18 and 27 using conventional COG (Chip On Glass) but it is envisaged that other known techniques for mounting unencapsulated chips could be employed instead. The supply electrodes lead to the outer edge of the support 14 where external connections can be made, for example, with a foil carrying a pattern of conductive tracks by means of ACF (anisotropic conducting film) bonding or other known technique. In Figure 3, each chip 21 is shown as connected, to, at one side, only a relatively small number of row address electrodes 18 for simplicity and to three supply electrodes 27 at the other. In practice, the number of row address electrodes controlled by each IC may be around 120 to 240 whereas the number of supply electrodes required for each IC is significantly smaller, for example typically around 10. Each chip 21 is shown as having its own, separate, supply electrodes for power and timing signals. Alternatively, however, adjacent chips 21 may be interconnected in cascade fashion via conductive thin film tracks carried on the support 14 in the recess 22, on the projecting edge 20, or on the surface of the support inwardly of the seal 16 thereby further reducing the number of external connections required.

The row electrodes 18 and the supply electrodes 27 may conveniently be formed at the same time, for example by patterning a CVD deposited layer of ITO or a metal such as aluminium, or a combination of both materials, with the sloping sidewalls of the recess 22 ensuring that the risk of discontinuities is minimised.

The recess 22 may be formed in any known suitable manner such as etching (plasma or wet) or mechanically by grinding and polishing or laser ablation.

The depth of the recess 22 is such that, with the contacts of the ICs mounted on and connected to the underlying electrodes, the surface of the IC is substantially flush with the surface of the support 14, although it could instead be arranged to be slightly below this surface. Each chip 21 will generally be around 15 to 20mm in length and typically the thickness and width of the IC chip, together with its contacting structure, will be around 0.2mm and 2mm respectively. The width of the recess is selected to be slightly greater so as to allow for the sloping sidewalls, for example around 2.5mm. The support 14, when made of glass, would typically have a thickness of between 0.7mm and 1.1mm and consequently the recess 22 will not detrimentally affect its integrity to any significant extent.

As regard the dimensions of other components, the thickness of the support 12 and the LC layer 15 may be around 0.5mm and 4.5μm respectively. The row electrodes may be around 20 to 30μm in width at the display pixel region but may be reduced in width at the vicinity of the chips 21 for packing purposes.

The material of the seal 16 has a width of approximately 3mm and extends completely over the recess 22 so as to cover directly the top and side exposed surfaces of the ICs 21 and also to fill in the exposed edges of the recess, i.e. adjacent the sloping sidewalls, with the opposing sides of the seal lying on the upper surface of the support 14, as shown in Figure 2. Thus, the IC chips 21 are effectively encapsulated, at least partially, in seal material. The material of the seal can comprise an epoxy or U-V sensitive glue, or any other known LCD sealant material whose characteristics, for example thermal matching with the IC chips, render it suitable. When using epoxy sealing materials or the like which contract upon curing, such contraction assists in supporting and protecting the chips and ensures that the chips are held firmly, under compression, against the support 14 so that reliable connections with the underlying electrodes are maintained.

As the surfaces of the IC chips 21 are substantially flush with the surface of the support 14, the thickness of the seal extending along this edge and the other edges of the panel is substantially constant. Moreover, the width of the seal required, around for example 3mm, is similar to conventional seal widths so a seal of substantially uniform dimensions can be employed completely around the periphery of the two supports. The width of the projecting edge 20 of the support 14 is selected so as to be just sufficient to enable the bonding for external connections to the supply electrodes.

The active matrix circuitry, including the internal row electrodes and the external supply electrodes, is fabricated on the support 14 after forming the recess 22. Thereafter, the IC chips 21 are mounted in the recess. Assembly of the panel then entails the provision of the seal 16 and bonding of the upper support 12, the evacuation of the internal space and introduction of LC material into the internal space to form the LC cell.

While in the above - described embodiment, the IC chips comprising the row drive circuit are located in a recess and covered by the seal, it will be appreciated that same approach can be utilised for providing instead, or in addition, the column drive circuit which supplies data voltage signals for the pixels to the column address conductors 32. In this case, a similar linear recess is provided in the support 14 at the seal line along an edge adjacent to the ends of the column address electrodes 32 into which the column electrodes and supply lines for the column drive circuit extend and the plurality of juxtaposed semiconductor IC chips, together constituting the column drive circuit and each comprising for example one or more shift register/sample and hold circuits of generally conventional form, are mounted in the recess appropriately contacting their respective column electrodes and supply lines. This edge of the support, on which the supply lines for the column driver chips are carried, would project out beyond the corresponding edge of the support 12 in similar manner to the projection 20, as shown in Figure 1. In some types of LCDs, it may be necessary to drive some of the column electrodes from one side of the array and the remaining column electrodes from the opposite side in which case the column drive IC chips may be split into two groups carried in respective recesses arranged at opposing sides of the array. The switch devices associated with the pixels need not be TFTs but could comprise for example two terminal non-linear switching devices such as thin film diodes or MIMs. The invention can be applied, of course, to LC display devices other than the active matrix type. In a simple, passive type of matrix display device which comprises a set of row electrodes on one support and a set of column conductors on the other support which cross one another and define at their intersections individually addressable display pixels, then unencapsulated IC chips constituting the row and/or column driver circuits can be provided in similar fashion with the row drive IC chips being mounted in a recess in one support beneath the seal line and the column drive IC chips being mounted in a recess in the other support also beneath the seal line.

The display device need not be a matrix (row and column) display device but could be of the kind having display pixels arranged to define, for example, seven - segment characters and having, on one support, sets of seven - segment electrodes each with an extension track or line leading to an edge of the support on the other support a electrode common to the seven - segment electrodes with a extension track leading to the edge of that support. In this case, a semiconductor drive IC chip for the segment electrodes can be provided in a recess in the one support beneath the seal line and contacting the extension tracks, and supply lines, to which power of control signals for the drive IC are applied, which extend into the recess.

To summarise, therefore, in an LCD a drive IC in chip form is disposed in a recess in one support beneath the seal line and connected between internal pixel addressing electrodes and external supply electrodes carried on the support with the seal material extending over the recess and serving to encapsulate, and protect, the chip. In a matrix display device a plurality of chips can be carried in an elongated recess beneath the seal line which together constitute the row driver and/or column driver circuits. From reading the present disclosure, other modifications will be apparent to persons skilled in the art. Such modifications may involve other features which are already known in the field of LCDs and component parts thereof and which may be used instead of or in addition to features already described herein.

Claims

1. A liquid crystal display device comprising a pair of supports which are bonded together by a peripheral seal and between which liquid crystal material is disposed and contained by the seal, at least one of the supports carrying on one of its surfaces a plurality of electrodes internally of the seal, a plurality of electrodes externally of the seal, and a drive IC chip operatively connected to the internal and external electrodes, characterised in that the IC chip is carried in a recess in the one support and the seal extends over the recess and covers the chip.

2. A liquid crystal display device according to Claim 1 , characterised in that the recess is elongated and at least one further IC chip is carried in the recess which is covered by the seal and is connected to different electrodes extending from the recess internally of the seal.

3. A liquid crystal display device according to Claim 1 or Claim 2, characterised in that the electrodes internally of the seal extend over a sloping sidewall of the recess to the bottom of the recess where they are electrically connected to contacts of the IC chip.

4. A liquid crystal display device according to any one of Claims 1 to 3, characterised in that the top of the IC chip is approximately level with the surface of the one support.

5. A liquid crystal display device according to any one of the preceding claims, characterised in that the device comprises a row and column array of display pixels addressed via sets of row electrodes and column electrodes and in that the IC chip comprises a row drive circuit and is connected to row address electrodes for supplying selection signals thereto.

6. A liquid crystal display device according to any one of Claims 1 to 4, characterised in that the device comprises a row and column array of display pixels addressed via sets of row electrodes and column electrodes and in that the IC chip comprises a column drive circuit and is connected to the column address electrodes for supplying data signals thereto.