WO1999061998A2 - Ordinateurs de reseau a couverture mondiale - Google Patents

Ordinateurs de reseau a couverture mondiale Download PDF

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Publication number
WO1999061998A2
WO1999061998A2 PCT/US1999/011206 US9911206W WO9961998A2 WO 1999061998 A2 WO1999061998 A2 WO 1999061998A2 US 9911206 W US9911206 W US 9911206W WO 9961998 A2 WO9961998 A2 WO 9961998A2
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WO
WIPO (PCT)
Prior art keywords
network
personal computers
slave
personal
shared
Prior art date
Application number
PCT/US1999/011206
Other languages
English (en)
Other versions
WO1999061998A3 (fr
WO1999061998A9 (fr
Inventor
Ellis E. Frampton, Iii
Original Assignee
Frampton Ellis E Iii
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/085,755 external-priority patent/US7634529B2/en
Priority claimed from US09/213,875 external-priority patent/US6725250B1/en
Priority claimed from PCT/US1998/027058 external-priority patent/WO1999032972A1/fr
Application filed by Frampton Ellis E Iii filed Critical Frampton Ellis E Iii
Priority to EP99925711A priority Critical patent/EP1078320A2/fr
Priority to CN 99806522 priority patent/CN1302403A/zh
Priority to JP2000551330A priority patent/JP2003524808A/ja
Priority to CA002330952A priority patent/CA2330952A1/fr
Priority to AU41944/99A priority patent/AU4194499A/en
Publication of WO1999061998A2 publication Critical patent/WO1999061998A2/fr
Publication of WO1999061998A3 publication Critical patent/WO1999061998A3/fr
Publication of WO1999061998A9 publication Critical patent/WO1999061998A9/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/02—Network architectures or network communication protocols for network security for separating internal from external traffic, e.g. firewalls
    • H04L63/0209—Architectural arrangements, e.g. perimeter networks or demilitarized zones
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5072—Grid computing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/10—Protocols in which an application is distributed across nodes in the network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/50—Indexing scheme relating to G06F9/50
    • G06F2209/5017—Task decomposition
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/02—Network architectures or network communication protocols for network security for separating internal from external traffic, e.g. firewalls
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/14—Multichannel or multilink protocols
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
    • H04L69/329—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the application layer [OSI layer 7]

Definitions

  • This invention generally relates to one or more computer networks having computers like personal computers or network computers such as servers with microprocessors preferably linked by broadband transmission means and having hardware, software, firmware, and other means such that at least two parallel processing operations occur that involve at least two sets of computers in the network or m networks connected together, a form of etacomputing . More particularly, this invention relates to one or more large networks composed of smaller networks and large numbers of computers connected, like the Internee, wherein more than one separate parallel or massively parallel processing operation involving more than one different set of computers occurs simultaneously.
  • this invention relates to one or more such networks wherein more than one (or a very large number of) parallel or massively parallel microprocessing processing operations occur separately or m an interrelated fashion; and wherein ongoing network processing linkages are established between virtually any microprocessors of separate computers connected to the network.
  • this invention relates generally to a network structure or architecture that enables the shared used of network microprocessors for parallel processing, including massive parallel processing, and other shared processing such as multitasking, wherein personal computer owners provide microprocessor processing power to a network, preferably for parallel or massively parallel processing or multitasking, in exchange for network linkage to other personal and other computers supplied by network providers such as Internet Service Providers (ISP's) , including linkage to other microprocessors for parallel or other processing such as multitasking.
  • ISP's Internet Service Providers
  • the financial basis of the shared use between owners and providers being be whatever terms to which the parties agree, subject to governing laws, regulations, or rules, including payment from either party to the other based on periodic measurement of net use or provision of processing power like a deregulated electrical power grid or preferably involving no payment, with the network system (software, hardware, etc) providing an essentially equivalent usage of computing resources by both users and providers (since any network computer operated by either entity is potentially both a user and provider of computing resources alternately (or even simultaneously, assuming multitasking) , with potentially an override option by a user (exercised on the basis, for example, of user profile or user's credit line or through relatively instant payment) .
  • this invention relates to a network system architecture including hardware and software that provides use of the Internet or its future equivalents or successors (and most other networks) without cost to most users of personal computers or most other computers, while also providing those users (and all other users, including of supercomputers) with computer processing performance that at least doubles every 18 months through metacomputing means.
  • This metacomputing performance increase provided by the new Metalnternet (or Metanet for short) is in addition to all other performance increases, such as those already anticipated by Moore's Law.
  • microprocessor computing speeds whether measured m simple clock speed or MIPS (millions of instructions for second) or numbers of transistors per chip.
  • MIPS millions of instructions for second
  • performance has improved by four or five times every three years since Intel launched its X86 family of microprocessors used m the currently dominant "Wmtel" standard personal computers.
  • the initial Intel Pentium Pro microprocessor was introduced m 1995 and is a thousand times faster than the first IBM standard PC microprocessor, the Intel 8088, which was introduced in 1979.
  • the fastest of microprocessors like Digital Equipment Corp . ' s Alpha chip, is faster than the processor m the original Cray Y-MP supercomputer, as is even the Nintendo 64 video game system.
  • a second manor development trend m the past decade or so has been the rise of parallel processing, a computer architecture utilizing more than one CPU microprocessor (often many more, even thousands of relatively simple microprocessors, for massively parallel processing) linked together into a single computer with new operating systems having modifications that allow such an approach.
  • the field of supercomputmg has been taken over by this approach, including designs utilizing many identical standard personal computer microprocessors.
  • Hardware, firmware, software and other components specific to parallel processing are m a relatively early stage of development compared to that for single processor computing, and therefore much further design and development is expected in the future to better maximize the computing capacity made possible by parallel processing.
  • a form of parallel processing called superscalar processing is also being employed within microprocessor design itself.
  • the current generation of microprocessors such at the Intel Pentium have more than one data path within the microprocessor in which data is processed, with two to three paths being typical now and as many as eight in 1998 in IBM's new Power 3 microprocessor chip.
  • the third major development trend is the increasing size of bandwidth, which is a measure of communications power or transmission speed (in terms of units of data per second) between computers connected by a network.
  • bandwidth is a measure of communications power or transmission speed (in terms of units of data per second) between computers connected by a network.
  • the local area networks and telephone lines typically linking computers including personal computers have operated at speeds much lower than the processing speeds of a personal computer.
  • a typical 1997 Intel Pentium operates at 100 MIPS (millions of instructions per second)
  • the most common current Ethernet connecting PC's is roughly 10 times slower at 10 megabits per second (Mbps) , although some Ethernet connections are now 100 Mbps) and telephone lines are very much slower, the highest typical speed in 1998 being about 56 kilobits (reached only during downloads, however) .
  • ATM asynchronous transfer mode
  • digital signal processors which are improving their price/performance tenfold every two years, are also supporting the rapid increase in bandwidth.
  • the increase in bandwidth reduces the need for switching and switching speed will be greatly enhanced when practical optical switches are introduced in the fairly near future, potentially reducing costs substantially.
  • the system bus of a computer is its internal network connecting many or most of its internal components such as microprocessor, random access memory (RAM) , hard-drive, modem, floppy drive, and CD-ROM; for recent personal computers it has been only about 40 megabits per second, but is up to 133 megabits per second on Intel's Pentium PCI bus in 1995.
  • IBM's 1998 Power3 microprocessor chip has a system bus of 1.6 gigabits per second and is now up to a gigabit per second on Intel's Pentium PCI bus.
  • PC idle time does not in effect store a PC, saving it for future use, since the principle limiting factor to continued use of today's PC's is obsolescence, not equipment failure from use.
  • Moore's Law which as noted above holds that the constant miniaturization of circuits results in a doubling of computing power every 18 months, cannot continue to hold true much longer. Indeed, Moore's Law may now be nearing its limits for silicon-based devices, perhaps by as early as 2004, and no new technologies have yet emerged that currently seem with reasonable certainty to have the potential for development to a practical level by then, although many recent advances have the potential to maintain Moore's Law.
  • the solution is use those mostly idle PC's (or their equivalents or successors) to build a parallel or massively parallel processing computer utilizing a very large network like the Internet or, more specifically, like the World Wide Web (WWW) , or their equivalents or eventual successors like the Internet or, more specifically, like the World Wide Web (WWW) , or their equivalents or eventual successors like the Internet or, more specifically, like the World Wide Web (WWW) , or their equivalents or eventual successors like the
  • Metalnternet (and including Internet II and the Next Generation Internet, which are under development now and which will utilize much broader bandwidth and will coexist with the Internet, the structure of which is in ever constant hardware and software upgrade and including the Superlnternet based on essentially all optical fiber transmission) with extremely broad bandwidth connections and virtually unlimited data transmission speed.
  • the prime characteristic of the Internet is of course the very large number of computers of all sorts already linked to it, with the future potential for effectively universal connection; it is a network of networks of computers that provides nearly unrestricted access (other than cost) worldwide.
  • the soon-to-be widely available very broad bandwidth of network communications is used to link personal computers externally m a manner at least equivalent, and probably much faster, to the faster internal system buses of the personal computers, so that no external processing constraint will be imposed on linked personal computers by data input or output, or throughput; the speed of the microprocessor itself is the only processing constraint of the system.
  • This makes efficient external parallel processing possible including massively parallel processing, m a manner paralleling more conventional internal parallel processing, call superscalar processing.
  • the World Wide Web (or its equivalents or successors) is transformed into a huge virtual massively parallel processing computer or computers, with potential through its established hyperlinks connections to operate m a manner at least somewhat like a neural network or neural networks, since the speed of transmission m the broadband linkages is so great that any linkage between two microprocessors is virtually equivalent to direct, physically close connections between those microprocessors.
  • digital signal processor-type microprocessors and/or analogue microprocessors may be particularly advantageous for this approach, either alone or in conjunction with conventional microprocessors and/or those new microprocessors described m this application.
  • Networks with WWW-type hyperlinks incorporating digital signal processor-type microprocessor (or successors or equivalents) could operate separately from networks of conventional microprocessors (or successors or equivalents) or with one or more connections between such differing networks or with relatively complete integration between such differing networks. Simultaneous operation across the same network connection structure should be possible, employing non- interfering transmission links.
  • the metacomputmg hardware and software means of the Metalnternet provides performance increases that is likely to at least double every eighteen months based on the doubling of personal computers shared m a typical parallel processing operation by a standard PC user, starting first with at least 2 PC's, then about 4, about 8, about 16, about 32, about 64, about 128, about 256, and about 512, for example. After about fifteen years, for example, it is anticipated that each standard PC user will likely be able to use about 1024 personal computers for parallel processing or any other shared computing use, while generally using the Internet or its successors like the Metalnternet for free.
  • supercomputers experience a similar performance increase generally, but ultimately the performance increase is limited primarily by cost of adding temporary network linkages to available PC's, so there is definite potential for a quantum leap in supercomputer performance.
  • Network computer systems as described above offer almost limitless flexibility due to the abundant supply of heretofore idle connected microprocessors .
  • This advantage allows "tightly coupled" computing problems (which normally are difficult to process in parallel) to be solved without knowing in advance
  • processors are available, what they are and their connection characteristics.
  • a minimum number of equivalent processors are easily found nearby in a massive network like the Internet and assigned within the network from those multitudes available nearby.
  • the number of microprocessors used are almost completely flexible, depending on the complexity of the problem, and limited only by cost.
  • the existing problem of time delay is solved largely by the widespread introduction of broad bandwidth connections between computers processing in parallel .
  • Figure 1 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a meter means which measures flow of computing during a shared operation such as parallel processing between a typical PC user and a network provider.
  • Figure 2 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of another meter means which measures the flow of network resources, including shared processing, being provided to a typical PC user and a network provider.
  • Figure 3 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of another meter means which, prior to execution, estimates the level of network resources, and their cost, of a shared processing operation requested by a typical PC user from a network provider.
  • Figure 4A-4C are simplified diagrams of a section of a computer network, such as the Internet, showing in a sequence of steps an embodiment of a selection means whereby a shared processing request by a PC is matched with a standard preset number of other PC's to execute shared operation.
  • Figure 5 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a control means whereby the PC, when idled by its user, is made available to the network for shared processing operations.
  • Figure 6 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a signal means whereby the PC, when idled by its user, signals its availability to the network for shared processing operations .
  • Figure 7 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a receiver and/or interrogator means whereby the network receives and/or queries the availability for shared processing status of a PC within the network.
  • Figure 8 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a selection and/or utilization means whereby the network locates available PC's in the network that are located closest to each other for shared processing.
  • Figure 9 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a system architecture for conducting a request imitated by a PC for a search using parallel processing means that utilizes a number of networked PC's.
  • FIGS 10A-10I are simplified diagrams of a section of a computer network, such as the Internee, showing an embodiment of a system architecture utilizing a firewall to separate that part of a networked PC (including a system reduced in size to a microchip) that is accessible to the network for shared processing from a part that is kept accessible only to the PC user; also showing the alternating role that preferably each PC in the network plays as either a master or slave in a shared processing operation involving one or more slave PC's in the network; and showing a home or business network system, which can be configured as an Intranet; m addition, showing PC and PC microchips controlled by a controller (including remote) with limited or no processing capability; and showing PC and PC microchips in which a firewall 50 is can be reconfigured by a PC user.
  • a firewall 50 is can be reconfigured by a PC user.
  • Figure 11 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a system architecture for connecting clusters of PC's to each other by wireless means, to create the closest possible (and therefore fastest) connections.
  • Figure 12 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a system architecture for connecting PC's to a satellite by wireless means.
  • Figure 13 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a system architecture providing a cluster of networked PC's with complete interconnectivity by wireless means.
  • Figure 14A is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a transponder means whereby a PC can identify one or more of the closest available PC's in a network cluster to designate for shared processing by wireless means.
  • Figure 14B shows clusters connected wirelessly;
  • Figure 14C shows a wireless cluster with transponders and with a network wired connection to Internet;
  • Figure 14D shows a network client/server wired system with transponders.
  • Figure 15 is a simplified diagram of a section of a computer network, such as the Internet, showing an embodiment of a routing means whereby a PC request for shared processing is routed within a network using preferably broad bandwidth connection means to another area in a network with one or more idle PC's available.
  • Figures 16A-16Z and 16AA show a new hierarchical network architecture for personal computers and/or microprocessors based on subdivision of parallel processing or multi-tasking operations through a number of levels down to a processing level .
  • Figures 17A-17D show a firewall 50 with a dual function, including that of protecting Internet users (and/or other network users sharing use) of one or more slave personal computers PC 1 or microprocessors 40 from unauthorized surveillance or intervention by an owner/operator of those slave processors.
  • Figures 18A-18D show designs for one or more virtual quantum computers integrated into one or more digital computers .
  • Figure 19 shows special adaptations to allow the use of idle automobile computers to be powered and connected to the Internet (or other net) for parallel or multi-tasking processing.
  • Figures 20A and 2 OB show separate broad bandwidth outputs such as an optical connection like glass fiber from each microprocessor 40 or 94.
  • the new network computer utilizes PC's as providers of computing power to the network, not just users of network services. These connections between network and personal computer are enabled by a new form of computer/network financial structure that is rooted on the fact that economic resources being provided the network by PC owners (or leaser) are similar in value to those being provided by the network provider providing connectivity.
  • This new network operates with a structural relationship that is roughly like that which presently exists between an electrical power utility and a small independent power generator connected to a deregulated utility's electrical power grid, wherein electrical power can flow in either direction between utility and independent generator depending on the operating decisions of both parties and at any particular point in time each party is in either a debt or credit position relative to the other based on the net direction of that flow for a given period, and is billed accordingly.
  • electrical power both its creation and transmission
  • a network provider or Internet service provider is defined in the broadest possible way as any entity (corporation or other business, government, not-for-profit, cooperative, consortium, committee, association, community, or other organization or individual) that provides personal computer users (very broadly defined below) with initial and continuing connection hardware and/or software and/or firmware and/or other components and/or services to any network, such as the Internet and WWW or Internet II or Next Generation Internet or their present or future equivalents, coexistors or successors, like the herein proposed Metalnternet , including any of the current types of Internet access providers (ISP's) including telecommunication companies, television cable or broadcast companies, electrical power utilities or other related companies, satellite communications companies, or their present or future equivalents, co
  • ISP Internet service provider
  • connection means used in the networks of the network providers is preferably very broad bandwidth, including electromagnetic connections such as optical connection, including fiber optic cable or wireless for example, but not excluding any other electromagnetic or other means, including television coaxial cable and telephone twisted pair, as well as associated gateways, bridges, routers, and switches with all associated hardware and/or software and/or firmware and/or other components and their present or future equivalents or successors .
  • the computers used by the providers include any current or future computers, including such current examples as mainframes, minicomputers, servers, and personal computers, and associated their associated hardware and/or software and/or firmware and/or other components, and their present or future equivalents or successors.
  • Levels of network control beyond the network provider also exist to control any aspect of the network structure and function, any one of which levels may or may not control and interact directly with the PC user.
  • at least one level of network control like the World Wide Web Consortium (W3C) or Internet Society (ISOC) or other ad hoc industry consortia establish and ensure compliance with any prescribed network standards and/or protocols and/or industry standard agreements for any hardware and/or software and/or firmware and/or other component connected to the network.
  • W3C World Wide Web Consortium
  • ISOC Internet Society
  • other levels of network control can deal with administration and operation of the network.
  • These other levels of network control can potentially be constituted by any network entity, including those defined immediately above for network providers .
  • the principal defining characteristic of the network herein described being communication connections (including hardware and/or software and/or firmware and/or other component) of any form, including electromagnetic (such as light and radio or microwaves) and electrochemical (and not excluding biochemical or biological) , between PC users and their computers, with connection (either directly or indirectly) to the largest number of users and their computers possible being highly advantageous, such as networks like the Internet (and Internet II and the Next Generation Internet) and WWW and equivalents and successors, like the Metalnternet. Multiple levels of such networks will likely coexist with different technical capabilities, like Internet and Internet II, but would certainly have interconnection and therefore would certainly communicate freely between levels, for such standard network functions as electronic mail, for example.
  • a personal computer (PC) user is defined in the broadest possible way as any individual or other entity routinely using a personal computer, which is defined as any computer, digital or analog or neural or quantum, particularly including personal use microprocessor-based personal computers having one or more microprocessors (each including one or more parallel processors) in their general current form (hardware and/or software and/or firmware and/or any other component) and their present and future equivalents or successors, such as application-specific (or several application) computers, network computers, handheld personal digital assistants, personal communicators such as telephones and pagers, wearable computers, digital signal processors, neural -based computers (including PC's) , entertainment devices such as televisions and associated cable digital set-top control boxes, video tape recorders, video games, videocams, compact or digital video disk (CD or DVD) player/recorders, radios and cameras, other household electronic devices, business electronic devices such as printers, copiers, fax machines, automobile or other transportation equipment devices, robots, and other current or successor devices incorporating one or
  • While not personal computers due generally to high cost
  • mainframe computers, minicomputers, workstations, and even supercomputers are also be included with PCs in a parallel processing network, since they can be used functionally in the same general way in the network as a PC.
  • Such personal computers as defined above have owners or leasers, which may or may not be the same as the computer users.
  • Continuous connection of computers to the network, such as the Internet, WWW, or equivalents or successors, is preferred, but clearly not required, since connection can also be made at the initiation of a shared processing operation.
  • Parallel processing is defined as one form of shared processing involving two or more microprocessors used in solving the same computational problem or other task. Massively parallel microprocessor processing involves large numbers of microprocessors. In today's technology, massive parallel processing is probably to be considered to be about 64 microprocessors (referred to in this context as nodes) and over 7,000 nodes have been successfully tested in an Intel supercomputer design using PC microprocessors (Pentium Pros) . It is anticipated that continued software improvements will make possible effective use of a much larger number of nodes, very possibly limited only by the number of microprocessors available for use on a given network, even an extraordinarily large one like the Internet or its equivalents and/or successors, like the Metalnternet.
  • Broadband wavelength or broad bandwidth network transmission is defined here to mean a transmission speed (usually measured in bits per second) that is at least high enough (or roughly at least equivalent to the internal clock speed of the microprocessor or microprocessors times the number of microprocessor channels equaling instructions per second or operations per second or calculations per second) so that the processing input and output of the microprocessor is substantially unrestricted, particularly including at peak processing levels, by the bandwidth of the network connections between microprocessors that are performing some form of parallel processing, particularly including massive parallel processing. Since this definition is dependent on microprocessor speed, it increases as microprocessor speeds increase. A rough example might be a 1996 era 100 MIPS
  • microprocessor for which a broad bandwidth connection is greater than 100 megabytes per second (MBps) ; this is a rough approximation.
  • connection means is a light wave or optical connection such as fiber optic cable, which in 1996 already provided multiple gigabit bandwidth on single fiber thread and is rapidly improving significantly on a continuing basis, so the currently preferred general use of optical fiber connections between PCs virtually assures broad bandwidth for data transmission that is far greater than microprocessor speed to provide data to be transmitted.
  • new wired optical connections m the form of thin, mirrored hollow wires or tubes called omniguides offer even much greater bandwidth than optical fiber and without need of amplification when transmitting over distances, unlike optical fiber.
  • the connection means to provide broad bandwidth transmission is either wired or wireless, with wireless generally preferred for mobile personal computers (or equivalents or successors) and as otherwise indicated below.
  • Wireless connection bandwidth is also increasing rapidly and is considered to offer essentially the same benefit as fiber optic cable: data transmission speed that far exceeds data processing speed.
  • the financial basis of the shared use between owners/ leasers and providers is whatever terms to which the parties agree, subject to governing laws, regulations, or rules, including payment from either party to the other based on periodic measurement of net use or provision of processing power, m a manner like an deregulated or open market electrical power grid.
  • meter device 5 (comprised of hardware and/or software and/or firmware and/or other component) to measure the flow of computing power between PC 1 user and network 2 provider, which might provide connection to the Internet and/or World Wide Web and/or Internet II and/or any present or future equivalent or successor 3, like the Metalnternet.
  • the PC user should be measured by some net rating of the processing power being made available to the network, such as net score on one or more standard tests measuring speed or other performance characteristics of the overall system speed, such as PC Magazine's benchmark test program, ZD Winstone (potentially including hardware and/or software and/or firmware and/or other component testing) or specific individual scores for particularly important components like the microprocessor (such as MIPS or millions of instructions per second) that may be of application-specific importance, and by the elapsed time such resources were used by the network.
  • net rating of the processing power being made available to the network such as net score on one or more standard tests measuring speed or other performance characteristics of the overall system speed, such as PC Magazine's benchmark test program, ZD Winstone (potentially including hardware and/or software and/or firmware and/or other component testing) or specific individual scores for particularly important components like the microprocessor (such as MIPS or millions of instructions per second) that may be of application-specific importance, and by the elapsed time such resources were used by the network.
  • such a meter need measure only the time the PC was made available to the network for processing 4, which can be used to compare with time the PC used the network (which is already normally measured by the provider, as discussed below) to arrive at a net cost; potential locations of such a meter include at a network computer such as a server, at the PC, and at some point on the connection between the two. Throughput of data in any standard terms is another potential measure.
  • a meter device 7 (comprised of hardware and/or software and/or firmware and/or other component) that measures the amount of network resources 6 that are being used by each individual PC 1 user and their associated cost. This includes, for example, time spent doing conventional downloading of data from sites in the network or broadcast from the network 6.
  • metering devices currently exist to support billing by the hour of service or type of service is common in the public industry, by providers such as America Online, CompuServe, and Prodigy. The capability of such existing devices is enhanced to include a measure of parallel processing resources that are allocated by the Internet Service Provider or equivalent to an individual PC user from other PC users 6, also measuring simply in time.
  • a meter 10 also estimates to the individual PC user prospectively the amount of network resources needed to fulfill a processing request from the PC user to the network (provider or other level of network control) and associated projected cost, provide a means of approving the estimate by executing the request, and a realtime readout of the cost as it occurs (alternatively, this meter might be done only to alert 9 the PC user that a given processing request 8 falls outside normal, previously accepted parameters, such as level of cost) .
  • a priority or time limit and depth of search should optimally be criteria or limiting parameters that the user can determine or set with the device.
  • the network involves no payment between users and providers, with the network system (software, hardware, etc) providing an essentially equivalent usage of computing resources by both users and providers (since any network computer operated by either entity can potentially be both a user and provider of computing resources (even simultaneously, assuming multitasking) , with potentially an override option by a user (exercised on the basis, for example, of user profile or user's credit line or through relatively instant payment).
  • the network system software, hardware, etc
  • the priority and extent of use of PC and other users can be controlled on a default-to-standard-of-class-usage basis by the network
  • a default basis is to expend up to a PC's or other user's total credit balance with the provider described above and the network provider then to provide further prescribed service on an debt basis up to some set limit for the user; different users might have different limits based on resources and/or credit history.
  • a specific category of PC user based, for example, on specific microprocessor hardware owned or leased, might have access to a set maximum number of parallel PC's or microprocessors, with smaller or basic users generally having less access and vice versa.
  • Specific categories of users might also have different priorities for the execution of their processing by the network.
  • a very wide range of specific structural forms between user and provider are possible, both conventional and new, based on unique features of the new network computer system of shared processing resources.
  • a standard PC 1 user request 11 for a use involving parallel processing might be defaulted by system software 13, as shown in Fig. 4B, to the use of only one other essentially identical PC 1 2 microprocessor for parallel processing or multitasking, as shown in Figure 4C; larger standard numbers of PC microprocessors, such as about three PC's at the next level, as shown in later Figure 10G (which could also illustrate a PC 1 user exercising an override option to use a level of services above the default standard of one PC microprocessor, presumably at extra cost) , for a total of about four, then about 8, about 16, about 32, about 64 and so on, or virtually any number in between, is made available as the network system is upgraded in simple phases over time, as well as the addition of sophisticated override options.
  • PC microprocessors can be made available to the standard PC user (virtually any number) , preferably starting at about 128, then about 256, then about 512, then about 1024 and so on over time, as the network and all of its components are gradually upgraded to handle the increasing numbers.
  • System scalability at even the standard user level is essentially unlimited over time.
  • connection to the Internet can be at no cost to PC users, since in exchange for such Internet access the PC users can generally make their PC, when idle, available to the network for shared processing.
  • competition between Internet Service Providers (including present and future equivalents and successors) for PC user customers can be over such factors as the convenience and quality of the access service provided and of shared processing provided at no addition cost to standard PC users, or on such factors as the level of shared processing in terms, for example of number of slave PC's assigned on a standard basis to a master PC.
  • the ISP's can also compete for parallel processing operations, from inside or outside the ISP Networks, to conduct over their networks.
  • a (hardware and/or software and/or firmware and/or other) controlling device to control access to the user's PC by the network.
  • the PC user could set this controller device to make the PC available to the network when not in use by the PC user.
  • the PC user could set the controller device to make the PC available to the network whenever in an idle state, however momentary, by making use of multitasking hardware and/or software and/or firmware and/or other component (broadcast or "push" applications from the Internet or other network could still run in the desktop background) .
  • Such shared processing can continue until the device 12 detects the an application being opened 16 in the first PC (or at first use of keyboard, for quicker response, in a multitasking environment) , when the device 12 signals 17 the network computer such as a server 2 that the PC is no longer available to the network, as shown m Figure 5B, so the network can then terminate its use of the first PC.
  • the network computer such as a server 2 that the PC is no longer available to the network, as shown m Figure 5B
  • the transponder device is resident m the user PC and broadcast its idle state or other status (upon change or periodically, for example) or respond to a query signal from a network device.
  • a (hardware/software and/or firmware and/or other component) transponder device 21 resident in a part of the network (such as network computer, switch, router, or another PC, for examples) that receives 22 the PC device status broadcast and/or queries 26 the PC for its status, as shown m Figure 7.
  • the network also has resident in a part of its hardware and/or software (and/or firmware and/or other components) a capacity such as to allow it to most effectively select and utilize the available user PC's to perform parallel processing initiated by PC users or the network providers or others.
  • the network should have the (hardware and/or software and/or firmware and/or other component) capability of locating each PC accurately at the PC's position on the geographic grid lines/connection means 23 so that parallel processing occurs between PC's (PC 1 and PC 1 2 ) as close together as possible, which should not be difficult for PC's at fixed sites with a geographic location, customarily grouped together into cells 24, as shown in Figure 8, but which requires an active system for any wireless microprocessor to measure its distance from its network relay site, as discussed below in Figure 14.
  • One of the primary capabilities of the Internet (or Internet II or successor, like the Metalnternet) or WWW network computer is to facilitate searches by the PC user or other user.
  • searches are particularly suitable to multiple processing, since, for example, a typical search is to find a specific Internet or WWW site with specific information.
  • site searches can be broken up geographically, with a different PC processor 1' allocated by the network communicating through a wired means 99 as shown (or wireless connections) to search each area, the overall area being divided into eight separate parts, as shown, which are preferably about equal, so that the total search would be about 1/8 as long as if one processor did it alone (assuming the PC 1 microprocessor provides control only and not parallel processing, which may be preferable in some case) .
  • a single PC user might need 1,000 minutes of search time to find what is requested, whereas the network computer, using multiple PC processors, might be able to complete the search m 100 minutes using 10 processors, or 10 minutes using 100 processors or 1 minute using 1,000 processors (or even 1 second using 60,000 processors) ; assuming performance transparency, which should be achievable, at least over time.
  • the network's external parallel processing is optimally completely scalable, with virtually no theoretical limit .
  • the above examples also illustrates a tremendous potential benefit of network parallel processing. The same amount of network resources, 60,000 processor seconds, was expended in each of the equivalent examples.
  • the network can provide the user with relatively immediate response with no difference m cost (or relatively little difference) -- a major benefit.
  • m cost or relatively little difference
  • each PC user linked to the network providing external parallel processing becomes, m effect, a virtual supercomputer!
  • supercomputers can experience a similar quantum leap m performance by employing a thousand- fold (or more) increase m microprocessors above current levels.
  • WWW World Wide Web
  • Such enhanced capabilities for searching (and analysis) can also fundamentally alter the relationship of buyers and sellers of any items and/or services.
  • massive parallel network processing can make it possible to find the best price, worldwide, for any product or the most highly rated product or service (for performance, reliability, etc.) within a category or the best combination of price/performance or the highest rated product for a given price point and so on.
  • the best price for the product can include best price for shipping within specific delivery time parameters acceptable to the buyer.
  • the Internet or WWW network computer system like the Metalnternet can potentially put into the hands of the PC user an extraordinary new level of computer power vastly greater than the most powerful supercomputer existing today.
  • the world's total of microchips is already about 350 billion, of which about 15 billion are microprocessors of some kind (most are fairly simple "appliance" type running wrist watches, televisions, cameras, cars, telephones, etc) .
  • the Internet/Internet II/WWW could easily have a billion individual PC users, each providing a average total of at least 10 highly sophisticated microprocessors (assuming PC's with at least 4 microprocessors (or more, such as 16 microprocessors or 32, for example) and associated other handheld, home entertainment, and business devices with microprocessors or digital processing capability, like a digital signal processor or successor devices) . That results in a global computer a decade from now made of at least 10 billion microprocessors, interconnected by electromagnetic wave means at speeds approaching the speed of light.
  • a typical supercomputer today utilizing the latest PC microprocessors has less than a hundred.
  • a peak maximum of perhaps 1 billion microprocessors can be made available for a network supercomputer user, providing it with the power 10,000,000 times greater than is available using current conventional internal parallel processing supercomputers (assuming the same microprocessor technology) .
  • resources made available by the network to the supercomputer user or PC user can be capable of varying significantly during any computing function, so that peak computing loads can be met with effectively whatever level of resources are necessary.
  • Figures 1-9 show embodiments of a system for a network of computers, including personal computers, comprising: means for network services including browsing functions, as well as shared computer processing such as parallel processing, to be provided to the personal computers within the network; at least two personal computers; means for at least one of the personal computers, when idled by a personal user, to be made available temporarily to provide the shared computer processing services to the network; and means for monitoring on a net basis the provision of the services to each the personal computer or to the personal computer user.
  • Figures 1-9 show embodiments including where the system is scalar in that the system imposes no limit to the number of the personal computers, including at least 1024 personal computers; the system is scalar in that the system imposes no limit to the number of personal computers participating in a single shared computer processing operation, including at least 256 personal computers; the network is connected to the Internet and its equivalents and successors, so that the personal computers include at least a million personal computers; the network is connected to the World Wide Web and its successors; the network includes at least one network server that participates in the shared computer processing.; the monitoring means includes a meter device to measure the flow of computing power between the personal computers and the network; the monitoring means includes a means by which the personal user of the personal computer is provided with a prospective estimate of cost for the network to execute an operation requested by the personal user prior to execution of the operation by the network; the system has a control means by which to permit and to deny access to the personal computers by the network for shared computer processing; access to the personal computers by the network is limited to
  • Figures 1-9 show embodiments of a system for a network of computers, including personal computers, comprising: means for network services including browsing functions, as well as shared computer processing such as parallel processing, to be provided to the personal computers within the network; at least two personal computers; means for at least one of the personal computers, when idled by a personal user, to be made available temporarily to provide the shared computer processing services to the network; and means for maintaining a standard cost basis for the provision of the services to each personal computer or to the personal computer user.
  • Figures 1-9 show embodiments including where the system is scalar in that the system imposes no limit to the number of personal computers, including at least 1,024 personal computers; the system is scalar in that the system imposes no limit to the number of the personal computers participating in a single shared computer processing operation, including at least 256 personal computers; the network is connected to the Internet and its equivalents and successors, so that the personal computers include at least a million personal computers; the standard cost is fixed; the fixed standard cost is zero; the means for maintaining a standard cost basis includes the use of making available a standard number of personal computers for shared processing by personal computers ; the network is connected to the World Wide Web and its successors; the personal user can override the means for maintaining a standard cost basis so that the personal user can obtain additional network services; the system has a control means by wnich to permit and to deny access to the personal computers by the network for shared computer processing; the personal computers having at least one microprocessor and communicating with the network through a connection means having a speed of data
  • Browsing functions generally include functions like those standard functions provided by current Internet browsers, such as Microsoft Explorer 3.0 or 4.0 and Netscape Navigator 3.0 or 4.0, including at least access to searching World Wide Web or Internet sites, exchanging E-Mail worldwide, and worldwide conferencing; an intranet network uses the same browser software, but might not include access to the Internet or WWW.
  • Shared processing includes parallel processing and multitasking processing involving more than two personal computers, as defined above.
  • the network system is entirely scalar, with any number of PC microprocessors potentially possible.
  • microprocessor or equivalent device that is designated, permanently or temporarily, to be a master 30 controlling device (comprised of hardware and/or software and/of firmware and/or other component) that remains unaccessible (preferably using a hardware and/or software and/or firmware and/or other component firewall 50) directly by the network but which controls the functions of the other, slave microprocessors 40 when the network is not utilizing them.
  • a typical PC 1 might have four or five microprocessors (even on a single microprocessor chip) , with one master 30 and three or four slaves 40, depending on whether the master 30 is a controller exclusively (through different design of any component part) , requiring four slave microprocessors 40 preferably; or the master microprocessor 30 has the same or equivalent microprocessing capability as a slave 40 and multiprocesses in parallel with the slave microprocessors 40, thereby requiring only three slave microprocessors 40, preferably.
  • the number of PC slave microprocessors 40 can be increased to virtually any other number, such as at least about eight, about 16, about 32, about 64, about 128, about 256, about 512, about 1024, and so on (these multiples are preferred as conventional in the art, but not clearly required; the PC master microprocessors 30 can also be increased. Also included is the preferred firewall 50 between master 30 and slave 40 microprocessors. As shown in preceding Figures 1-9, the PC 1 in Figure 10A is preferably connected to a network computer 2 and to the Internet or WWW or present or future equivalent or successor 3, like the Metalnternet .
  • PC hardware components such as hard drive 61, floppy diskette 62, compact disk-read only memory (CD-ROM) 63, digital video disk (DVD) 64, Flash memory 65, random access memory (RAM) 66, video or other display 67, graphics card 68, and sound card 69, as well as digital signal processor or processors, together with the software and/or firmware stored on or for them, can be located on either side of the preferred firewall 50, but such devices as the display 67, graphics card 68 and sound card 69 and those devices that both read and write and have non-volatile memory (retain data without power and generally have to written over to erase) , such as hard drive 62, Flash memory 65, floppy drive 62, read/write CD-ROM 63 or DVD 64 are preferred to be located on the PC user side of the firewall 50, where the master microprocessor is also located, as shown in Figure 10A, for security reasons primarily; their location can be flexible, with that capability controlled such as by password-authorized access.
  • CD-ROM compact disk
  • any or these devices that are duplicative (or for other exceptional needs) like a second hard drive 61' can be located on the network side of the firewall 50.
  • RAM 66 or equivalent or successor memory which typically is volatile (data is lost when power is interrupted) , should generally be located on the network side of the firewall 50, however some can be located with the master microprocessor to facilitate its independent use .
  • ROM devices including most current CD drives (CD-ROM's) 63' or DVD's (DVD-ROM) 64' or can be safely located on the network side of the firewall 50, since the data on those drives cannot be altered by network users; preemptive control of use preferably remains with the PC user.
  • at least a portion of RAM is can be kept on the Master 30 microprocessor side of the firewall 50, so that the PC user can use retain the ability to use a core of user PC 1 processing capability entirely separate from any network processing. If this capability is not desired, then the master 30 microprocessor can be moved to the network side of the firewall 50 and replaced with a simpler controller on the PC 1 user side, like the master remote controller 31 discussed below and shown in Figure 101.
  • the master microprocessor 30 might also control the use of several or all other processors 60 owned or leased by the PC user, such as home entertainment digital signal processors 70, especially if the design standards of such microprocessors in the future conforms to the requirements of network parallel processing as described above.
  • the PC master processor uses the slave microprocessors or, if idle (or working on low priority, deferable processing) , make them available to the network provider or others to use.
  • wireless connections 100 are expected to be extensively used in home or business network systems, including use of a master remote controller 31 without (or with) microprocessing capability, with preferably broad bandwidth connections such as fiber optic cable connecting directly to at least one component such as a PC 1, shown in a slave configuration, of the home or business personal network system; that preferred connection links the home system to the network 2 such as the Internet 3 , as shown in Figure 101.
  • a business system includes preferably fiber optic links to most or all personal computers PC 1 and other devices with microprocessors, such as printers, copiers, scanners, fax machines, telephone and video conferencing equipment; wireless links can be used also.
  • a PC 1 user can remotely access his networked PC 1 by using another networked master microprocessor 30 on another PC 1 and using a password or other access control means for entry to his own PC 1 master microprocessor 30 and files, as is common now in Internet and other access.
  • a remote user can simply carry his own files and his own master microprocessor or use another networked master microprocessor temporarily has his own.
  • Figure 10B the simplest configuration, as shown in Figure 10B, the
  • PC 1 has a single master microprocessor 30 and a single slave microprocessor 40, preferably separated by a firewall 50, with both processors used in parallel or multitasking processing or with only the slave 40 so used, and preferably connected to a network computer 2 and Internet 3 (and successors like the Metalnternet) . Virtually any number of slave microprocessors 40 is possible.
  • the other non-microprocessor components shown in Figure 10A above might also be included in this simple Figure 10B configuration.
  • microprocessors 90 are expected to integrate most or all of the other necessary computer components (or their present or future equivalents or successors) , like a PC's memory (RAM 66, graphics 82, sound 83, power management 84, network communications 85, and video processing 86, possibly including modem 87, flash bios 88, digital signal processor or processors 89, and other components or present or future equivalents or successors) and internal bus, on a single chip 90 (silicon, plastic, or other) , known in the industry as "system on a chip”.
  • RAM 66 random access memory
  • graphics 82 graphics 82
  • sound 83 sound 83
  • power management 84 network communications 85
  • video processing 86 possibly including modem 87, flash bios 88, digital signal processor or processors 89, and other components or present or future equivalents or successors
  • internal bus possibly including modem 87, flash bios 88, digital signal processor or processors 89, and other components or present or future equivalents or successors
  • Such a PC micro chip 90 preferably has the same architecture as that of the PC 1 shown above in Figure 10A: namely, a master control and/or processing unit 93 and one or more slave processing units 94 (for parallel or multitasking processing by either the PC 1 or the Network 2), preferably separated by a firewall 50 and preferably connected to a network computer 3 and the Internet 3 and successors like the Metalnternet.
  • a master control and/or processing unit 93 for parallel or multitasking processing by either the PC 1 or the Network 2
  • slave processing units 94 for parallel or multitasking processing by either the PC 1 or the Network 2
  • a firewall 50 preferably connected to a network computer 3 and the Internet 3 and successors like the Metalnternet.
  • existing PC components with mechanical components like hard drive 61, floppy or other removable diskette 62, CD-ROM 63 and DVD 64, which are mass storage devices with mechanical features that will likely not become an integral part of a PC "system of a chip” would preferably, of course, still be capable of connection to
  • the chip 90 has a single master unit 93 and at least one slave unit 94 (with the master having a controlling function only or a processing function also) , preferably separated by a firewall 50 and preferably connected to a network computer 3 and the Internet 3 (and successors like the Metalnternet) .
  • the other non-microprocessor components shown in Figure 10A above might also be included in this simple Figure 10D configuration.
  • any computer can potentially be both a user and provider, alternatively -- a dual mode operating capability.
  • any PC 1 within the network 2, preferably connected to the Internet 3 (and successors like the Metalnternet) can be temporarily a master PC 30 at one time initiating a parallel or multitasking processing request to the network 2 for execution by at least one slave PC 40, as shown in Figure 10E.
  • the same PC 1 can become a slave PC 40 that executes a parallel or multitasking processing request by another PC 1' that has temporarily assumed the function of master 30, as shown in Figure 10F.
  • the number of PC slave processors 40 can be increased to any virtually other number, such as at least about 4; as shown, the processing system is completely scalar, so that further increases can occur to about eight, about 16, about 32, about 64, about 128, about 256, about 512, about 1024, and so on (these multiples indicated are preferred as conventional in the art, but not mandatory); the PC master microprocessors 30 can also be increased.
  • a PC 1 can function as a slave PC 40 and be controlled by a master controller 31, which can be remote and which preferably can have limited or no microprocessing capability, but can as well have similar or greater capability.
  • a master controller 31 is located on the PC user side of the firewall 50, under the control of the PC user, while the microprocessors 40 reside on the network side of the firewall 50.
  • the master controller 31 preferably receives input from the PC user by local means such as keyboard, microphone, videocam or future hardware and/or software and/or firmware or other equivalent or successor interface means (as does a master processor 40) that provides input to a PC 1 or microprocessor 30 originating from a user's hand, voice, eye, nerve or nerves, or other body part; in addition, remote access by telephone, cable, wireless or other connection might also be enabled by a hardware and/or software and/or firmware and/or other means with suitable security such as password controlled access.
  • local means such as keyboard, microphone, videocam or future hardware and/or software and/or firmware or other equivalent or successor interface means (as does a master processor 40) that provides input to a PC 1 or microprocessor 30 originating from a user's hand, voice, eye, nerve or nerves, or other body part; in addition, remote access by telephone, cable, wireless or other connection might also be enabled by a hardware and/or software and/or firmware and/or other means with suitable security such as password controlled access.
  • a master controller unit 93' (which could be capable of being accessed by the PC user through a remote controller 31) with only a controlling capability is be located on the PC user side of the firewall 50, under the control of the PC user, while the slave processor units 94 would reside on the network side of the firewall 50.
  • Figures ION and 10O show PC 1 with a firewall 50 that is configurable through either hardware and/or software and/or firmware and/or other means; software configuration are easiest and most typical, but active motherboard hardware configuration is possible and may present some security advantages, including as use of manual or electromechanical or other switches or locks.
  • Figure ION shows a CD-ROM 63' that has been placed by a PC user on the network side of a firewall 50 from a previous position on the PC user side of a firewall 50, which was shown in Figure 10A.
  • the settings of a firewall 50 can default to those that safely protect the PC 1 from uncontrolled access by network users, but with capability for the relatively sophisticated PC user to override such default settings and yet with proper safeguards to protect the unsophisticated user from inadvertently doing so; configuration of a firewall 50 might also be actively controlled by a network administrator in a local network like that of a business, where a PC user may not be owner or leaser of the PC being used, either by remote access on the network or with a remote controller 31.
  • Figures 10P and 10Q show a PC "system of a chip" 90 with a firewall 50 that is configurable through either hardware and/or software and/or firmware and/or other means; software configuration is easiest and most typical. Active configuration of the integrated circuits of the PC microchip 90 is also possible and may present some speed and security advantages. Such direct configuration of the circuits of the microchip 90 to establish or change in its firewall 50 could be provided by the use of field-programmable gate arrays (or FPGA's) or their future equivalents or successors; microcircuit electromechanical or other switches or locks can also be used potentially.
  • slave processing unit 94' has been moved to the PC user side of a firewall 50 from a network side position shown in Figure 10C and 10L.
  • Figure 10Q shows the same active configuration of chip circuit using FPGA's for the simplest form of multiprocessing microchip 90 with a single slave unit 94', transferring its position to the PC user's side of a firewall 50 from a network side shown in Figure 10M and 10D.
  • Figures 10A-10I show embodiments of a system for a network of computers, including personal computers, comprising: at least two personal computers; means for at least one personal computer, when directed by its personal user, to function temporarily as a master personal computer to initiate and control the execution of a computer processing operation shared with at least one other personal computer in the network; means for at least one other personal computer, when idled by its personal user, to be made available to function temporarily as at least one slave personal computer to participate in the execution of a shared computer processing operation controlled by the master personal computer; and means for the personal computers to alternate as directed between functioning as a master and functioning as a slave in the shared computer processing operations.
  • Figures 10A-10H show embodiments including wherein the system is scalar in that the system imposes no limit to the number of personal computers; for example, the system can include at least 256 said personal computers; the system is scalar in that the system imposes no limit to the number of personal computers participating in a single shared computer processing operation, including at least 256 said personal computers, for example; the network is connected to the Internet and its equivalents and successors, so that personal computers include at least a million personal computers, for example; the shared computer processing is parallel processing; the network is connected to the World Wide Web and its successors; a means for network services, including browsing and broadcast functions, as well as shared computer processing such as parallel processing, are provided to said personal computers within said network; the network includes at least one network server that participates in the shared computer processing; the personal computers include a transponder or equivalent or successor means so that a master personal computer can determine the closest available slave personal computers; the closest available slave personal computer is compatible with the master personal computer to execute said shared computer processing operation; the personal computers
  • firewall 50 provides a solution to an important security problem by preferably completely isolating host PC's 1 that are providing slave microprocessors to the network for parallel or other shared processing functions from any capability to access or retain information about any element about that shared processing.
  • the firewall 50 provides security for the host PC against intrusion by outside hackers; by reducing the need for encryption and authentication, the use of firewalls 50 can provide a relative increase in computing speed and efficiency.
  • the firewall 50 described above could be used in any computing device included in this application's above definition of personal computers, including those with "appliance" -type microprocessors, such as telephones, televisions or cars, as discussed above.
  • Figures 10A- 101 show embodiments of a system architecture for computers, including personal computers, to function within a network of computers, comprising: a computer with at least two microprocessors and having a connection means with a network of computers; the architecture for the computers including a firewall means for personal computers to limit access by the network to only a portion of the hardware, software, firmware, and other components of the personal computers; the firewall means will not permit access by the network to at least a one microprocessor having a means to function as a master microprocessor to initiate and control the execution of a computer processing operation shared with at least one other microprocessor having a means to function as a slave microprocessor; and the firewall means permitting access by the network to the slave microprocessor.
  • the system architecture explicitly includes embodiments of, for example, the computer is a personal computer; the personal computer is a microchip; the computer have a control means by which to permit and to deny access to the computer by the network for shared computer processing; the system is scalar in that the system imposes no limit to the number of personal computers, including at least 256 said personal computers, for example; the network is connected to the Internet and its equivalents and successors, so that the personal computers include at least a million personal computers, for example; the system is scalar in that the system imposes no limit to the number of personal computers participating in a single shared computer processing operation, including at least 256 said personal computers, for example; the personal computers having at least one microprocessor and communicating with the network through a connection means having a speed of data transmission that is at least greater than a peak data processing speed of the microprocessor .
  • Figures 10J-10M show embodiments of a system architecture for computers, including personal computers, to function within a network of computers, comprising for example: a computer with at least a controller and a microprocessor and having a connection means with a network of computers; the architecture for the computers including a firewall means for personal computers to limit access by the network to only a portion of the hardware, software, firmware, and other components of the personal computers; the firewall means will not permit access by the network to at least a one controller having a means to initiate and control the execution of a computer processing operation shared with at least one microprocessor having a means to function as a slave microprocessor; and the firewall means permitting access by the network to the slave microprocessor.
  • the system architecture explicitly includes embodiments of, for example, the computer is a personal computer; the personal computer is a microchip; the computer have a control means by which to permit and to deny access to the computer by the network for shared computer processing; the system is scalar in that the system imposes no limit to the number of personal computers, including at least 256 said personal computers, for example; the network is connected to the Internet and its equivalents and successors, so that the personal computers include at least a million personal computers, for example; the system is scalar in that the system imposes no limit to the number of personal computers participating in a single shared computer processing operation, including at least 256 said personal computers, for example; the personal computers having at least one microprocessor and communicating with the network through a connection means having a speed of data transmission that is at least greater than a peak data processing speed of the microprocessor; and the controller being capable of remote use.
  • Figures 10N-10Q show embodiments of a system architecture for computers, including personal computers, to function within a network of computers, comprising for example: a computer with at least two microprocessors and having a connection means with a network of computers; the architecture for the computers including a firewall means for personal computers to limit access by the network to only a portion of the hardware, software, firmware, and other components of the personal computers, the firewall means will not permit access by the network to at least a one microprocessor having a means to function as a master microprocessor to initiate and control the execution of a computer processing operation shared with at least one other microprocessor having a means to function as a slave microprocessor; the firewall means permitting access by the network to the slave microprocessor; the configuration of the firewall being capable of change by a user or authorized local network administrator; the change m firewall configuration of a microchip PC is made at lease m part using field- programmable gate arrays or equivalents or successors.
  • the system architecture explicitly includes embodiments of, for example, the computer is a personal computer; the personal computer is a microchip; the computer have a control means by which to permit and to deny access to the computer by the network for shared computer processing; the system is scalar m that the system imposes no limit to the number of personal computers, including at least 256 said personal computers; the network is connected to the Internet and its equivalents and successors, so that the personal computers include at least a million personal computers; the system is scalar m that the system imposes no limit to the number of personal computers participating m a single shared computer processing operation, including at least 256 said personal computers; the personal computers having at least one microprocessor and communicating with the network through a connection means having a speed of data transmission that is preferably at least greater than a peak data processing speed of the microprocessor.
  • PC 1 microprocessors noted above be designed to the same basic consensus industry standard as parallel microprocessors for PC's (or equivalents or successors) as m Figures 10A-10B or for PC "systems on a chip" discussed m Figures 10C-10D.
  • the cost per microprocessor might rise somewhat initially, the net cost of computing for all users is expected to fall drastically almost instantly due to the significant general performance increase created by the new capability to use of heretofore idle "appliance" microprocessors.
  • the high potential for very substantial benefit to all users should provide a powerful force to reach consensus on important industry hardware, software, and other standards on a continuing basis for such basic parallel network processing designs utilizing the Internet 3 and successor.
  • the internal system bus or buses of any such PC's have a transmission speed that is at least high enough that the all processing operations of the PC microprocessor or microprocessors is unrestricted (and other PC components like RAM) and that the microprocessor chip or chips are directly linked by fiber optic or other broad bandwidth connection, as with the system chip described above, so that the limiting factor on data throughput in the network system, or any part, is only the speed of the linked microprocessors themselves, not the transmission speed of the linkage.
  • the individual user PC's can be connected to the Internet
  • Metalnternet (or other) network by any electromagnetic means with the very high transmission speed provided by the broad bandwidth of fiber optic cable being preferred, but hybrid systems using fiber optic cable for trunk lines and coaxial cable to individual users may be more cost effective initially, but less preferred unless cable can be made (through hardware and/or software and/or firmware and/or other component means) to provide sufficiently broad bandwidth connections to provide unrestricted throughput by connected microprocessors.
  • cable can be made (through hardware and/or software and/or firmware and/or other component means) to provide sufficiently broad bandwidth connections to provide unrestricted throughput by connected microprocessors.
  • conventional network architecture and structures should be acceptable for good system performance, making possible a virtual complete interconnection network between users.
  • Network architecture that clusters PC's together should therefore be preferred, but not mandatory for substantial benefit, and can be constructed by wired means.
  • wireless PC connections 100 can be made to existing non-PC network components, such as one or more satellites 110, or present or future equivalent or successor components and the wireless transmissions can be conventional radio waves, such as infrared or microwave, or can utilize any other part of the electromagnetic wave spectrum.
  • such a wireless or wired approach also make it easily possible m the future to develop network clusters 101 of available PC's 1' with complete mterconnectivity; i.e., each available PC 1 m the cluster 101 is connected (preferably wirelessly 100) to every other available PC 1 m tne cluster 101, constantly adjusting to individual PC's becoming available or unavailable.
  • network clusters 101 with complete interconnectivity is certainly a possible embodiment .
  • a wireless device 120 comprised of hardware and/or software and/or firmware and/or other component, like the PC 1 availability device described above preferably resident in the PC, but also with a networklike capability of measuring the distance from each PC 1 in its cluster 101 by that PC's signal transmission by transponder or its functional equivalent and/or other means to the nearest other PC's 1' in the cluster 101.
  • this distance measurement could be accomplished in a conventional manner between transponder devices 120 connected to each PC in the cluster 101; for example, by measuring in effect the time delay from wireless transmission by the transponder device 120 of an interrogating signal 105 to request initiation of shared processing by a master PC 1 to the reception of a wireless transmission response 106 signaling availability to function as a slave PC from each of the idle PC's 1' in the cluster 101 that has received the interrogation signal 105.
  • the first response signal 106' received by the master PC 1 is from the closest available slave PC 1" (assuming the simplest shared processing case of one slave PC and one master PC) , which is selected for the shared processing operation by the requesting master PC 1, since the closer the shared microprocessor, the faster the speed of the wireless connections 100 is between sharing PC's (assuming equivalence of the connection means and other components among each of the PC's 1') .
  • the interrogation signal 105 might specify other selection criteria also, for example, for the closest compatible (initially perhaps defined by a functional requirement of the system to be an identical microprocessor) slave PC 1", with the first response signal 106' being selected as above.
  • This same transponder approach also can be used between PC's 1" connected by a wired 99 (or mixed wired/wireless) means, despite the fact that connection distances would generally be greater (since not line of sight, as is wireless) , as shown in Figure 14A, since the speed of transmission by the preferred broad bandwidth transmission means such as fiber optic cable is so high as to offset that greater distance.
  • this wired approach might be preferable for such PC's already connected by broad bandwidth transmission means, since additional wireless components like hardware and software are not necessary.
  • a functionally equivalent transponder device 120 can be operated in wired clusters 101 in generally the same manner as described above for PC's connected in wireless clusters 101.
  • Networks incorporating PC's 1 connected by both wireless and wired (or mixed) means are anticipated, like the home or business network mentioned in Figure 101, with mobile PC's or other computing devices preferably using wireless connections.
  • a local cluster 101 of a network 2 might connect wirelessly between PC's and with the network 2 through transponding means linked to wired broad bandwidth transmission means, as shown in Figure 14C.
  • the same general transponder device means 120 can also be used in a wired 100 network system 2 employing network servers 98 operated, for example, by an ISP, or in any other network system architectures (including client/server or peer to peer) or any other topologies (including ring, bus, and star) either well known now in the art or their future equivalents or successors.
  • network servers 98 operated, for example, by an ISP, or in any other network system architectures (including client/server or peer to peer) or any other topologies (including ring, bus, and star) either well known now in the art or their future equivalents or successors.
  • the Figure 14 approach to establishing local PC clusters 101 for parallel or other shared processing has major advantage in that it avoids using network computers such as servers (and, if wireless, other network components including even connection means) , so that the entire local system of PC's within a cluster 101 operates independently of network servers, routers, etc. Moreover, particularly if connected by wireless means, the size of the cluster 101 could be quite large, being limited generally by PC wireless transmission power, PC wireless reception sensitivity, and local and/or other conditions affecting transmission and reception. Additionally, one cluster 101 could communicate by wireless 100 means with an adjacent or other clusters 101, as shown in Figure 14B, which could thereby include those beyond its own direct transmission range .
  • a virtual potential parallel processing network for PC's 1 in a cluster 101 preferably is established before a processing request begins. This is accomplished by the transponder device 120 in each idle PC 1 , a potential slave, broadcasting by transponder 120 its available state when it becomes idle and/or periodically afterwards, so that each potential master PC 1 in the local cluster 101 is able to maintain relatively constantly its own directory 121 of the idle PC's 1 closest to it that are available to function as slaves.
  • the directory 121 contains, for example, a list of about the standard use number of slave PC's 1 for the master PC (which initially probably is just one other PC 1") or a higher number, preferably listed sequentially from the closest available PC to the farthest .
  • the directory of available slave PC's 1 is preferably updated on a relatively up to date basis, either when a change occurs in the idle state of a potential slave PC in the directory 121 or periodically.
  • Such ad hoc clusters 101 should be more effective by being less arbitrary geographically, since each individual PC is effectively in the center of its own ad hoc cluster. Scaling up or down the number of microprocessors required by each PC at any given time is also more seamless. The complete interconnection potentially provided optimally by such ad hoc wireless clusters is also remarkable because such clusters mimics the neural network structure of the animal brain, wherein each nerve cell, called a neuron, interconnects in a very complicated way with the neurons around it.
  • the global network computer described above that is expected in a decade can have at least about 10 times as many PC ' s as a human brain has neurons and they can be connected by electromagnetic waves traveling at close to the speed of light, which is about 300,000 times faster than the transmission speed of human neurons (which, however, are much closer together) .
  • the above described global network computer system has an added benefit of reducing the serious and growing problem of the nearly immediate obsolescence of computer hardware, software, firmware, and other components. Since the preferred system above is the sum of its constituent parts used in parallel processing, each specific PC component becomes less critical. As long as access to the network utilizing sufficient bandwidth is possible, then all other technical inadequacies of the user's own PC can be completely compensated for by the network's access to a multitude of technically able PC's of which the user will have temporary use.
  • Any number of individual PC's within local networks like that operated by an ISP can be grouped into clusters or cells, as is typical m the practice of the network industry. As is common m operating electrical power grids and telecommunications and computer networks, many such processing requests from many PC's and many networks could be so routed for remote processing, with the complexity of the system growing substantially over time m a natural progression.
  • nighttime parallel processing can remain within a relatively local area and emphasize relatively massively parallel processing by larger entities such as business, government, or universities for relatively complicated applications that benefit from comparatively long nightly periods of largely uninterrupted use of significant numbers of slave personal computers PC 1.
  • the conventional approach to configuring a network of personal computers PC 1 for parallel processing is simply to string them together in a simple bus -type architecture, as shown previously in Figure 9, new Figures 16A-16Z and 16AA show a new hierarchial network topology.
  • the Figure 9 network structure is simple and produces reasonable results in loosely coupled problems like geographic searches described earlier, as a general approach it has at least three important problems .
  • the new hierarchical network topology shown in Figure 16A is a simple subdivision step whereby a personal computer PC 1 (or equivalent PC on a microprocessor chip 90) or microprocessor 30 acting as a master M x divides a given operation into two parts (for example, two halfs) , then sends by an optical or electrical connection such as optical fiber or wire 99 the one half parts to each to two connected available slave personal computers PC 1 (or PC microprocessor 90) or microprocessor 30, as shown one processing level down as S 21 and S 22 .
  • the Figure 16A (and subsequent Figures 16) can be connected to the Internet 3 and World Wide Web, as preferred, or may not be so connected but still with benefit.
  • FIG 16B shows that slave personal computer PC 1 (or PC microprocessor 90) or microprocessor 40 located at S 21 has temporarily adopted the same functional role as a master to repeat the same subdivision of the given operation. Therefore, having already been divided in half once in Figure 16A, the given operation is again subdivided in Figure 16B, this time in half into quarters of the original operation (for example) by S 21 , which then sends one quarter to each of two additional available slave personal computers PC 1 (or PC microprocessors 90) or microprocessors 40 located at S 31 and S 32 .
  • Figure 16C shows personal computers PC 1 (or PC microprocessor 90) or microprocessors 40 at S 31 and S 32 sending operation results back to S 21 after performing the processing required by the given operation, instead of repeating again the subdivision process.
  • That processing action by S 31 and S 32 can be dictated by pre-established program criteria, for example by automatically defaulting to operational processing at the S 3 level after two subdivision processes as shown above, so that the operation can be processed in parallel by four available slave personal computers PC 1 (or PC microprocessors 90) or microprocessors 40.
  • the criteria can be a user preference command over-riding an otherwise automatic default to level three processing in order to specify some other level of processing involving more or less slave PC 1 (or PC microprocessors 90) or microprocessors 40.
  • the personal computer PC 1 or PC microprocessor 90
  • microprocessor 40 acting as master M L also can initiate the parallel processing operation
  • Figure 16D shows operation results being passed back to the next higher level, this time from slave personal computers PC 1 (or PC microprocessors 90) or microprocessors 40, S 21 and S 22 , to master personal computer PC 1 (or PC microprocessor 90) or microprocessor 30, M 1 where the operation is completed after the S 21 and S 22 results are consolidated.
  • Figure 16G shows master personal computer PC 1 (or PC microprocessor 90) or microprocessor 30, M 1( offloading by wireless connection 100, for example, the entire parallel processing operation to an available slave personal computer PC 1 (or PC microprocessor 90) or microprocessor 40 that temporarily functions as S ⁇ in the place of M : on the first processing level for the duration of the given parallel processing (or multi-tasking) operation, the first step of which operation is shown in Figure 16H, which is like Figure 16A except as shown.
  • Figure 161 shows a personal computer PC 1 (or PC microprocessor 90) or microprocessor 40 that is executing a command to function in the slave role of S 21 for a given operation but has become unavailable, or was unavailable initially, (due, for example, to interruption for other higher priority command by its user or to malfunction) when results of the given operation from a lower parallel processing level are passed to S 21
  • S 21 (or S 31 or S 32 ) can simply offload those results to another personal computer PC 1 (or PC microprocessor 90) or microprocessor 30 (or 40) that is then available and it can become S 21 and take over the role of S 21 in the given operation for the duration of that operation.
  • the role of any unavailable or malfunctioning master or slave PC 1 or microprocessor 90, 30, or 40 can be transferred to an available functioning one.
  • S 21 then completes the parallel processing operation and passes its portion of the operation results to M 1 .
  • Figure 16E shows the multi-processing network topology of Figures 16A-16J in a larger scale embodiment, including all personal computers PC 1 (or PC microprocessors 90) or microprocessors 30 (or 40) that are participating in a typical operation, including in this example one personal computer PC 1 (or PC microprocessor 90) or microprocessor 30 (or 40) at level one; two at level two; four at level three; and eight at level four.
  • the network topology is completely scalar in that any practical number of additional processing levels or personal computers PC 1 (or PC microprocessors 90) or microprocessors 30 (or 40) can be added to those shown (and topologies limited to just two (or three) levels are also possible, which is the simplest case of operation processing subdivision that distinguishes over the conventional Figure 9 single level "string-together” architecture) .
  • N is the last or final processing level, for the simplest case, as shown above, which is splitting one given operation into two parts such as halfs between each level .
  • Figure 16E shows the distribution of a given parallel processing (or multi -tasking) operation as routed through a four level virtual network, beginning at M x .
  • "Virtual" as used here means temporary, since in the next parallel operation originating at M x it might be the case that many of the personal computers PC 1 (or microprocessors 90) or microprocessors 30 (or 40) that had been available for a previous operation would not still be available for the next operation.
  • Figure 16E shows a binary tree network architecture for the initial distribution of an operation from M 1 down through four slave processing levels
  • Figure 16 F shows the subsequent processing and accumulation of results back from there to M 1
  • Figure 16F shows an inverted view of Figure 16E to show the sequence of the operation, from operation distribution in Figure 16E to result accumulation in Figure 16F.
  • Figure 16F shows the processing slave personal computers PC 1 (or PC microprocessors 90) or microprocessors 40 at the fourth level, S 41 through S 48 , where they process the operation to produce results which are then routed back through two other levels of the virtual network to M,.
  • each slave personal computer PC 1 (or PC microprocessor 90) or microprocessor 40) has the capability to either simply pass through those results operation only as a direct communication link or connection; or, alternatively, for example, to consolidate those results sent from the personal computers PC 1 (or PC microprocessor 90) or microprocessors 40) at a lower level; or, to provide additional other processing based on those lower processing level results.
  • Such consolidation or additional processing can reduce or eliminate duplicative data from a search or other operation producing duplicative results and can also serve to buffer the originating master M 1 from overloading caused by many sets of results arriving at M x in the Figure 9 single processing level architecture in an uncoordinated fashion from what might be a large number of slave personal computers PC 1 (or PC microprocessor 90) or microprocessors 40.
  • Such a consolidation role for personal computers PC 1 (or PC microprocessor 90) microprocessors 40 substantially reduces or eliminates the excessive custom pre-planning and synchronization problems of the conventional Figure 9 network topology discussed above.
  • Figure 16K shows a simple example indicative of the extremely complicated network structure that can result from subdividing a given operation in which the complexity of the operation involved is not uniform, due to, for example, variations in the data.
  • pre-set program splitting criteria can be employed that balances the processing load of each slave personal computer PC 1 (or PC microprocessor 90) or microprocessor 40.
  • the complex portions of a given operation can automatically draw greater resources in the form of additional splitting of that more difficult portion of the problem, so that additional levels of parallel processing slave personal computers PC 1 (or PC microprocessors 90) or microprocessors 40 can be brought into the virtual network to process the operation, as shown in the left branch of Figure 16K.
  • Figure 16K is a fairly simple example, but when the same kind of dynamic network structure is applied to a virtual network using many more personal computers PC 1 (or PC microprocessor 90) or microprocessors 30 or 40 and many processing levels, involving both micro levels in PC microprocessor chips 90 and macro levels in personal computers PC 1 networks (such as shown later in Figure 20B) then the potential complexity of the virtual network increases significantly.
  • each PC microprocessor chip 90 might have 64 slave microprocessors 94 on the final processing level ; each personal computer PC 1 might have 64 slave PC microprocessor chips 90 at the final processing level, and the virtual network might include 64 personal computers PC 1 at the final processing level .
  • Figure 16K shows an example of a highly flexible virtual network architecture that is capable of being dynamically configured in real time by the processing requirements imposed on the components of the network by a specific given operation and its associated data, as allowed by the network hardware/software/firmware architecture.
  • Figures 16L and 16M show examples of other possible subdivision parallel processing methods, such as subdivision routing to three slave personal computers PC 1 (or PC microprocessors 90) or microprocessors 40 at the next level down, as shown in Figure 16L, or subdivision routing to four slave personal computers PC 1 (or PC microprocessors 90) or microprocessors 40, as shown in Figure 16M. Subdivision routing to any practical number of slave personal computers PC 1 (or PC microprocessors 90) or microprocessors 40 between processing levels can be done.
  • Such routing subdivision can also vary between processing levels or even within the same processing level, as shown in Figure 16N; these variations examples can result from pre-set program criteria such as those that balance operation loads, like those shown previously in Figure 16K.
  • the means for subdividing problems for parallel or multi -tasking processing can also vary, within at least a range of methods known in the computer and mathematical arts.
  • Figure 160 shows slave personal computer PC 1 (or PC microprocessor 90) or microprocessor 40, S 41 , sending operation results to a higher processing level, S 31 , which can then function as a router or as one or more high speed switch 42
  • Figure 16Q demonstrates the capability for any two pair of slave personal computers PC 1 (or PC microprocessors 90) or microprocessors 40 like S 41 and S 42 to communicate directly between each other, including wired or wirelessly 100 as shown.
  • Figures 160- 16Q shown the same subsection of the network topology shown in Figure 16F (the left uppermost portion) , as are the next Figures, 16V- 16W below.
  • a personal computer PC 1 or PC microprocessor 90 or microprocessor 30 (or 40) located on a higher processing level in the network architecture such as S 31 can process results as well as route them, as shown in Figure 16V, in which S 31 receives results from S 41 and S 42 at a lower processing level and then processes that data before sending its processing results to a higher level to S 21 , as shown in Figure 16W.
  • Figures 16V-16W and 160- 16Q show the capability of any personal computer PC 1 (or PC microprocessor 90) or microprocessor 30 (or 40) of the Figure 16F (and 16E) network structural and functional invention to communicate with any other personal computer PC 1 (or PC microprocessor 90) or microprocessor 30 (or 40) participating in a given parallel processing (or multi-tasking) operation. That communication can take the form of simple pass-through of unmodified results or of modification of those results by processing at any level.
  • Figures 16X-16Z show the applicant's new hierarchical network structure and function applied to the design of a personal computer PC 1 , as discussed previously in Figures 10A and 10B.
  • Figure 16X shows the simplest general design, with a master M ⁇ microprocessor 30 and two slave S 21 and S 22 microprocessors 40.
  • Figure 16Y shows the same network structure with an additional level of slave microprocessors 40, S 31 through S 34
  • Figure 16Z shows the same network structure as Figure 16Y with an additional level of slave microprocessors 40, S 41 through S 48 .
  • this network structure is completely scalar, including any practical number of slave microprocessors 40 on any practical number of processing levels.
  • FIG 16AA shows a useful embodiment in which each microprocessor 30 and 40 has, in addition to internal cache memory, its own random access memory (RAM) 66 or equivalent memory (volatile or non-volatile, like Flash or magnetic memory) , integrated on chip or separate off chip.
  • RAM random access memory
  • the design can also incorporate (or substitute) conventional shared memory or RAM 66' (i.e. memory used by all, or some, of the microprocessors 30 or 40 (or 90) of the personal computer PC 1) .
  • FIGS 16R-16T are parallel to Figures 16X-16Z above, but show PC microprocessor 90 architecture rather than macro PC 1 architecture; a PC microprocessor 90 is, of course, as earlier described in Figure 10C, a personal computer on a microchip.
  • Figure 16U is like Figure 16AA, also except for showing PC microprocessor 90 architecture instead of PC 1 architecture.
  • Figure 16U shows a useful embodiment in which each PC microprocessor 93 or 94 has its own integrated on chip (or separate off chip) random access memory (RAM) 66 or equivalent memory (volatile or non-volatile, like Flash or magnetic memory) .
  • RAM random access memory
  • the microchip design can also incorporate (or substitute) conventional shared memory or RAM 66' (i.e. memory used by all, or some, of the PC microprocessors 93 or 94 of the personal computer PC microprocessor 90) .
  • Figures 16R-16U show a different and improved basic chip architecture which can exclude or reduce the currently used superscalar approach in microprocessors to execute multiple instructions during each clock cycle.
  • the Figures 16R-16U architecture is much simpler and, by integrating memory with microprocessor, reduces memory bottlenecks.
  • Figures 16X-16Z and 16AA by using the same architecture for PC 1 networks as Figures 16R-16U, import the same advantage of microchip parallel processing performance to parallel processing in PC 1 networks.
  • Figure 16R-16T and 16X-16Z all of the Figure 16 series show personal computers PC 1 and microprocessors 30 or 40 as occupying the same location. This dual representation was done for economy of presentation and to show the parallel functionality and interchangability in conceptual terms of personal computer PC 1 and microprocessors 30 or 40 in the structure of the new network. So, taking Figure 16A as an example, M,, S 21 and S 22 show three personal computers PC 1 or, alternatively, one microprocessor 30 and two microprocessors 40.
  • a personal computer PC 1 can be reduced m size to a PC microprocessor chip 90, so preceding Figures showing personal computer PC 1 also generally represent PC microprocessor chip 90.
  • Figurez 16A-16Z and 16AA show a mix of electrical and optical connections, including wired 99, especially connections such as optical glass fiber and wireless 100 (and mixtures of both m a single figure) .
  • 99 or 100 or a mix can be used relatively interchangeably m the network inventions shown (as well as in prior figures) , though m some embodiments either highest transmission speed (le broadest bandwidth) or mobility (or some other factor) may dictate a preferred use of wired or wireless.
  • fiber optic wire 99 provides the most advantageous transmission means because it has the greatest bandwidth or data transmission speed, so it is generally preferred for connections between personal computers and microchips, including direct connections, whereas wireless 100 is generally preferred where mobility is a paramount design criteria.
  • the parallel processing network architecture shown m the preceding Figures 16A-16Z and 16AA and m earlier figures has several features unique to its basic design that provide for the security of personal computers PC 1 (or PC microprocessor 90) or microprocessor 40 that share other computers for parallel and multi -tasking processing.
  • the slave personal computers PC 1 (or microprocessors 40) each have only part of the operation (for large operations, only a very small part) and therefore unauthorized surveillance of a single PC 1 can provide only very limited knowledge of the entire operation, especially m only a relatively local area switching or routing was employed.
  • the addresses of the slave personal computers PC 1 (or microprocessors 40) are known or traceable, therefore not protected by anonymity (like hackers usually are) in case of unauthorized intervention.
  • cryptography can be employed, with on microprocessor chip 30, 40, or 90 hardware 55 preferred due to efficiency, although software and firmware can also be used, or a separate PC 1 hardware-based component 56 like an encryption microchip can be used; with either encryption component 55 or 56, micro mechanical locks can be used to prevent access other than the direct physical user. Nonetheless, these inherent strengths can be substantially reinforced, as indicated in Figures 17B- 17D.
  • Figure 17A shows at least one firewall 50 performing its conventional function of keeping out intruders such as hackers from the Internet 3 from unauthorized access for either surveillance or intervention of a user's personal computer PC 1 (or PC microprocessor 90) or master microprocessor 30.
  • FIG 17B shows that, since Internet users can, as enabled by the applicant's network structure invention, use one or more of the slave microprocessors 40 of another's personal computer PC 1 (or PC microprocessor 90) for parallel (or multitasking) processing, the at least one firewall 50 has a dual function in also protecting Internet 3 use (or other shared use on a network) from unauthorized surveillance or intervention by a PC 1 owner/user who is providing the shared resources. To maintain the privacy necessary to operate such a cooperatively shared network arrangement, unauthorized surveillance or intervention must be carefully prevented by hardware/software /firmware or other means.
  • Figure 17C therefore shows master M personal computer PC 1 (or PC microprocessor 90) using the slave S 2 microprocessor 40 of a different personal computer, PC 1 ' , which is available for Internet 3 (or other net) shared use, while firewall 50' blocks unauthorized access into PC 1 ' by PC 1 (although PC 1' owner/user can always interrupt a shared operation and take back control and use of slave S' microprocessor 40, which then triggers off-loading action to compensate, as discussed above in Figures 16I-16J) .
  • Figure 17D shows a figure similar to Figure 17C, but showing a PC microprocessor 90 with a slave microprocessor 94 being used by Internet 3 users (or other net) , so that at least one firewall 50 serves both to deny access such as surveillance by master M microprocessor 93 to an Internet 3 parallel processing (or multi -tasking) operation on slave S microprocessor 94 and to deny access to master M microprocessor 93 by Internet 3 (or other net) users of slave S microprocessor 94. It is presently contemplated that at least one firewall 50 is implemented by non-configurable hardware at the microchip level to provide the best protection against tampering with the firewall 50 by a PC 1 user, who has easier access to software or macro hardware such as PC motherboards to alter.
  • the flexible network architecture shown earlier m Figure 16K and other Figure 16 series (and other figures) have many applications, including their use to design improvements and alternatives to the network itself.
  • the flexible network can be used to simulate and design personal computers PC 1 and particularly PC microprocessor chips 90 (and other microchips) , which may be static or configurable (in response to the requirements of a given operation, like the Figure 16K network architecture) or a mix.
  • the Figure 16K network architecture has capabilities that substantially exceed simulating the fairly simple binary circuit structure of a typical PC microprocessor 90 or other microchip, since any personal computer PC 1 or PC microprocessor chip 90 in the Figure 16K network can simulate much more than a simple binary circuit on/off state or other simple microchip circuit.
  • Any PC 1 or 90 in a Figure 16K network can represent virtually any number of states or conditions simulating any kind of circuit, however complex it might be, the only limit being the processing time required for what can be a very large number - thousands or millions - of personal computers PC 1 or PC microprocessors 90 to process the simulation; that is to say, there are only practical constraints, not theoretical ones, although increasingly larger numbers of processors are expected to be phased in, as discussed before.
  • One potential related application of prior described network inventions is to simulating the unique "qubit" component necessary to construct a quantum computer, as well as a virtual quantum computer itself.
  • Figures 18A-18D show designs for a virtual quantum computer or computers.
  • Figure 18A shows personal computer PC 1 (or microprocessor 90) with the addition of a software program 151 simulating a "qubit” for a quantum computer or computers and thereby becoming a virtual qubit (VQ) 150, a key component of a quantum computer 153.
  • VQ virtual qubit
  • FIG 18B shows a personal computer PC 1 (or microprocessor 90) with a digital signal processor (DSP) 89 connected to a hardware analog device 152 simulating a qubit, with the PC 1 monitoring the qubit through the DSP 89, thereby simulating a virtual qubit (VQ) 150 for a quantum computer 153; this arrangement allows the option of simultaneous use of the PC 1 through multi-tasking for both digital and quantum computing.
  • PC 1 or microprocessor 90
  • DSP digital signal processor
  • Figure 18C is like Figure 16A, but incorporating a virtual qubit in PC 1, so that a virtual quantum computer 153 can have any network architecture like those shown in Figures 16A-16Z and 16AA, as well as other figures of this application.
  • a virtual qubits (VC) 150 network can provide complete interconnectivity, like Figure 13.
  • Virtual qubits VC 150 like those described in Figures 18A & 18B can be added to or substituted for microprocessors 30 and 40 in prior Figures 16B-16Q and 16V-16AA of this application, as well as earlier figures.
  • the number of virtual qubits 150 is limited only to whatever is practical at any given time; in terms of development that means as few as a single qubit 150 in one or more networked personal computers PC 1 to begin, but the number of qubits 150 can become potentially extremely large, as indicated in previous figures.
  • Figure 18D shows a mix of wired 99 and wireless 100 connections.
  • personal computers PC 1 in automobiles 170 are in actual use only a very small percentage of the time, with the average dormant period of non-use totaling as much as 90 percent or more.
  • Personal computers PC 1 are now being added to some automobiles and will likely become standard equipment over the next decade or so.
  • automobiles already have a very large number of microcomputers onboard in the form of specialized microprocessors 35 which are likely to become general parallel processors in future designs, as discussed earlier in this application.
  • Automobiles therefore form a potentially large and otherwise unused resource for massive parallel processing through the Internet 3 and other networks, as described in earlier figures.
  • the engine when idle and thus generally available for network use, automobiles lack their usual power source, the engine, which of course is then off, since it is too large to efficiently provide electrical power to onboard computers except occasionally.
  • the car engine can have a controller (hardware, software or firmware or combination m the PC 1 (or other microprocessor 35) , for example, connected to an automobile computer network 178 to automatically start the automobile engine m order to recharge the car battery 171 when the battery is low (and well before the battery is too low to start the engine) , but the engine additionally needs to be controlled as above not to expend all available fuel automatically.
  • the automobile 170 can be fitted with a very small auxiliary engine-power electrical power generator 177 to provide power to the automobile's computer network; the engine of the generator 177 can be fed by the main engine fuel tank and controlled as above.
  • Two solutions, not mutually exclusive, to alleviate (but not solve) the lack of power problem noted above are, first, adding an additional car battery 171' for network use (at least primarily) or, second, using a single battery but adding a controller in the PC 1, for example, that prevents the existing battery 171 from being discharged to a level near or below that which is needed to start the automobile 170.
  • one or more solar power generating cells or cell arrays 172 can be incorporated in an automobile's outer surface, with generally the most effective placement being on a portion of the upper horizontal surface, such as a portion of the roof, hood, or trunk.
  • a focused or focusable light source 173 can provide external power to the solar panel .
  • a connection device 174 such as a plug for an external electrical power source can be installed on or near the outer surface of the automobile.
  • connection device 175 for an optical fiber (or other wired) external connection to the Internet 3 or other net; an intermediate high transmission speed can also exist between the automobile network and a fiber optic connection to the Internet 3.
  • a wireless receiver 176 located near where the automobile is parked, such as in a garage can provide connection from the automobile's personal computer or computers PC 1 directly to the Internet 3 or to a network in a home or business like that shown in Figure 101.
  • Figure 20A is like Figure 16Y, but in addition shows a slave microprocessor 40 functioning as S ⁇ ,, the function of master having been temporarily or permanently offloaded to it by M x microprocessor 30. Also in addition, Figure 20A shows the processing level of slave microprocessors 40, S 31 through S 34 , each with a separate output link to a digital signal processor (DSP) 89 or other transmission component; the transmission linkages are shown as 111, 112, 113, and 114, respectively.
  • DSP digital signal processor
  • the DSP 89 is connected to a wired 99 means such as optical fiber to the Internet (or other net) , although non- optical fiber wire can be used (and probably does not require a DSP 89) .
  • Figure 20B is like Figure 16S, but with the same new additions described above in Figure 20A.
  • Figure 20B shows a detailed view of personal computer PC microprocessor 90- ⁇ which is a personal computer on a microchip, including two more levels of parallel processing within the microprocessor 90.
  • the two new levels of PC microprocessor 90 shown in Figure 20B are a second processing level consisting of PC microprocessors 90 21 through 90 24 and a third processing level consisting of PC microprocessors 90 31 through 90 316 (a third level total of 16 microprocessors 90) .
  • Each of the three processing levels shown in the Figure 2OB example is separated between levels by an intermediate direct connection to the Internet 3 (or other network) and by four output lines from the higher processing level.
  • microprocessors 90 21 through 90 24 are shown receiving respectively from the outputs 111 through 114 from four slave microprocessors 94, S 31 through S 34 of PC microprocessor 90 : .
  • PC microprocessor 90, ⁇ is shown in detail including all slave microprocessors 94, while other PC microprocessors 90 at the second and third processing levels do not, for simplicity and conciseness of presentation. Note also that an additional processing level can be present, but is not shown for the sake of simplicity: personal computers PC 1 like Figure 20A can be used interchangeably with PC microprocessors 90.
  • FIG. 20B shows that between each processing level the output links from every PC microprocessor 90 can be transmitted from slave microprocessors 94 directly to PC microprocessors 90 at the next processing level below, such as from PC microprocessor 90 21 down to PC microprocessors 90 31 through 90 34 , via the Internet 3 or other net .
  • Each of the transmission links from those slave processing microprocessors 94 (S 31 through S 34 ) shown as 111, 112, 113, and 114 for PC microprocessor 90 ⁇ can be transmitted on a different channel
  • an optical fiber line (because of its huge capacity, one optical fiber line is expected to be sufficient generally, but additional lines can be used) that connects preferably directly to PC microprocessor chip 90 ⁇ which can incorporate a digital signal processor 89 (of which there can be one or more) for connecting to the wired connection like fiber optic line, as shown, or wireless connection.
  • PC microprocessor chip 90 ⁇ which can incorporate a digital signal processor 89 (of which there can be one or more) for connecting to the wired connection like fiber optic line, as shown, or wireless connection.
  • This application encompasses all new apparatus and methods required to operate the above described network computer system or systems, including any associated computer or network hardware, software, or firmware (or other component), both apparatus and methods.
  • all enabling PC and network software, hardware, and firmware operating systems, user interfaces and application programs are (in their present or future forms, equivalents, or successors) : all enabling PC and network software, hardware, and firmware operating systems, user interfaces and application programs; all enabling PC and network hardware design and system architecture, including all PC and other computers, network computers such as servers, microprocessors, nodes, gateways, bridges, routers, switches, and all other components; all enabling financial and legal transactions, arrangements and entities for network providers, PC users, and/or others, including purchase and sale of any items or services on the network or any other interactions or transactions between any such buyers and sellers; and all services by third parties, including to select, procure, set up, implement, integrate, operate and perform maintenance, for any or all parts of the foregoing for PC users, network providers, and/or others.

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  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Computing Systems (AREA)
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Abstract

Cette invention se rapporte de manière générale à au moins un réseau d'ordinateurs comportant des ordinateurs du type ordinateurs personnels ou serveurs de réseaux dotés de microprocesseurs reliés par des organes de transmission à large bande et comportant des organes matériels, logiciels, microprogrammés et autres tels qu'au moins une opération de traitement parallèle exécutée implique au moins deux ordinateurs du réseau. De manière plus spécifique, l'invention se rapporte à au moins un grand réseau composé de réseaux plus petits et d'un grand nombre d'ordinateurs reliés, tel que l'Internet, dans lequel au moins deux opérations de traitement parallèle distinctes impliquant au moins deux ensembles différents d'ordinateurs se produisent simultanément et dans lequel les liens entre les traitements en cours peuvent être établis entre pratiquement tous les microprocesseurs des ordinateurs distincts reliés au réseau. De manière encore plus spécifique, cette invention se rapporte à des agencements commerciaux autorisant l'utilisation partagée de microprocesseurs de réseaux en vue d'un traitement parallèle ou autre, dans lesquels les propriétaires d'ordinateurs personnels apportent la puissance de traitement de microprocesseurs à un réseau, de préférence en vue d'un traitement parallèle, en échange d'un lien réseau avec d'autres ordinateurs personnels ou autres fournis par des fournisseurs de services réseaux, et notamment un lien avec d'autres microprocesseurs en vue d'un traitement parallèle ou autre. L'échange entre propriétaires et fournisseurs peut se faire sur la base de tout terme accepté par les deux parties, étant entendu que cet échange est conforme aux lois, règlements ou règles en vigueur, la rémunération de l'une des parties notamment se faisant au profit de l'autre partie sur la base d'une mesure périodique de l'utilisation nette ou de la fourniture de la puissance de traitement.
PCT/US1999/011206 1998-05-22 1999-05-21 Ordinateurs de reseau a couverture mondiale WO1999061998A2 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
EP99925711A EP1078320A2 (fr) 1998-05-22 1999-05-21 Ordinateurs de reseau a couverture mondiale
CN 99806522 CN1302403A (zh) 1998-05-22 1999-05-21 全球网络计算机
JP2000551330A JP2003524808A (ja) 1998-05-22 1999-05-21 大域ネットワークコンピュータ
CA002330952A CA2330952A1 (fr) 1998-05-22 1999-05-21 Ordinateurs de reseau a couverture mondiale
AU41944/99A AU4194499A (en) 1998-05-22 1999-05-21 Global network computers

Applications Claiming Priority (18)

Application Number Priority Date Filing Date Title
US8658898P 1998-05-22 1998-05-22
US8651698P 1998-05-22 1998-05-22
US60/086,588 1998-05-22
US60/086,516 1998-05-22
US8694898P 1998-05-27 1998-05-27
US09/085,755 1998-05-27
US60/086,948 1998-05-27
US09/085,755 US7634529B2 (en) 1996-11-29 1998-05-27 Personal and server computers having microchips with multiple processing units and internal firewalls
US8758798P 1998-06-01 1998-06-01
US60/087,587 1998-06-01
US8845998P 1998-06-08 1998-06-08
US60/088,459 1998-06-08
USPCT/US98/27058 1998-12-17
US09/213,875 1998-12-17
US09/213,875 US6725250B1 (en) 1996-11-29 1998-12-17 Global network computers
PCT/US1998/027058 WO1999032972A1 (fr) 1997-12-19 1998-12-17 Protection de securite par filtrage d'un traitement parallele dans un reseau informatique global
US13455299P 1999-05-17 1999-05-17
US60/134,552 1999-05-17

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WO1999061998A2 true WO1999061998A2 (fr) 1999-12-02
WO1999061998A3 WO1999061998A3 (fr) 2000-02-10
WO1999061998A9 WO1999061998A9 (fr) 2000-06-22

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JP (1) JP2003524808A (fr)
AU (1) AU4194499A (fr)
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WO (1) WO1999061998A2 (fr)

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JP5747389B2 (ja) * 2012-08-31 2015-07-15 日本電信電話株式会社 計算機資源割当装置及び方法及びプログラム
JP6198175B2 (ja) * 2014-02-20 2017-09-20 株式会社デンソー 通信回路

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CA2330952A1 (fr) 1999-12-02
EP1078320A2 (fr) 2001-02-28
AU4194499A (en) 1999-12-13
WO1999061998A3 (fr) 2000-02-10
WO1999061998A9 (fr) 2000-06-22

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