WO1999058988A1 - Switchable digital input/output circuit - Google Patents

Switchable digital input/output circuit Download PDF

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Publication number
WO1999058988A1
WO1999058988A1 PCT/DE1999/001243 DE9901243W WO9958988A1 WO 1999058988 A1 WO1999058988 A1 WO 1999058988A1 DE 9901243 W DE9901243 W DE 9901243W WO 9958988 A1 WO9958988 A1 WO 9958988A1
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WO
WIPO (PCT)
Prior art keywords
input
signal
comparator
circuit
digital input
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Application number
PCT/DE1999/001243
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German (de)
French (fr)
Inventor
Mario Maier
Original Assignee
Siemens Aktiengesellschaft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Aktiengesellschaft filed Critical Siemens Aktiengesellschaft
Priority to EP99929031A priority Critical patent/EP1078270A1/en
Publication of WO1999058988A1 publication Critical patent/WO1999058988A1/en

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D3/00—Indicating or recording apparatus with provision for the special purposes referred to in the subgroups
    • G01D3/02—Indicating or recording apparatus with provision for the special purposes referred to in the subgroups with provision for altering or correcting the law of variation

Definitions

  • the present invention relates to a switchable digital input circuit for use in particular in digital input modules for connecting different input physics, e.g. 24 V DC encoder or Namur encoder according to DIN 19234.
  • the object of the present invention is therefore to provide a switchable digital input circuit to which at least two different input physics can be connected.
  • a digital input circuit in that the shunt resistor is switched on or off with the aid of the switchover signal, depending on which input physics is required. Furthermore, the corresponding input signal is carried by the respective comparators via a switchover unit, in particular a multiplexer module, and is output there, and is thus available for tapping by evaluation logic, which e.g. is implemented as an ASIC or a microcontroller.
  • FIG. 1 shows a block diagram of the digital input circuit
  • FIG. 2 shows the digital input circuit.
  • the digital input circuit has an input 9, to which the input signal is present during operation.
  • a first comparator 1 and a second comparator 2 are connected to the input 9.
  • the respective output signals of the two comparators 1, 2 are fed to a switchover unit 5, which is designed in particular as a multiplexer 5.
  • the switchover unit 5 is controlled by a switchover signal 10, with which a shunt resistor 7 connected to the input 9 can also be switched on or off.
  • the first input physics is a 24 V DC encoder and the second input physics is a Namur encoder according to DIN 19234.
  • the first comparator 1 for the 24 V signal compares the input signal 9 with a switching threshold for the 24 V Input which can be specified as the first threshold value at the comparator 1 at its input 16.
  • the comparator 2 for the Namur signal compares the input signal 9 with a switching threshold for the Namur input, which can be supplied to the comparator 2 at its input 18 as a second threshold value.
  • the input signal 9 flows through input resistors (not shown in FIG. 1) for the 24 V input and the shunt resistor 7, since the input resistance for Namur inputs is lower than for 24 V inputs.
  • the Namur comparator 2 is required because the switching thresholds of a Namur input are different from those of a 24 V input.
  • the shunt resistor 7 is supplied with the switchover signal 10, which undergoes potential separation, signal amplification and signal inversion by means of a circuit 8 only shown in FIG.
  • the electrically isolated changeover signal is designated 10.1 in FIG.
  • the multiplexer 5 either switches the output signal of the first comparator 1 for the 24 V signal or the second comparator 2 for the Namur signal to the output signal 12 of the multiplexer 5.
  • Inputs can be connected.
  • the overvoltage detection circuit 3 is used to detect overvoltages (short circuit) in the Na ur signal.
  • the comparator of the overvoltage detection circuit 3 compares the input signal 9 with a reference voltage which can be predetermined by the overvoltage detection circuit 3 via its input 17 and, in the event of overvoltage, outputs a signal which can be evaluated by evaluation logic 6 shown only in FIG.
  • the undervoltage detection circuit 4 is used to detect undervoltage (wire break in the Namur signal).
  • the comparator of the undervoltage detection circuit 4 compares the input signal with a reference voltage which can be predetermined by the undervoltage detection circuit 4 via its input 19 and, in the event of undervoltage, outputs a signal which can be evaluated by means of the evaluation logic 6 shown only in FIG.
  • the evaluation logic 6 effects the potential separation and ORing of the overvoltage detection circuit 3 and
  • Undervoltage detection circuit 4 output signal.
  • the output signal 11 of the evaluation logic 6 can be processed further by an ASIC, microcontroller or microprocessor provided for this purpose, not shown in the figures.
  • a reference voltage generator (not shown) is used to generate the reference voltages for the comparators 1, 2, 3, 4 and gives at its outputs the inputs 16, 17, 18 and 19 of the comparators 1, 2, 3 and 4, respectively Reference voltages.
  • the output signal 12 output by the multiplexer 5 is fed to the potential isolation circuit 13 only shown in FIG.
  • the circuits 13.1, 13.2 and 13.3 which are constructed analogously to the potential separation circuit 13 are provided and can each be controlled via signal 12.1, 12.2 or 12.3 which can be output by the multiplexer 5.
  • potential isolation circuit 13 potential isolation is achieved via optocouplers.
  • the input delay of the two input physics is set by an RC element and an output signal 20 with steep edges is generated by a subsequent Schmitt trigger module reflects the state of the input signal 9.
  • This output signal 20 can be further processed by an ASIC, microcontroller or microprocessor.

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  • Engineering & Computer Science (AREA)
  • Technology Law (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

The invention relates to a digital input/output circuit with an input (9), a first comparator (1) attached thereto, a second comparator (2) equally attached thereto, wherein a first threshold value can be fed to the first comparator (1) by means of its input (16) and a second threshold value can be fed to the second comparator (2) by means of its input. Said circuit also comprises a shunt resistor (7) connected to the input (9) that can be shut on or off by means of a switching signal (10) and a switching unit (5) that can be controlled by means of the switching signal (10). The output signal of the first comparator (1) and the output signal of the second comparator (2) are applied on at least two inputs of said switching unit, which emits either the signal applied on the first or on the second input as an output signal (20) depending on the switching signal (10).

Description

Beschreibungdescription
Umschaltbare DigitaleingabeschaltungSwitchable digital input circuit
Die vorliegende Erfindung betrifft eine umschaltbare Digitaleingabeschaltung zur Verwendung insbesondere in Digitaleingabebaugruppen zum Anschluß unterschiedlicher Eingangsphysik, z.B. 24 V DC-Geber oder Namur-Geber nach DIN 19234.The present invention relates to a switchable digital input circuit for use in particular in digital input modules for connecting different input physics, e.g. 24 V DC encoder or Namur encoder according to DIN 19234.
Im bekannt gewordenen Stand der Technik ist keine Möglichkeit zur Parametrierung einer Digitaleingabeschaltung bekannt, so daß für jede Eingangsphysik eine separate Digitaleingangsschaltung aufgebaut werden muß.In the state of the art that has become known, no possibility of parameterizing a digital input circuit is known, so that a separate digital input circuit must be set up for each input physics.
Die Aufgabe der vorliegenden Erfindung besteht daher darin, eine umschaltbare Digitaleingabeschaltung anzugeben, an die mindestens zwei unterschiedliche Eingangsphysiken anschließbar sind.The object of the present invention is therefore to provide a switchable digital input circuit to which at least two different input physics can be connected.
Diese Aufgabe wird mit einer Digitaleingangsschaltung gemäß Anspruch 1 gelöst, indem mit Hilfe des Umschaltsignals, je nachdem welche Eingangsphysik benötigt wird, der Shunt-Widerstand zu oder abgeschaltet wird. Ferner wird das entsprechende Eingangssignal von den jeweiligen Komparatoren über eine Umschalteinheit, insbesondere einen Multiplexer-Baustein, geführt und dort ausgegeben und steht damit zum Abgriff durch eine Auswertelogik, die z.B. als ASIC oder MikroController realisiert ist, zur Verfügung.This object is achieved with a digital input circuit according to claim 1, in that the shunt resistor is switched on or off with the aid of the switchover signal, depending on which input physics is required. Furthermore, the corresponding input signal is carried by the respective comparators via a switchover unit, in particular a multiplexer module, and is output there, and is thus available for tapping by evaluation logic, which e.g. is implemented as an ASIC or a microcontroller.
Weitere Merkmale, Vorteile und Anwendungsmöglichkeiten derOther features, advantages and possible uses of the
Erfindung ergeben sich aus der nachfolgenden Beschreibung eines Ausführungsbeispiels anhand der Zeichnung und der Zeichnung selbst. Dabei bilden alle beschriebenen und/oder bildlich dargestellten Merkmale für sich oder in beliebiger Kom- bination den Gegenstand der vorliegenden Erfindung. Dabei zeigt :Invention emerge from the following description of an exemplary embodiment with reference to the drawing and the drawing itself. All of the described and / or illustrated features form the subject matter of the present invention on their own or in any combination. It shows:
FIG 1 ein Blockschaltbild der Digitaleingangsschaltung, FIG 2 die Digitaleingangsschaltung.1 shows a block diagram of the digital input circuit, FIG. 2 shows the digital input circuit.
Gemäß FIG 1 weist die Digitaleingangsschaltung einen Eingang 9 auf, an dem im Betrieb das Eingangssignal anliegt. An den Eingang 9 ist ein erster Komparator 1 und ein zweiter Komparator 2 angeschlossen. Die jeweiligen Ausgangssignale der beiden Komparatoren 1, 2 werden einer Umschalteinheit 5, die insbesondere als Multiplexer 5 ausgebildet ist, zugeführt. Die Umschalteinheit 5 wird von einem Umschaltsignal 10 angesteuert, mit dem darüber hinaus ein an den Eingang 9 angeschlossener Shunt-Widerstand 7 zu- oder abschaltbar ist.According to FIG. 1, the digital input circuit has an input 9, to which the input signal is present during operation. A first comparator 1 and a second comparator 2 are connected to the input 9. The respective output signals of the two comparators 1, 2 are fed to a switchover unit 5, which is designed in particular as a multiplexer 5. The switchover unit 5 is controlled by a switchover signal 10, with which a shunt resistor 7 connected to the input 9 can also be switched on or off.
Gemäß dem Ausführungsbeispiel sei die erste Eingangsphysik ein 24 V-DC-Geber und die zweite Eingangsphysik ein Namur- Geber nach DIN 19234. Der erste Komparator 1 für das 24 V- Signal vergleicht das Eingangssignal 9 mit einer Schalt- schwelle für den 24 V-Eingang, die dem Komparator 1 an dessen Eingang 16 als erster Schwellwert vorgebbar ist. Der Komparator 2 für das Namur-Signal vergleicht das Eingangssignal 9 mit einer Schaltschwelle für den Namur-Eingang, die dem Komparator 2 an dessen Eingang 18 als zweiter Schwellwert zu- führbar ist.According to the exemplary embodiment, the first input physics is a 24 V DC encoder and the second input physics is a Namur encoder according to DIN 19234. The first comparator 1 for the 24 V signal compares the input signal 9 with a switching threshold for the 24 V Input which can be specified as the first threshold value at the comparator 1 at its input 16. The comparator 2 for the Namur signal compares the input signal 9 with a switching threshold for the Namur input, which can be supplied to the comparator 2 at its input 18 as a second threshold value.
Das Eingangssignal 9 fließt über in FIG 1 nicht dargestellte Eingangswiderstände für den 24 V-Eingang und den Shunt-Widerstand 7, da der Eingangswiderstand für Namur-Eingänge gerin- ger als für 24 V-Eingänge ist. Der Namur-Komparator 2 ist erforderlich, da die Schaltschwellen eines Namur-Einganges anders als bei einem 24 V-Eingang liegen. Dem Shunt-Widerstand 7 wird das Umschaltsignal 10 zugeführt, welches durch eine nur in FIG 2 dargestellte Schaltung 8 eine Potentialtrennung, Signalverstärkung und Signalinvertierung erfährt. Das potentialgetrennte Umschaltsignal ist in FIG 2 mit 10.1 bezeichnet . Der Multiplexer 5 schaltet in Abhängigkeit vom Umschaltsignal 10 entweder das Ausgangssignal des ersten Komparators 1 für das 24 V-Signal oder des zweiten Komparators 2 für das Namur- Signal auf das Ausgangssignal 12 des Multiplexers 5. Selbst- verständlich können an den Multiplexer 5 noch weitere Eingänge angeschlossen werden.The input signal 9 flows through input resistors (not shown in FIG. 1) for the 24 V input and the shunt resistor 7, since the input resistance for Namur inputs is lower than for 24 V inputs. The Namur comparator 2 is required because the switching thresholds of a Namur input are different from those of a 24 V input. The shunt resistor 7 is supplied with the switchover signal 10, which undergoes potential separation, signal amplification and signal inversion by means of a circuit 8 only shown in FIG. The electrically isolated changeover signal is designated 10.1 in FIG. Depending on the switchover signal 10, the multiplexer 5 either switches the output signal of the first comparator 1 for the 24 V signal or the second comparator 2 for the Namur signal to the output signal 12 of the multiplexer 5. Of course, other multiplexers 5 can also be used Inputs can be connected.
Die Überspannungserkennungsschaltung 3 dient zum Erkennen von Überspannungen (Kurzschluß) beim Na ur-Signal . Der Komparator der Überspannungserkennungsschaltung 3 vergleicht das Eingangssignal 9 mit einer der Überspannungserkennungsschaltung 3 über dessen Eingang 17 vorgebbaren Referenzspannung und gibt bei Überspannung ein Signal aus, das von nur in FIG 2 dargestellten Auswertelogik 6 auswertbar ist.The overvoltage detection circuit 3 is used to detect overvoltages (short circuit) in the Na ur signal. The comparator of the overvoltage detection circuit 3 compares the input signal 9 with a reference voltage which can be predetermined by the overvoltage detection circuit 3 via its input 17 and, in the event of overvoltage, outputs a signal which can be evaluated by evaluation logic 6 shown only in FIG.
Die Unterspannungserkennungsschaltung 4 dient zur Erkennung von Unterspannungen (Drahtbruch beim Namur-Signal) . Der Komparator der Unterspannungserkennungsschaltung 4 vergleicht das Eingangssignal mit einer der Unterspannungserkennungs- Schaltung 4 über dessen Eingang 19 vorgebbaren Referenzspannung und gibt bei Unterspannung ein mittels der nur in FIG 2 dargestellten Auswertelogik 6 auswertbares Signal aus.The undervoltage detection circuit 4 is used to detect undervoltage (wire break in the Namur signal). The comparator of the undervoltage detection circuit 4 compares the input signal with a reference voltage which can be predetermined by the undervoltage detection circuit 4 via its input 19 and, in the event of undervoltage, outputs a signal which can be evaluated by means of the evaluation logic 6 shown only in FIG.
Die Auswertelogik 6 bewirkt die Potentialtrennung und Verode- rung des von der Überspannungserkennungsschaltung 3 und derThe evaluation logic 6 effects the potential separation and ORing of the overvoltage detection circuit 3 and
Unterspannungserkennungsschaltung 4 ausgegebenen Signals. Das Ausgangssignal 11 der Auswertelogik 6 kann von einem dafür vorgesehenen, in den Figuren nicht dargestellten ASIC, Mikro- controller oder Mikroprozessor weiterverarbeitet werden.Undervoltage detection circuit 4 output signal. The output signal 11 of the evaluation logic 6 can be processed further by an ASIC, microcontroller or microprocessor provided for this purpose, not shown in the figures.
Ein nicht dargestellter Referenzspannungsgenerator dient zur Erzeugung der Referenzspannungen für die Komparatoren 1, 2, 3, 4 und gibt an seinen Ausgängen, die den jeweiligen Eingängen 16, 17, 18 bzw. 19 der Komparatoren 1, 2, 3 bzw. 4 zu- führbaren Referenzspannungen aus. Das vom Multiplexer 5 ausgegebene Ausgangssignal 12 wird gemäß dem Ausführungsbeispiel der nur in FIG 2 dargestellten Potentialtrennungsschaltung 13 zugeleitet. Für den Fall weiterer Eingänge sind die zu der Potentialtrennungsschaltung 13 analog aufgebauten Schaltungen 13.1, 13.2 und 13.3 vorgesehen, die jeweils über vom Multiplexer 5 ausgebbares Signal 12.1, 12.2 bzw. 12.3 ansteuerbar sind. Mit der Potentialtrennungsschaltung 13 wird eine Potentialtrennung über Optokoppler erreicht, ferner wird durch ein RC-Glied die Eingangsver- zögerung der beiden Eingangsphysiken (24 V bzw. Namur) eingestellt und durch einen nachfolgenden Schmitt-Trigger Baustein ein Ausgangssignal 20 mit steilen Flanken erzeugt, das den Zustand des Eingangssignals 9 widerspiegelt. Dieses Ausgangssignal 20 kann von einem ASIC, MikroController oder Mikropro- zessor weiterverarbeitet werden. A reference voltage generator (not shown) is used to generate the reference voltages for the comparators 1, 2, 3, 4 and gives at its outputs the inputs 16, 17, 18 and 19 of the comparators 1, 2, 3 and 4, respectively Reference voltages. According to the exemplary embodiment, the output signal 12 output by the multiplexer 5 is fed to the potential isolation circuit 13 only shown in FIG. In the event of further inputs, the circuits 13.1, 13.2 and 13.3 which are constructed analogously to the potential separation circuit 13 are provided and can each be controlled via signal 12.1, 12.2 or 12.3 which can be output by the multiplexer 5. With the potential isolation circuit 13, potential isolation is achieved via optocouplers. Furthermore, the input delay of the two input physics (24 V or Namur) is set by an RC element and an output signal 20 with steep edges is generated by a subsequent Schmitt trigger module reflects the state of the input signal 9. This output signal 20 can be further processed by an ASIC, microcontroller or microprocessor.

Claims

PatentanspruchClaim
Digitaleingangsschaltung mit einem Eingang (9) , - einem daran angeschlossenen ersten Komparator (1) , einem gleichfalls daran angeschlossenen zweiten Komparator (2), wobei dem ersten Komparator (1) über dessen Eingang (16) ein erster Schwellwert und dem zweiten Kompara- tor (2) über dessen Eingang (18) ein zweiter Schwellwert zuführbar ist, einem an den Eingang (9) angeschlossenen, mittels eines Umsehaltsignals (10) zu- bzw. abschaltbaren Shunt-Widerstand (7) und - einer mittels des Umschaltsignals (10) ansteuerbaren Umschalteinheit (5), an deren mindestens zwei Eingängen einerseits das Ausgangssignal des ersten Komparators (1) und andererseits des Ausgangssignal des zweiten Komparators (2) anliegt, die als Ausgangssignal (20) in Abhängigkeit vom Umschaltsignal (10) entweder das am ersten oder das am zweiten Eingang anstehende Signal ausgibt. Digital input circuit with an input (9), a first comparator (1) connected to it, a second comparator (2) also connected to it, the first comparator (1) via its input (16) a first threshold value and the second comparator (2) via the input (18) of which a second threshold value can be supplied, a shunt resistor (7) connected to the input (9) which can be switched on or off by means of a switching signal (10) and - one by means of the switching signal (10) controllable switchover unit (5), at the at least two inputs of which the output signal of the first comparator (1) and the output signal of the second comparator (2) are present, which as output signal (20) depending on the switchover signal (10) either on the first or outputs the signal present at the second input.
PCT/DE1999/001243 1998-05-08 1999-04-26 Switchable digital input/output circuit WO1999058988A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP99929031A EP1078270A1 (en) 1998-05-08 1999-04-26 Switchable digital input/output circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE1998120611 DE19820611C1 (en) 1998-05-08 1998-05-08 Switchable digital input circuit
DE19820611.9 1998-05-08

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9541604B2 (en) 2013-04-29 2017-01-10 Ge Intelligent Platforms, Inc. Loop powered isolated contact input circuit and method for operating the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4771403A (en) * 1984-11-16 1988-09-13 Allen-Bradley Company, Inc. I/O module with multi-function integrated circuits and an isolation interface for multiplexing data between a main processor and I/O devices
EP0546855A1 (en) * 1991-12-13 1993-06-16 Moore Products Co. Multi-mode input/output circuit and module, and process control system using same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19653291C1 (en) * 1996-12-20 1998-04-02 Pepperl & Fuchs Sensor and evaluation system for end position and threshold value detection

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4771403A (en) * 1984-11-16 1988-09-13 Allen-Bradley Company, Inc. I/O module with multi-function integrated circuits and an isolation interface for multiplexing data between a main processor and I/O devices
EP0546855A1 (en) * 1991-12-13 1993-06-16 Moore Products Co. Multi-mode input/output circuit and module, and process control system using same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9541604B2 (en) 2013-04-29 2017-01-10 Ge Intelligent Platforms, Inc. Loop powered isolated contact input circuit and method for operating the same

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DE19820611C1 (en) 1999-09-09
EP1078270A1 (en) 2001-02-28

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