WO1999020082A1 - Method of and apparatus for generating an electrical signal - Google Patents
Method of and apparatus for generating an electrical signal Download PDFInfo
- Publication number
- WO1999020082A1 WO1999020082A1 PCT/AU1998/000839 AU9800839W WO9920082A1 WO 1999020082 A1 WO1999020082 A1 WO 1999020082A1 AU 9800839 W AU9800839 W AU 9800839W WO 9920082 A1 WO9920082 A1 WO 9920082A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- voltage
- switching device
- gating
- portions
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
- H03K17/168—Modifications for eliminating interference voltages or currents in composite switches
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
- H02M5/02—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
- H02M5/04—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
- H02M5/22—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M5/25—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
- H02M5/257—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B39/00—Circuit arrangements or apparatus for operating incandescent light sources
- H05B39/04—Controlling
- H05B39/041—Controlling the light-intensity of the source
- H05B39/044—Controlling the light-intensity of the source continuously
- H05B39/048—Controlling the light-intensity of the source continuously with reverse phase control
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B39/00—Circuit arrangements or apparatus for operating incandescent light sources
- H05B39/04—Controlling
- H05B39/08—Controlling by shifting phase of trigger voltage applied to gas-filled controlling tubes also in controlled semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0029—Circuits or arrangements for limiting the slope of switching signals, e.g. slew rate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
Definitions
- This invention relates to a method of and an apparatus for generating an electrical signal having a hybrid waveform, that is a waveform that is composed of merged signal portions that have different fundamental frequencies.
- the invention has application in the generation of an electrical signal having a waveform containing minimal harmonic components.
- a lamp dimmer control circuit normally incorporates a solid state ac switching device, such as a triac, and a gating circuit for gating the switching device into conduction for a selected conduction angle during each half-cycle of the supply voltage.
- the conduction angle is varied by adjusting the phase-angle at which the switching device is gated during each half-cycle and, hence, the lamp illumination level is controlled in accordance with the average level of current flow through the lamp during each half-cycle. If the lamp circuit is substantially resistive, when the switching device is gated into conduction the voltage rise time across the lamp is substantially instantaneous, this resulting in the creation of high order Fourier (harmonic) components and, consequentially, resulting in the radiation of high frequency electromagnetic interference. The effect of this interference is limited, under constraints imposed by Regulatory authorities, by incorporating an LC filter in circuit with the switching device.
- induetive/capacitive filter elements must be increased to a level where they cannot conveniently be housed within a wall switch unit and/or be increased to a level that makes them prohibitively expensive. This applies particularly to high power dimmer control devices, for example those that are rated at 50OVA or higher.
- the present invention seeks to minimise these problems by limiting the harmonic components of a controlled voltage waveform and, as a consequence, by reducing the need for rf filtering.
- the present invention provides a method of generating an electrical signal and which comprises merging portions of first and second sinusoidal form signals in selected half-periods of the first signal to establish a hybrid waveform within the selected half-periods.
- the second signal portions are generated at a frequency which is significantly greater than that of the first signal.
- the invention may also be defined in terms of an apparatus for use in generating an electrical signal having a hybrid waveform.
- the apparatus comprises a switching device which is arranged to be located in circuit with a load to which a first sinusoidal form voltage is applied in use of the apparatus, a gating circuit arranged to generate a biasing signal which changes (ie, rises or falls) sinusoidally at a rate which is significantly greater than the frequency of the first voltage and to apply the biasing signal to the switching device in selected half-periods of the first voltage whereby the waveform of the voltage across the load is formed as a merger of portions of the waveforms of the first voltage and a second sinusoidal form voltage that appears across the load with application of the biasing signal to the switching device.
- the apparatus comprises a first switching device which is arranged to be located in series with a load and in circuit with an alternating voltage supply for the load, a first gating circuit arranged to generate and apply gating signals to the first switching device at a selected phase angle in selected half-periods of the supply voltage, a second switching device located in parallel with the first switching device, and a second gating circuit arranged to generate and apply biasing signals to the second switching device in the selected half-periods of the supply voltage.
- the second gating circuit is arranged to generate the biasing signals as portions of a sinusoidal form voltage signal which is generated at a frequency which is significantly greater than that of the supply voltage.
- means are provided for synchronising the first and second gating circuits to cause the second switching device to be biased into conduction immediately prior to gating of the first switching device, whereby the waveform of the voltage that appears across the load in use of the apparatus is formed as a merger of portions of the waveforms of the supply voltage and a second, sinusoidal form, voltage that appears across the load with application of the biasing signal to the second switching device.
- the voltage that is applied to the load comprises a merger of two partial sinusoidal waveforms.
- the resultant hybrid waveform will be composed of two fundamental frequencies and, assuming substantially uniform merging of the two partial waveforms, no significant harmonics of the fundamentals . This obviates or at least reduces the need for rf filtering.
- circuit elements In low power applications of the invention, such as in dimmer control circuits, most of the circuit elements may be embodied in an integrated circuit.
- the periodic load voltage waveform may be non-alternating or, as would more normally be the case, alternating. In the latter case, the merging of the partial waveforms of the first and second voltages will be made during each half-period of the first voltage.
- the ratio of frequency (f 2 ) of the second signal (or voltage) to the frequency (f 1 ) of the first signal (or voltage) will be dependent upon the steepness required of the wavefront of the hybrid voltage waveform, and it is preferred that the ratio f 2 /f x will be equal to or greater than 4.
- the ratio t 2 /l 1 will be within the range 500 to 5,000, and for a dimmer control circuit the ratio may be in the order of 2,000. That is, for a supply voltage having a frequency of 50Hz, the second voltage will be generated with a frequency in the order of lOOKHz.
- FIG. 1 is a schematic representation of a circuit that embodies the principles of the invention
- Figure 2 is a schematic representation of an alternative form of the circuit of Figure 1 ,
- FIG 3 shows graphically the voltages at the various points in the circuits as illustrated in Figures 1 and 2
- Figure 4 shows diagrammatically a circuit in accordance with a preferred embodiment of the invention
- FIG. 5 shows graphically the voltages at various points in the circuit of Figure 4,
- Figure 6 shows a specific circuit arrangement that embodies the arrangement that is shown diagrammatically in Figure 4.
- Figure 7 shows a schematic representation of a circuit which may be employed to implement the invention in an alternative manner from that shown in Figures 1 and 2
- Figure 8 shows graphically the voltages at various points in the circuit of Figure 7 ,
- Figure 9 shows an alternative form of the circuit as illustrated in Figure 7, and Figure 10 shows a graphical representation of the voltages at various points in the circuit of Figure 9.
- the circuit includes a load in the form of an incandescent lamp 10 which is connected in series with a first solid state switching device in the form of a triac 11 and across a mains supply
- a first gating circuit 13 is provided for applying a gating pulse to the triac at a selected phase-angle during each half-cycle (ie, during each half-period) of the supply voltage.
- a second solid state switching device in the form of an FET 14 is connected in parallel with the triac 11 and across a rectifier bridge 15.
- a second gating circuit 16 is provided for applying a gating (ie, a biasing) signal to the FET 14 immediately prior to gating of the triac during each half-cycle of the supply voltage.
- the first gating circuit 13 may be in the form of a conventional gating circuit of the type that customarily is employed for gating a triac in a lamp dimmer control circuit.
- the gating circuit 13 includes a potentiometer 13a for selectively varying the phase-angle at which the triac is gated into conduction during each half-cycle of the supply voltage .
- the second gating circuit 16 includes an oscillator stage for generating a sinusoidal-form alternating voltage at a frequency f 2 that is high relative to the frequency f x of the supply voltage 12.
- the oscillator voltage, labelled voltage V 1 might typically have a frequency in the order of lOOKHz.
- the second gating circuit 16 includes an output stage which is synchronised with the first gating circuit 13 to provide periodic biasing signals, each of which has a waveform corresponding to the peak-to-peak half-period of the oscillator stage output waveform and each of which has a voltage level V 2 equal to the peak-to-peak voltage of the oscillator stage output voltage V 1 .
- Each biasing signal from the second gating circuit 16 is generated during a time interval immediately preceding the generation of each gating pulse from the gating circuit 13.
- Figure 2 of the drawings shows a schematic representation of an alternative form of the circuit which has been described above with reference to Figure 1 and like reference numerals are employed to identify like parts. However in the circuit of Figure 2, two FET's 14a and 14b are employed as an alternative to the single FET 14 shown in Figure 1, and two back-to-back diodes 17 are employed as an alternative to the bridge rectifier 15 as shown in Figure 1.
- the operation of the circuits that are illustrated in Figures 1 and 2 may also be explained by reference to the voltage waveforms that are shown in Figure 3.
- the voltage waveform V 1 is generated within the second gating circuit 16 and a biasing signal V 2 having a voltage level equal to the peak-to-peak value of the voltage V x is passed as an output signal once during each half-cycle of the supply voltage.
- the waveform of the supply voltage is shown by the dotted outline that is superimposed on the oscillator voltage V 1 , although the frequency scale of the voltage V 2 is expanded greatly relative to that of the supply voltage for illustrative purposes.
- the voltage V 1 might typically be generated at a frequency of lOOKHz, whilst the supply voltage frequency would normally alternate at a 50Hz or a 60Hz rate.
- the successive signals V 2 are applied as biasing signals to the gate of the FET 14 during successive half-cycles of the supply.
- the FET 14 is biased into conduction during each half-cycle of the supply, this resulting in the establishment of a voltage V 4 across the load 10 during the period that the gating signal is applied to the FET.
- the voltage V 4 across the load will have the same waveform and period as the biasing signal V 2 .,and the amplitude of the voltage V 4 will be determined by the gain of the FET to obtain merging of the waveforms of the voltages of V 1 and V 5 as described below.
- the gating pulse V 3 is generated by the gating circuit 13 and is applied to the gate of the triac 11. This results in the triac 11 being gated into conduction, and this in turn results in the establishment of a voltage V 5 across the load during the remaining period of each half-cycle of the supply voltage following gating of the triac .
- the two (partial) waveforms V 4 and V 5 merge into one another to create the hybrid voltage waveform V 4 , 5 across the load, as shown in the lower graphical representation of Figure 3.
- the circuit as shown in Figure 4 embodies all of the elements of that shown in Figure 1 and, here again, like reference numerals are employed to identify like components.
- the circuit includes a load in the form of a lamp 10 which is connected in series with a triac 11 across a main supply voltage 12, and a gating circuit 13 is provided for applying a gating signal to the triac at a selected phase-angle during each half-cycle of the supply voltage .
- An FET 14 is connected in parallel with the triac 11 and across a rectifier bridge 15, and Figure 4 illustrates a preferred circuit arrangement for generating biasing signals to be applied to the FET 14.
- the circuit arrangement which may be considered in conjunction with the voltage waveforms shown in Figure 5, includes a bridge rectifier 20 which is connected across the supply 12 and which provides an input voltage V 6 to a timer circuit 21.
- the timer circuit is employed to generate an output signal V 7 which is composed of a series of pulses that rise to a logical 1 level when the voltage V 6 drops to 0 and which fall to a logical zero level following expiration of a selected time period t corresponding to a selected phase-angle during each half-cycle of the supply voltage.
- the period of each pulse of the output signal V 7 may be adjustable between 0 and 10 milliseconds in the case of a 50Hz supply.
- a signal generator 22 is provided for generating two synchronised output signals at a lOOKHz rate.
- One of the output signals, a sinewave signal V 8 is applied to an analogue switching circuit 23, and the other output signal comprises a square wave signal V 9 which is applied to a flip-flop circuit 24.
- the flip-flop circuit 24 functions to provide an output pulse V 10 which corresponds to input signal V 9 but only when the output signal V 7 from the timer circuit 21 goes low.
- the flip-flop circuit provides the output pulse V 10 at a selected interval during each half-cycle of the voltage V 6 .
- the output voltage V 10 from the flip-flop circuit 24 is employed to gate the analogue switching circuit 23, and the analogue switching circuit provides an output signal V 1JL .
- the output signal V 1X comprises a portion of the sinusoidal signal V 8 that exists during the interval of the pulse V 10 which is provided as an output from the flip-flop circuit 24.
- the output signal V l ⁇ is employed to bias the FET 14 into conduction once during each half-cycle of the supply
- each output voltage pulse V 10 from the flip-flop circuit 24 is employed also to initiate an output pulse V 12 from the triac gating circuit 13.
- the output pulse V 12 is employed to gate the triac 11 once during each half-cycle of the supply immediately following gating of the FET 14.
- the triac 11 is gated into conduction the voltage V 13 across the load 10 will follow the waveform of the mains supply voltage 12 for the remaining period of the supply half-cycle during which triac gating is effected.
- the total waveform of the load voltage V 13 will comprise a merger of the two partial waveforms that flow from successive biasing/gating of the FET 14 and the triac 11.
- each partial waveform has a (partial) sinusoidal form.
- Figure 6 of the drawings shows a circuit arrangement that embodies the operating characteristics of the circuit that is illustrated diagrammatically in Figure 4.
- the circuit that is shown in Figure 6 has application to dimmer control of an incandescent lamp and the values of the electrical components as indicated in Figure 6 are applicable to a 1000VA circuit.
- FIG. 7 of the drawings illustrates an alternative approach to signal conditioning and shows a circuit which avoids the need for a triac and, hence, a triac gating circuit.
- a signal generator 30 is provided for generating an output signal V 15 at a frequency of lOOKHz.
- a following signal generator 31 is provided to generate a gating signal V 16 having a leading edge that corresponds with one half-cycle of the output signal V 15 and a trailing square wave portion during each half-cycle of the supply voltage 12.
- the gating signal V 16 is applied to the FET 14 and, when the FET is gated into conduction the voltage waveform V 17 will appear across the load 10.
- the load voltage will be constituted by a merger of two sinusoidal voltage waveforms, one corresponding to a half-cycle of the voltage waveform V 15 and the other being constituted by a portion of the supply voltage 12.
- Figure 9 shows a circuit arrangement which is similar to that described above with reference to Figures 7 and 8, but one in which output signals V 18 from the signal generator 31 have a trailing edge that is shaped as the waveform of the voltage output V 15 from the preceding generator 30.
- the signal waveforms are shown in Figure 10.
- circuit of Figure 7 may be employed to produce the waveforms as shown in Figure 10
- circuit of Figure 9 may be employed to produce the waveforms as shown in Figure 8.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Circuit Arrangements For Discharge Lamps (AREA)
- Circuit Arrangement For Electric Light Sources In General (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0007751A GB2345393B (en) | 1997-10-08 | 1998-10-08 | Method of and apparatus for generating an electrical signal |
AU94246/98A AU730896B2 (en) | 1997-10-08 | 1998-10-08 | Method of and apparatus for generating an electrical signal |
NZ503654A NZ503654A (en) | 1997-10-08 | 1998-10-08 | Generation of smooth pulse signal for powering of lamps and reduction of switching harmonics |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AUPO9654 | 1997-10-08 | ||
AUPO9654A AUPO965497A0 (en) | 1997-10-08 | 1997-10-08 | Method of and apparatus for conditioning or generating a voltage waveform |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1999020082A1 true WO1999020082A1 (en) | 1999-04-22 |
Family
ID=3803934
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/AU1998/000839 WO1999020082A1 (en) | 1997-10-08 | 1998-10-08 | Method of and apparatus for generating an electrical signal |
Country Status (4)
Country | Link |
---|---|
AU (1) | AUPO965497A0 (en) |
GB (1) | GB2345393B (en) |
NZ (1) | NZ503654A (en) |
WO (1) | WO1999020082A1 (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1111787A1 (en) * | 1999-12-24 | 2001-06-27 | Sgs Thomson Microelectronics Sa | Analog generator of voltage pulses |
EP1713167A2 (en) * | 2005-04-14 | 2006-10-18 | Vimar SpA | Electrical power supply regulator device |
US8664881B2 (en) | 2009-11-25 | 2014-03-04 | Lutron Electronics Co., Inc. | Two-wire dimmer switch for low-power loads |
US8698408B2 (en) | 2009-11-25 | 2014-04-15 | Lutron Electronics Co., Inc. | Two-wire dimmer switch for low-power loads |
US8729814B2 (en) | 2009-11-25 | 2014-05-20 | Lutron Electronics Co., Inc. | Two-wire analog FET-based dimmer switch |
US8957662B2 (en) | 2009-11-25 | 2015-02-17 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US8988050B2 (en) | 2009-11-25 | 2015-03-24 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US9160224B2 (en) | 2009-11-25 | 2015-10-13 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
EP3095182A4 (en) * | 2014-01-13 | 2017-08-16 | Lutron Electronics Co., Inc. | Two-wire load control device for low-power loads |
US11870334B2 (en) | 2009-11-25 | 2024-01-09 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AUPP944799A0 (en) * | 1999-03-25 | 1999-04-22 | H.P.M. Industries Pty Limited | Control circuit |
GB2363404A (en) * | 2000-06-17 | 2001-12-19 | Ozdemir Keskin | Wall cladding: thermal insulation |
Citations (5)
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---|---|---|---|---|
US4633161A (en) * | 1984-08-15 | 1986-12-30 | Michael Callahan | Improved inductorless phase control dimmer power stage with semiconductor controlled voltage rise time |
US5424618A (en) * | 1992-06-04 | 1995-06-13 | Bertenshaw; David R. | Arrangements for reducing interference from a dimming system, and dimmer therefor |
US5550440A (en) * | 1994-11-16 | 1996-08-27 | Electronics Diversified, Inc. | Sinusoidal inductorless dimmer applying variable frequency power signal in response to user command |
US5557174A (en) * | 1993-08-25 | 1996-09-17 | Tridonic Bauelemente Gmbh | Electronic ballast with dimmer and harmonics filter for supplying a load, for example a lamp |
US5672941A (en) * | 1984-08-15 | 1997-09-30 | Callahan; Michael | Inductorless controlled transition light dimmers optimizing output waveforms |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
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SU1251255A1 (en) * | 1984-04-19 | 1986-08-15 | Московский Институт Электронного Машиностроения | Versions of controlled thyristor a.c.voltage converter |
SU1714767A1 (en) * | 1990-01-18 | 1992-02-23 | Киевский Политехнический Институт Им.50-Летия Великой Октябрьской Социалистической Революции | Former of controlling pulses |
-
1997
- 1997-10-08 AU AUPO9654A patent/AUPO965497A0/en not_active Abandoned
-
1998
- 1998-10-08 WO PCT/AU1998/000839 patent/WO1999020082A1/en active IP Right Grant
- 1998-10-08 GB GB0007751A patent/GB2345393B/en not_active Expired - Fee Related
- 1998-10-08 NZ NZ503654A patent/NZ503654A/en unknown
Patent Citations (5)
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US4633161A (en) * | 1984-08-15 | 1986-12-30 | Michael Callahan | Improved inductorless phase control dimmer power stage with semiconductor controlled voltage rise time |
US5672941A (en) * | 1984-08-15 | 1997-09-30 | Callahan; Michael | Inductorless controlled transition light dimmers optimizing output waveforms |
US5424618A (en) * | 1992-06-04 | 1995-06-13 | Bertenshaw; David R. | Arrangements for reducing interference from a dimming system, and dimmer therefor |
US5557174A (en) * | 1993-08-25 | 1996-09-17 | Tridonic Bauelemente Gmbh | Electronic ballast with dimmer and harmonics filter for supplying a load, for example a lamp |
US5550440A (en) * | 1994-11-16 | 1996-08-27 | Electronics Diversified, Inc. | Sinusoidal inductorless dimmer applying variable frequency power signal in response to user command |
Non-Patent Citations (2)
Title |
---|
DERWENT ABSTRACT, Acc. No. 87-106782/15; & SU 1251255 A (MOSCOW ELECTRONIC ENGINEERING INSTITUTE) 15 August 1986. * |
DERWENT ABSTRACT, Acc. No. 93-016886/02; & SU 1714767 A (KIEV POLYTECHNIC) 23 February 1992. * |
Cited By (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1111787A1 (en) * | 1999-12-24 | 2001-06-27 | Sgs Thomson Microelectronics Sa | Analog generator of voltage pulses |
FR2803140A1 (en) * | 1999-12-24 | 2001-06-29 | St Microelectronics Sa | ANALOGUE VOLTAGE PULSE GENERATOR |
US6542022B2 (en) | 1999-12-24 | 2003-04-01 | Stmicroelectronics S.A. | Voltage pulse analog generator |
EP1713167A2 (en) * | 2005-04-14 | 2006-10-18 | Vimar SpA | Electrical power supply regulator device |
EP1713167A3 (en) * | 2005-04-14 | 2009-05-27 | Vimar SpA | Electrical power supply regulator device |
US9220157B2 (en) | 2009-11-25 | 2015-12-22 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US9343998B2 (en) | 2009-11-25 | 2016-05-17 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US8698408B2 (en) | 2009-11-25 | 2014-04-15 | Lutron Electronics Co., Inc. | Two-wire dimmer switch for low-power loads |
US8729814B2 (en) | 2009-11-25 | 2014-05-20 | Lutron Electronics Co., Inc. | Two-wire analog FET-based dimmer switch |
US8841849B2 (en) | 2009-11-25 | 2014-09-23 | Lutron Electronics Co., Inc. | Two-wire dimmer switch for low-power loads |
US8957662B2 (en) | 2009-11-25 | 2015-02-17 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US8970128B2 (en) | 2009-11-25 | 2015-03-03 | Lutron Electronics Co., Inc. | Load control device fo rhigh-efficiency loads |
US8987994B2 (en) | 2009-11-25 | 2015-03-24 | Lutron Electronics Co., Ltd. | Load control device for high-efficiency loads |
US8988058B2 (en) | 2009-11-25 | 2015-03-24 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US8988050B2 (en) | 2009-11-25 | 2015-03-24 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US9143051B2 (en) | 2009-11-25 | 2015-09-22 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US9161418B2 (en) | 2009-11-25 | 2015-10-13 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US9160224B2 (en) | 2009-11-25 | 2015-10-13 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US8664881B2 (en) | 2009-11-25 | 2014-03-04 | Lutron Electronics Co., Inc. | Two-wire dimmer switch for low-power loads |
US9343997B2 (en) | 2009-11-25 | 2016-05-17 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US8664889B2 (en) | 2009-11-25 | 2014-03-04 | Lutron Electronics Co., Inc. | Two-wire dimmer switch for low-power loads |
US9356531B2 (en) | 2009-11-25 | 2016-05-31 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US11991796B2 (en) | 2009-11-25 | 2024-05-21 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
US9853561B2 (en) | 2009-11-25 | 2017-12-26 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US9941811B2 (en) | 2009-11-25 | 2018-04-10 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US10128772B2 (en) | 2009-11-25 | 2018-11-13 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US10158300B2 (en) | 2009-11-25 | 2018-12-18 | Lutron Electronics Co., Inc. | Load control device for high-efficiency loads |
US10447171B2 (en) | 2009-11-25 | 2019-10-15 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
US10530268B2 (en) | 2009-11-25 | 2020-01-07 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
US10541620B2 (en) | 2009-11-25 | 2020-01-21 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
US10958187B2 (en) | 2009-11-25 | 2021-03-23 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
US10958186B2 (en) | 2009-11-25 | 2021-03-23 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
US11638334B2 (en) | 2009-11-25 | 2023-04-25 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
US11870334B2 (en) | 2009-11-25 | 2024-01-09 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
US11729874B2 (en) | 2009-11-25 | 2023-08-15 | Lutron Technology Company Llc | Load control device for high-efficiency loads |
EP4184772A1 (en) * | 2014-01-13 | 2023-05-24 | Lutron Technology Company LLC | Two-wire load control device for low-power loads |
EP3095182A4 (en) * | 2014-01-13 | 2017-08-16 | Lutron Electronics Co., Inc. | Two-wire load control device for low-power loads |
Also Published As
Publication number | Publication date |
---|---|
NZ503654A (en) | 2002-10-25 |
GB2345393A (en) | 2000-07-05 |
GB0007751D0 (en) | 2000-05-17 |
GB2345393B (en) | 2001-07-18 |
AUPO965497A0 (en) | 1997-10-30 |
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