GB2320967A

GB2320967A - Controlling AC supply voltage

Info

Publication number: GB2320967A
Application number: GB9727264A
Authority: GB
Inventors: Nigel Ian Denis Lee
Original assignee: LYONS CLAUDE Ltd
Current assignee: LYONS CLAUDE Ltd
Priority date: 1996-12-24
Filing date: 1997-12-23
Publication date: 1998-07-08
Anticipated expiration: 2017-12-23
Also published as: GB2320967B; GB9626827D0; GB9727264D0

Abstract

An AC voltage at input terminals 1 is controlled by opto-coupled bidirectional switches 3,5 and supplied to output terminals 13 through a low pass filter 7. The switches 3,5 are operated to chop the input signal at 20 kHz in response to comparison of the output voltage with an AC reference signal which may be produced by a phase locked circuit, an analog filter or a digital circuit.

Description

APPARATUS AND METHOD FOR SUPPLYING AN A.C. SIGNAL TO A DEVICE This invention relates to an apparatus and method for supplying an A.C. signal to a device, and more particularly, but not exclusively, to an electronic variable transformer and electronic voltage stabiliser.

The control and stabilisation of a 50/60 Hz A.C. supply has been in the past achieved by four main techniques.

Firstly, a variable transformer used on its own or in a buck boost circuit, such as described in U.K. patent Nos. 986795 and 2070819, may be used. Secondly, a constant voltage transformer (CVT) may be used, which employs ferroresonance to stabilise the supply. Thirdly, a transductor may be used; these operate by controlling the saturation of an iron circuit of an inductor - see for example U.K. patent Nos. 1026074 and 1111120.

Lastly, tap changers may be employed, which operate by selecting separate taps on a transformer which provides an output which changes in steps.

Such conventional devices suffer from various problems.

Where moving parts are employed, this makes the devices complex and expensive to manufacture, slow to respond, and prone to loss of accuracy as the mechanical moving components wear out. Such devices also tend to be relatively heavy.

GB 2 301 239 discloses an AC voltage regulator provided with switching means for alternately effectively connecting and disconnecting the input terminals with the output terminals so as to allow or prevent transmission of the input signal to the output. The frequency of the switching means is much higher than the frequency of the AC input signal. The output signal has a value dependent upon the proportion of time that the input terminals are effectively connected to the output terminals.

An object of the present invention is to provide an apparatus and method for supplying an A.C. signal to a device having a desired value which does not require moving parts, which is relatively small in size, which is relatively light in weight, and which has a fast response time.

According to a first aspect of the present invention there is provided apparatus for supplying an A.C. signal to a device, the apparatus comprising means for determining a degree of divergence of the apparatus output voltage from a desired value, and means for selectively applying an input A.C. signal to output means in dependence upon the degree of divergence, such that the apparatus output voltage derived from the input A.C. signal tends towards the desired value, wherein said degree of divergence of the apparatus output voltage from a desired value is determined with reference to an A.C. reference signal.

According to a second aspect of the present invention there is provided a method of controlling the supply of an A.C. signal to a device, the method comprising determining a degree of divergence of the apparatus output voltage from a desired value, and selectively applying an input A.C. signal to output means in dependence upon the degree of divergence, such that the apparatus output voltage derived from the input A.C.

signal tends towards the desired value, wherein the said degree of divergence of the apparatus output voltage from a desired value is determined with reference to an A.C. reference signal.

In one embodiment a four quadrant high frequency (approximately 20kHz) switched mode technique using synchronous rectifiers (bi-directional switches) to chop the input voltage with the pulse width dependent on the required output voltage is employed. A control circuit controls the pulse width by comparing the required voltage with the actual voltage, and adjusting the on to off time of the two bi-directional power switches to effectively produce an electronic sliding tap.

The major advantages of such a technique are: 1. Fast response of 5 to 6 cycles, of the order of micro seconds if an A.C. reference is used.

2. No moving parts.

3. Small size.

4. Over current protection.

5. Constant current use.

6. The output is able to ramp up and down at no extra cost.

7. Light weight.

8. Able to clean up the waveform or add distortion into it, e.g. to test equipment.

For a better understanding of the invention embodiments will now be described, by way of example, with reference to the accompanying drawings in which: Fig. 1 is a highly simplified circuit diagram illustrating the principle of an embodiment of the invention; Fig. 2 shows how the input waveform is changed by the circuit of Fig. 1; Fig. 3 is a schematic circuit diagram of an electronic voltage stabiliser according to a first embodiment of the invention; Fig. 4 shows circuitry comprising the control circuit of Fig. 3 employing a D.C. reference; Fig. 5 shows circuitry comprising the control circuit of Fig. 3 using an A.C. reference; Fig. 6 shows a schematic circuit diagram of an electronic variable transformer according to a second embodiment of the present invention; Fig. 7 is a schematic circuit diagram of an electronic voltage stabiliser according to a third embodiment of the present invention; Fig. 8 is a circuit diagram of an electronic variable transformer according to a fourth embodiment of the invention; Figs. 9A to 9C show different arrangements of switches which may be used in the embodiments of the present invention; Fig. 10 shows various waveforms illustrating the operation of the present invention; Fig. 11 shows in more detail the A.C. phase locked reference signal circuitry in Fig. 5; Fig. 12 shows circuitry of an analogue filter arrangement for generating an A.C. reference signal; and Fig. 13 shows circuitry of a digital arrangement for generating an A.C. reference signal.

In the drawings, where appropriate, like elements appearing in more than one drawing are designated by the same reference numeral.

Fig. 1 shows a simplified circuit for illustrating the principle of operation of the embodiments of the present invention. An input sinusoidal voltage is applied to the circuit by way of input terminals 1. For the purposes of this illustration the input voltage is a 50 Hz, 240V signal. First and second bi-directional switches 3 and 5 are opened and closed by a control circuit (not shown) which will be described later. A low pass filter 7 comprising an inductor 9 and capacitor 11 filters the signal output from the bi-directional switches 3 and 5 to provide an output signal at output terminals 13. The low pass filter 7 has a break point of approximately 1kHz.

The bi-directional switches 3 and 5 are operated to chop the input signal applied at input terminals 1 at 20 kHz (in the cases where the switches 3 and 5 comprise IGBTs). The time during which the switches 3 and 5 are on and off is adjusted by the control circuit to adjust the output signal at output terminals 13. Fig. 2 shows at 15 the input voltage, at 17 the input signal after being applied to the bi-directional switches 3 and 5, and at 19 the signal at output terminals 13. To ease understanding, at 17 the waveform is shown which would be produced if the input signal had been chopped at a frequency of 500 Hz. If the chopping frequency was 20 kHz there would be 400 chopped segments per cycle. If the switches 3 and 5 are operated for equal alternate intervals at a frequency of 20 kHz the signal produced comprises a plurality of pulses, each having a duration of 25 microseconds. After filtering by the low pass filter 7 the pulsed signal becomes a 50Hz sine wave.

If the first bi-directional switch 3 is on all the time and the second bi-directional switch 5 is off all the time, the output signal at terminals 13 will equal the input signal at input terminals 1 (less any voltage drops). If the second bi-directional switch 5 is on all the time and the first bi-directional switch 3 is off all the time there will be no signal output at output terminals 13. If the first 3 and second 5 bi-directional switches are switched at alternate, substantially equal intervals, the voltage at output terminals 13 would be 120 volts, i.e. half the voltage at input terminals 1, as indicated by the solid line at 19 in Fig. 2. By adjusting the ratio of on to off time of first bidirectional switch 3 and second bi-directional switch 5 from 100/0% to 0/100% the 50 Hz output at terminals 13 can be adjusted over the complete range with a very small power loss.

Fig. 3 shows a first embodiment of a voltage stabiliser working on the principle of the circuit illustrated in Fig. 1. In this embodiment the A.C. supply at the input terminals 1 is applied via an input filter 21 to first and second bi-directional switches 3 and 5. The bidirectional switches 3 and 5 comprise transistors 25 which are switched by respective opto-drive circuits 27 and 29. In this embodiment both the bi-directional switches 3 and 5 also comprise a bridge rectifier 23. As in Fig. 1, the output of bi-directional switches 3 and 5 is filtered by low pass filter 7. The signal is then filtered by output filter 31, which provides a smoothed signal at output terminals 13.

The opto-drive circuits 27 and 29 are controlled by pulse width modulation (PWM) control circuit 33. This circuit receives as its inputs the A.C. output at output terminals 13, a stable reference voltage 35 and a current limit signal 37. The control circuit 33 compares the A.C. output at output terminals 13 with the stable reference voltage (D.C. or A.C.) and calculates the error. The error is then used to control the bidirectional switches 3 and 5 to achieve the desired output voltage at terminals 13.

Fig. 4 shows the operation of the control circuit 33 of Fig. 3. Master oscillator 39 generates a high frequency square wave clock signal that is divided by two, at 41, to ensure that a square wave is produced which is ON and OFF for equal times. This square wave signal is converted into a fixed amplitude triangle wave having a 20 kHz frequency by integrator 43, the output of which is applied to a comparator 45. The other input of the comparator 45 is a D.C. error voltage (or refererence signal). The D.C. error voltage is obtained by comparing the output signal at output terminals 13 of the circuit of Fig. 3, via a full wave rectifier 47, to a reference voltage provided at 35 in Fig. 3, using an error amplifier 49.

The resultant pulse width modulated waveform output from comparator 45 is applied to one input of respective AND gates 51 and 53. The output from AND gate 53 is applied to an inverter 55 to provide a signal which is in antiphase with the signal output from AND gate 51. A dead time is introduced into the output signal from AND gate 51 and inverter 55, at 57. By introducing a dead time, this prevents the two bi-directional switches (IGBTs) turning on together. The two drive signals thus produced are amplified and isolated by two optoisolators 59 and drive circuits 61, corresponding to opto-drive circuits 27 and 29 in Fig.3. The drivers 61 receive an isolated D.C. supply which is derived from the signal at the input terminals 1 in Fig. 3, by the circuit shown generally at 63. For full bridge use, four isolated drive circuits are provided.

To protect the IGBTs (or other power devices) in case of very high peaks or a short circuit, the current is detected by Hall effect circuit 65, which is compared with a reference signal 67 by comparator 69. The output of comparator 69 is applied to monostable delay circuit 71. The non-inverted output of the monostable delay circuit 71 is applied to the D input of D flip-flop 73, the clock input of which is the square wave produced at 41. The inverted output of the monostable delay circuit 71 is applied to inverter 75. The output of inverter 55 is connected to the input of inverter 75 via diode 77.

The output of inverter 75 is also connected via diode 79 to the output of AND gate 51. The non-inverted output of D flip-flop 73 is applied to activate a solid state bypass switch (SCR) which is implemented by the circuitry at 81. The non-inverting output of the D flip-flop 73 is also applied to the second input of AND gates 51 and 53 such that the IGBTs are turned off and the by-pass switch 81 is turned on in the event of a high peak in the current or short circuit. For normal over current cases current limit amplifier 83 is provided which receives at its negative input a signal representative of the output current at output terminals 13 in Fig. 3, and at its positive input a reference maximum current limit provided at 85. The output of current limit amplifier 83 is provided to an input of comparator 45.

The circuit of Fig. 5 is similar to the circuit of Fig.

4 and similar elements are designated with like reference numerals. However, in the circuit of Fig. 5 an A.C. error voltage is applied to the comparator 45, along with the triangle waveform produced at the output of integrator 43, to produce the variable pulse width modulated square wave. The A.C. error voltage is provided by error amplifier 49. An A.C. phase locked reference signal is generated by the circuitry at 87, which includes a gain control circuit 88, and is applied, along with the output signal from output terminals 13 of Fig. 3, to the negative input of error amplifier 49. Additionally, the output signal at output terminals 13 of Fig. 3 is applied via rectifier 89 to a gain control device 88, as is the reference output voltage at 35, which reference output voltage 35 is also coupled to the output of current limit amplifier 83 via diode 91. Because the output voltage is controlled by a phase locked sinewave reference, the output waveform distortion is also controlled, unlike the case in Fig.

4 where a D.C. error voltage was used, where only the amplitude is controlled.

The relatively simple circuit of the first embodiment, illustrated in Fig. 3, can only reduce the input voltage; however, with the addition of an auto transformer the output can be adjusted above and below the input voltage. A suitable circuit is shown in Fig.

6. Elements which are similar to those in Fig. 3 are designated with like reference numerals. As can be seen from Fig. 6, the auto transformer 93 is positioned between the input filter 21 and the first 3 and second 5 bi-directional switches.

For higher powers and limited voltage control ranges, a buck boost circuit can be used. Such a third embodiment of the present invention is illustrated in Fig. 7. Auto transformer 95 is provided between the input filter 21 and the first 3 and second 5 bi-directional switches to produce a centre tap so that phase reversal can occur.

The circuitry of the buck boost transformer 97 is connected in series between the supply and the load.

Depending on the phase of the booster voltage a correction voltage aiding or opposing the supply keeps the output voltage constant. The phase change occurs as the output crosses the voltage of the fixed centre tap of auto transformer 95.

Fig. 8 shows a fourth embodiment of the invention, which differs from the third embodiment illustrated in Fig. 7, in that the auto transformer 95 is replaced with third 99 and fourth 101 bi-directional switches and associated driver circuitry 103. In this arrangement twice the voltage swing and output power can be achieved.

In the third and fourth embodiments the thyristors 105 and 107 are used to by-pass the load current in the first 3 and second 5 bi-directional switches during output overloads and short circuits in order to protect the switches (IGBTs).

Figs. 9A, 9B, and 9C, show alternative switches which can be used in the circuits of the first, second, third and fourth embodiments.

The speed of response of the circuit using a D.C.

reference signal (as in Fig. 4) is dependent on the filtering used in the output feedback A.C. to D.C.

conversion - this is normally 14 to 3 cycles (30 - 60ms) or more. By using an A.C. reference signal as in Fig.

5 and comparing the output voltage directly with the reference the speed of response can be reduced down o approximately 4 cycles at the carrier frequency. With a carrier frequency of 20kHz this would be approximately 200As.

The process of comparing the output waveform with the low distortion A.C. reference signal also reduces the harmonic content of the output waveform. When the Figure 7 or Figure 8 embodiment is used the output distortion will still be reduced as long as the buck boost range is not exceeded.

Referring now to Fig. 10, waveform (1) is typical of what the user's supply can look like in an industrialised country. The basic electronic PWM stabiliser using a D.C. reference signal (as in Fig. 4) can only produce the waveform (2) this has been stabilised to a constant amplitude but the distortion is still present at the output.

Waveform (3) shows the stable sinewave output that can be obtained from the sinewave reference PWM A.C.

stabiliser (as shown in Fig. 5). As long as the system remains in its linear range (i.e. it has enough headroom), the system can reduce the distortion and fill in small parts of the waveform by changing the PWM signal as required to keep the output waveform as per the reference waveform.

It is possible to inject an error into the reference instead of using negative feedback. This is shown in waveform (4). The input is shown with 3rd harmonic distortion, and by injecting the correct amount of 3rd harmonic with the correct phase relationship into the reference, and therefore into the output, the harmonics present in the waveform can be reduced.

If the phase of the harmonics is varied it is possible to add harmonics to the output waveform. In this case the system becomes a net generator of distortions and voltage variations. This effect is very useful to test equipment for immunity to this type of disturbances.

This type of testing is now required to ensure that manufactured systems meet the CE directives for Europe.

Fig. 11 shows in more detail the A.C. phase locked reference signal circuitry in Fig. 5.

The distorted and unstabilised input supply voltage is stepped down and supplied to comparator 200 which converts it to a square wave. This is then supplied to one input of a phase comparator 202 together with the squared waveform from comparator 204 which is supplied from the reference output voltage.

The output from the phase comparator 202 is an error voltage dependant on the phase difference between these two signals. This error signal is filtered by a LPF (low pass filter) 206 and is then used to control the frequency of a VCO (voltage controlled oscillator) 208.

The output of the VCO 208 is 100 times the frequency of the supply, i.e. SkHz for 50Hz. This 5kHz signal is supplied to the clock input of one SCF (switched capacitor filter) 210. The 100 times square wave is also divided by 50 in counter 212 and then by 2 in counter 214 to produce a 50Hz square wave in phase with the 5kHz signal. This 50Hz signal is supplied to the input of the switched capacitor filter 210, the output of which is a sinewave reference that is in phase with the supply.

The A.C. (current or voltage) reference signal could be generated by many other circuits than the phase locked loop configuration described above with reference to Figs. 5 and 11.

A first example of such an alternative is an analogue filter reference configuration. In this arrangement the distorted and unstabilised input supply voltage can be stepped down with a transformer to a lower voltage.

This voltage can then be filtered to remove any noise then fed through a voltage controlled phase shifter then clipped to a constant amplitude. This fixed amplitude waveform is then supplied to a bandpass filter to produce a low distortion A.C. reference in phase with the mains supply.

As shown in Fig. 12, in this version the A.C. supply from the stepdown transformer is filtered by low pass filter 220 and split into two out-of-phase signals 0 and 1800, which are supplied to an analogue phase shifter 222, the control of which is provided by the LPF 220 and the output of phase comparator 224 whose inputs are Vin and Vref (via comparator 225), as in the Fig. 11 embodiment. The output from the phase shifter 222 is squared by comparator 226 and supplied to the bandpass filter 228, the output of which is a clean sinewave in phase with the input. This circuit is simple compared to the phase locked loop configuration but drift is always a problem.

A further example of an A.C. reference circuit is a digital reference configuration. There are two main techniques to generate a sinewave with a microprocessor/microcontroller: these are (a) a look up table, and (b) use of the Z transform and a recursive algorithm. Both techniques use the same hardware, which, as shown in Fig. 13, is a comparator 300 to square the supply voltage and to supply an input pin on the controller 302 to synchronise the waveforms, this is usually an interrupt pin. The program is held in ROM (read only memory) and the result of the calculations are sent out to the D to A (digital to analogue converter) 304 which produces a clean sinewave on its output, this is filtered by low pass filter 306 to produce a 50Hz phase locked reference.

In the look up table technique the values of, say, 256 samples of the positive sinewave are stored and read out to the D/A converter. The bit rate gives the required frequency and the 256 steps are then inverted for the outer half cycle.

In the recursion technique the Z transform is used to produce a simple or complex waveform (to reduce harmonics). The basic Z transform of a single sinewave is as follows: Z(Sin(Wt)) = Y(Z) = Z* sin(WT) X(Z) Z2 -2*Z*cos(WT)+1 The impulse response of the above transform (for X (2)=1) will give a sinewave of frequency W sampled at a rate of T(=l/fs).

A major area of concern at present is the effect of voltage disturbances on modern lighting systems in offices and large buildings. The effects of fast harmonics and voltage fluctuations can cause serious flicker of the lighting installation which has been found to be very objectionable to people working in these environments. There are now European standards in force to control this effect, the most recent being BSEN61000-3-3. The standard has been produced to ensure that the switching and operation of electrical and electronic appliances will not produce voltage fluctuation exceeding the limits set to prevent unacceptable flicker.

The ultra high speed of the A.C. reference controlled electronic voltage stabiliser in accordance with the present invention may prevent any of these disturbances getting to the sensitive loads and thus prevent the flicker even if very large variations are present on the supply.

The basic circuits of Figure 6, 7, and 8 can be used to produce disturbances of the output voltage (amplitude and flicker) or waveform (harmonics). These disturbances can be produced by adding selective signals to the A.C. reference. These distortions can then be used to test equipment powered by the electronic variable transformer.

In summary, the A.C. reference configuration may provide: 1) High speed of response 2) Control of waveform distortion 3) Harmonic isolation 4) Disturbance generation.

All these effects can be produced by the same hardware but with a different arrangement of reference.

Claims

1. Apparatus for supplying an A.C. signal to a device, the apparatus comprising means for determining a degree of divergence of the apparatus output voltage from a desired value, and means for selectively applying an input A.C. signal to output means in dependence upon the degree of divergence, such that the apparatus output voltage derived from the input A.C. signal tends towards the desired value, wherein said degree of divergence of the apparatus output voltage from a desired value is determined with reference to an A.C. reference signal.

2. Apparatus according to Claim 1, wherein the selective applying means selectively applies the input A.C. signal to the output means at a frequency substantially 400 times greater than the frequency of the input A.C. signal.

3. Apparatus according to Claim 1 or 2, wherein the arrangement is such that apparatus output voltage is adjusted with respect to the input A.C. signal in dependence upon the proportion of the time which the selective applying means applies the input A.C. signal to the output means.

4. Apparatus according to Claim 3, wherein said proportion of time which the selective applying means applies the input A.C. signal to the output means is implemented by pulse width modulation.

5. Apparatus according to any one of Claims 1 to 4, wherein the output means comprises means for removing high frequency components in the signal caused by the selective applying means, such that the output signal has substantially the same frequency as the input signal.

6. Apparatus according to any one of the preceding claims, wherein said A.C. reference signal is a phase locked reference signal.

7. Apparatus according to any one of claims 1 to 5, wherein said A.C. reference signal is generated by analogue filter means.

8. Apparatus according to any one of claims 1 to 5, wherein said A.C. reference signal is generated using a look up table.

9. Apparatus according to any one of claims 1 to 5, wherein said A.C. reference signal is generated using a Z transform.

10. A method of controlling the supply of an A.C.

signal to a device, the method comprising determining a degree of divergence of the apparatus output voltage from a desired value, and selectively applying an input A.C. signal to output means in dependence upon the degree of divergence, such that the apparatus output voltage derived from the input A.C. signal tends towards the desired value, wherein the said degree of divergence of the apparatus output voltage from a desired value is determined with reference to an A.C. reference signal.

11. A method according to Claim 10, wherein the input A.C. signal is selectively applied to the output means at a frequency substantially 400 times greater than the frequency of the input A.C. signal.

12. A method according to Claim 10 or 11, wherein the method is such that the apparatus output voltage is adjusted with respect to the input A.C. signal in dependence upon the proportion of the time which the input A.C. signal is applied to the output means.

13. A method according to Claim 12, wherein said proportion of time which the input A.C. signal is applied to the output means is implemented by pulse width modulation.

14. A method according to any one of Claims 10 to 13, wherein the output means removes high frequency components in the signal caused by the selective application of the input A.C. signal to the output means, such that the output signal has substantially the same frequency as the input signal.

15. A method according to any one of claims 10 to 14, wherein said A.C. reference signal is a phase locked reference signal.

16. A method according to any of claims 10 to 14, wherein said A.C. reference signal is generated by analogue filter means.

17. A method according to any of claims 10 to 14, wherein said A.C. reference signal is generated by using a look up table.

18. A method according to any of claims 10 to 14, wherein said A.C. reference signal is generated using a Z transform.

19. A variable transformer comprising apparatus as claimed in any one of claims 1 to 9, or operated according to the method of any one of claims 10 to 18.

20. A voltage stabiliser comprising apparatus as claimed in any one of claims 1 to 9, or operated according to the method of any one of claims 10 to 18.

21. An electrical equipment testing device comprising apparatus as claimed in any one of claims 1 to 9, or operated according to the method of any one of claims 10 to 18.

22. Apparatus substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of the accompanying drawings.

23. A method substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of the accompanying drawings.

24. A variable transformer substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of the accompanying drawings.

25. A voltage stabiliser substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of the accompanying drawings.

26. An electrical equipment testing device substantially as hereinbefore described with reference to and/or as illustrated in any one of or any combination of the accompanying drawings.