CELL SELECTION FOR ATM SWITCH
HAVING REDUNDANT SWITCH PLANES
BACKGROUND
1. Field of the Invention
This invention pertains to telecommunications, and particularly to the handling of cells in a switching node of a telecommunications network operating in the asynchronous transfer mode.
2. Related Art and Other Considerations
The increasing interest for high band services such as multimedia applications, video on demand, video telephone, and teleconferencing has motivated development of the Broadband Integrated Service Digital Network (B- ISDN). B-ISDN is based on a technology know as Asynchronous Transfer
Mode (ATM), and offers considerable extension of telecommunications capabilities.
ATM is a packet-oriented transfer mode which uses asynchronous time division multiplexing techniques. Packets are called cells and have a fixed size. An ATM cell consists of 53 octets, five of which form a header and forty eight of which constitute a "payload" or information portion of the cell. The header of the ATM cell includes two quantities which are used to identify a connection in an ATM network over which the cell is to travel, particularly the VPI (Virtual Path Identifier) and VCI (Virtual Channel Identifier). In general, the virtual is a principal path defined between two switching nodes of the network; the virtual channel is one specific connection on the respective
principal path.
At its termination points, an ATM network is connected to terminal equipment, e.g., ATM network users. Typically between ATM network termination points there are plural switching nodes, the switching nodes having ports which are connected together by physical transmission paths or links. Thus, in traveling from an originating terminal equipment to a destination terminal equipment, ATM cells forming a message may travel through several switching nodes.
A switching node has a plurality of ports, each of which can be connected by via a link circuit and a link to another node. The link circuit performs packaging of the cells according to the particular protocol in use on the link. A cell incoming to a switching node may enter the switching node at a first port and exit from a second port via a link circuit onto a link connected to another node. Each link can carry cells for plural connections, a connection being a transmission between a calling subscriber or party and a called subscriber or party.
The switching nodes each typically have several functional parts, a primary of which is a switch core. The switch core essentially functions like a cross-connect between ports of the switch. Paths internal to the switch core are selectively controlled so that particular ports of the switch are connected together to allow a message ultimately to travel from an ingress side of the switch to an egress side of the switch, and ultimately from the originating terminal equipment to the destination terminal equipment.
Various aspects of ATM switches are described in the following United States patent applications, all of which are incorporated herein by reference: U.S. Patent Application Serial Number 08/ , (attorney docket:
1410-321), entitled "VC MERGING FOR ATM SWITCH", filed July 11, 1997;
U.S. Patent Application Serial Number 08/ , (attorney docket: 1410-322), entitled "ABR SERVER", filed July 11, 1997; U.S. Patent Application Serial
Number 08/ , (attorney docket: 1410-323), entitled "HANDLING ATM
MULTICAST CELLS", filed July 11, 1997; U.S. Patent Application Serial
Number 08/ , (attorney docket: 1410-324), entitled "A DATA SHAPER
FOR ATM TRAFFIC", filed July 11, 1997; U.S. Patent Application Serial
Number 08/ , (attorney docket: 1410-326), entitled "VP/VC LOOK-UP
FUNCTION", filed July 11, 1997.
Some ATM switches have redundancy by providing two switch "planes". In a two-plane ATM switch, two switch cores are provided with each ingress link applying incoming cells to both switch cores and each egress port obtaining cells from at least one of the switch cores. Each plane of the ATM switch comprises one of the switch cores and the elements of the switch ports that apply cells to or obtain cells from that switch core. As illustrated in US Patent 5,436,886 to McGill, one of the two planes is typically denominated a "preferred" or "working" plane for an egress link, meaning that under ordinary circumstances cells from that plane are sent to an outgoing or egress physical link of the switch. Generally, cells are obtained from the other plane are not applied to the outgoing link unless a problem should develop with the working plane.
What is needed, therefore, and an object of the present invention, is a simple method and apparatus for handling copies of cells emanating from redundant planes of an ATM switch.
SUMMARY
For redundancy, an asynchronous transfer mode (ATM) switch has plural switch planes which feed copies of cells to a cell selector. As a copy of a cell is received by the cell selector from any one of the plural switch planes, the cell selector determines whether the copy of the cell is to be applied to a physical egress link. The cell selector uses a sequence number and a virtual channel identifier borne in the copy of the cell in determining which copies should be applied to the physical egress link.
Preferably the cell selector includes a memory or log in which records for selected sequence numbers are stored. In one embodiment, the log has stored therein a predetermined number of records which include sequence numbers for copies of cells most recently applied to the physical egress link.
In one embodiment, the switch has at least three switch planes.
Each of the at least three switch planes receives and routes therethrough a copy of a cell. The cell selector applies a selected copy of the cell to the physical egress link upon reception of a predetermined number (e.g., majority voting) of the copies. Moreover, the cell selector uses the number of copies of the cell received by the cell selector to determine one of the following: (1) addition of a cell in one of the planes; (2) non-receipt of a copy of the cell in one of the planes; (3) receipt of all copies of the cells.
Further, upon a repeated determination of non-receipt of a copy of the cell in one of the planes, utilization of the plane in which repeated non-receipt is determined is discontinued.
BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a schematic view of an ATM switch including a cell selector in accordance with an embodiment of the invention.
Fig. 2 is a diagrammatic view of an ATM cell header. Fig. 3 is a schematic view of a cell selector including in the ATM switch of Fig. 1 in accordance with an embodiment of the invention.
Fig. 4 is a flowchart showing general steps executed by the cell selector of Fig. 3.
Fig. 5 is a schematic view of an ATM switch having three redundant switch planes and including a cell selector in accordance with an embodiment of the invention.
Fig. 6 is a diagrammatic view of a memory utilized by the cell selector for the ATM switch of Fig. 5.
DETAILED DESCRIPTION OF THE DRAWINGS
In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular architectures, interfaces, techniques, etc. in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well known devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
Fig. 1 shows an ATM switch 20 which includes two redundant switch planes 30(1) and 30(2) as well as a set of cell selectors 40 A - 40N. As
described herein, cell selectors 40A-40N determine which copies of cells routed through switch planes 30(1) and 30(2) are to be applied to respective physical egress links 42A - 42N emanating from switch 20.
Each switch plane has plural switch ingress ports, a switch core, and plural switch egress ports. As shown in Fig. 1, switch plane 30(1) has switch ingress ports 50(1A) - 50(1N); switch core 52(1); and plural switch egress ports 54(1A) - 54(1N). Similarly, switch plane 30(2) has switch ingress ports 50(2A) - 50(2N); switch core 52(2); and plural switch egress ports 54(2 A) -54(1N). Physical ingress links are connected to switch ingress ports of one of the switch planes, Fig. 1 particularly showing physical ingress links 56A - 56N connected to switch ingress ports 50(1 A) - 50(1N), respectively, of switch plane 30(1).
Each switch ingress port 50 has a sequence number assignment unit and a CRC generation unit, typified by sequence number assignment unit 60(1 A) and CRC generation unit 62(1 A) shown in Fig. 1. CRC generation unit 62(1 A) is connected through other unillustrated circuitry of switch ingress port 50(1 A) to core ingress port 68(1 A) of switch core 52(1). As mentioned previously, the switch core serves as a cross connect so that cells applied to a switch ingress port are routed through the switch core to an appropriate core egress port of the switch core, the routing being based e.g., on the virtual channel identifier (VCI) included in the cells. In the present example, for simplicity it is assumed that cells received on physical ingress link 56A and applied to core ingress port 68(1 A) are routed to core egress port 69(1A). Core egress port 69(1 A) is connected to switch egress port 54(1 A), which in turn is connected to cell selector 40A.
Reception of a cell at switch 20 is illustrated by an example cell incoming on physical ingress link 56A to switch ingress port 50(1 A). As received, the cell has a five octet header basically illustrated in Fig. 2 as including a virtual path identifier (VPI); a virtual channel identifier (VCI); a payload type (PTI) field; a cell loss priority (CLP) field; and, a header error control (HEC) field. Upon reception of the cell at switch ingress port 50(1 A), sequence number assignment unit 60(1 A) generates and assigns a sequence number to each received cell. Preferably, for cells having the same VCI, the sequence numbers are assigned with increasing value, although not necessarily uniformly increasing value. After generation of the sequence number, CRC generation unit 62(1 A) generates a cyclical redundancy check (CRC) value for the cell.
Subsequent to obtaining a sequence number and a CRC value, copies of the cell are sent both to switch plane 30(1) and switch plane 30(2). As used herein, the terminology "copy" of a cell encompasses both the original cell, duplicates thereof, and parallel transmissions thereof. Thus, in accordance with such terminology, it is consistent to refer to both switch planes 30(1) and 30(2) as receiving "copies". Fig. 1 shows each switch ingress port in switch plane 30(1) as having a junction or splitter, such as splitter 70(1 A), which enables a cell emanating from a CRC assignment unit to be applied both to switch core 52(1) and, via a switch ingress port of plane 50(2) [such as switch ingress port 50(2A)], to switch core 52(2).
In Fig. 1 , a first copy of a cell is routed through switch core 52(1) of switch plane 50(1) and a second copy of the same cell is routed through switch core 52(2) of switch plane 50(2). Each copy emerges from a core egress port of
the respective switch core. In the example under discussion, the first copy of the cell emerges from core egress port 69(1 A) and is applied to switch egress port 54(1 A); the second copy of the cell emerges from core egress port 69(2A) and is applied to switch egress port 54(2A). After processing at the switch egress ports 54(1 A) and 54(2A), the first and second copies of the cell are transmitted, usually at different times, on lines 70(1 A) and 70(2 A), respectively, to cell selector 40A.
The person skilled in the art understands the nature and extent of various unillustrated structure comprising switch ingress ports 50 and switch egress ports 52, and various operations thereof not discussed. Examples of such switch ports are provided in documentation already incorporated herein by reference, and additionally in U.S. Patent Application Serial Number 08/ ,
(attorney docket: 1410-238), entitled "AUGMENTATION OF ATM CELL WITH CONNECTION DATA FOR BUFFERING", filed July 11, 1997, which is also incorporated herein by reference. In addition, the person skilled in the art understands that the functions of sequence number assignment unit 60 and CRC generation unit 62(1 A) can be performed in various ways, as by one or more microprocessors, for example.
For sake of simplification, the operation of a representative cell selector 40A, referenced henceforth generically as cell selector 40, is hereinafter discussed. As indicated above, copies of cells are applied from one or both of switch planes 30(1) and 30(2) to each cell selector. Copies of the same cell from differing switch planes typically do not reach the cell selector at the same time, and (due e.g., to malfunction or congestion of one of the switch planes) one or both copies of the cell may never reach the cell selector. Thus, the cell selector
has the responsibility of determining which copies of cells it receives are to be transmitted to the physical egress link.
An example embodiment of cell selector 40 is shown in more detail in Fig. 3. Cell selector 40 is shown in Fig. 3 as receiving copies of cells on generic lines 70(1) and 70(2) from switch planes 30(1) and 30(2), respectively, and of applying selected copies of cells to generically represented physical egress link 42. In particular, lines 70(1) and 70(2) are shown as connected to inputs of plane selector 100. Plane selector 100 functions as a demultiplexer and has its output connected both to multiplexer 102 and to an input of CRC checker
104. A first output of multiplexer 102 is connected to an input of output FIFO shift register 106, an output of FIFO shift register 106 being connected to physical egress link 42. A second output of multiplexer 102 is shown as line 108, which essentially serves as a discard. An output of CRC checker 104 is connected to an input of log manager 110. Log manager 110 is connected in order to access a memory, such as a random access memory, herein known as log 112. Log 112 is maintained by log manager 110 as a FIFO moving shift register having a predetermined number of records 114(0) through 114(m). Timing and supervision of the constituent elements of cell selector 40 is accomplished by controller 120. Controller 120 sends signals to sequence operation of the constituent elements of cell selector 40, including select signals and gating signals to plane selector 100 and multiplexer 102, for example.
While in one embodiment the functions of cell selector 40 are performed by a circuit such as that shown in Fig. 3, it should be understood that such functions can also be implemented entirely or partially by a processor such as a microprocessor which access a memory. Operation of the cell selector of
the present invention is illustrated with respect to the steps of Fig. 4, which enables the person skilled in the art with respect to these and other implementations.
Cell selector 40 of the present invention receives copies of cells both from switch plane 30(1) and switch plane 30(2). In this regard, preferably plane selector 100 is operated to receive cyclically copies of cells from the various switch planes, e.g., cell copies are alternately received from switch plane 30(1) and switch plane 30(2). It is also preferred that, upon reception of each copy, cell selector 40 determines whether the copy is to be transmitted to physical egress link 42. Processing of a copy of a cell, after its reception at plane selector 100, is hereinafter described with respect to the steps of Fig. 4.
After a copy of a cell is demuliplexed by plane selector 100, the copy of the cell is applied both to CRC checker 104 and to multiplexer 102.
Step 4-1 of Fig. 4 involves determining whether the cell has a faulty CRC. If the CRC is faulty, the cell copy is discarded as indicated by step 4-2. In the embodiment of Fig. 3, step 4-1 is performed by CRC checker 104.
At step 4-3, cell selector 40 determines whether it has already received a copy of the same cell. In connection with step 4-3, cell selector 40 determines whether it has already received a cell copy having the same sequence number and virtual channel identifier (VCI) as the copy just received. In this regard, cell selector 40 maintains a memory with records for cell copies it has already received, each record including the VCI and sequence numbers of cell copies already received. Thus, as cell selector 40 searches the memory, if cell selector 40 locates a record having the same VCI and sequence number as the
cell just received, the cell selector 40 knows that the copy just received is a duplicate. When a duplicate is received, the record having the same VCI and sequence number as marked to indicated double reception of the cell (step 4-4), and the second copy is discarded (step 4-2). In the embodiment of Fig. 3, the records are maintained by log manager 110 in log 112. As shown in Fig. 3, the records 114 in log 112 have fields for virtual channel identifier (VCI), sequence number (SN), and double or duplicate reception (DUP).
At step 4-5 cell selector 40 determines whether it has already seen a cell having the same virtual channel identifier (VCI) but a greater sequence number. Such can happen, for example, when a cell disappears in a switch plane. For example, consider the following scenario in which cells Cl, C2, and C3 are applied both to switch planes 30(1) and 30(2), and the reception of cells at cell selector 40 is as follows: cell Cl copy from plane 30(1), cell C3 copy from plane 30(1), cell Cl copy from plane 30(2), cell C2 copy from plane 30(2), cell C3 copy from plane 30(2). In this scenario, the copy of cell C2 is lost in switch plane 30(1), and cell selector 40 chooses the copy cell C3 from switch plane 30(1) prior to receipt of the copy of cell C2 from switch plane 30(2). In other words, cell inversion has occurred. In accordance with the present invention, cell C2 is lost for the sake of physical egress link 42, although not lost in switch plane 30(2). Nevertheless, in order to accommodate the other advantages of cell selector 40, step 4-5 is necessary to avoid cell inversion on physical egress link 42. This scenario only occurs when a cell copy is lost on a faster switch plane, and this faster switch plane must be much faster than the other for the current VCI. However, since cell loss is tolerated in some measure by ATM, a small frequency of cell lost in this manner is acceptable.
When a cell copy having does not have its VCI and sequence number already seen by cell selector 40, or a copy of the same VCI and greater sequence number, cell selector 40 performs steps 4-6 through 4-9 shown in Fig. 4. At step 4-6, cell selector 40 stores the VCI and sequence number combination for future reference. In the embodiment shown in Fig. 3, controller 120 causes log manager 110 to generate a record 114 for the cell copy in the next available location in log 112.
At step 4-7, the cell copy is written to output FIFO shift register 106. Such is accomplished in Fig. 3 by controller 120 applying an appropriate select signal to multiplexer 102, so that the cell copy is transmitted to FIFO 106 rather than to discard line 108 (which represents step 4-2).
Step 4-8 depicts updating by cell selector 40 of its cell memory, e.g., log 112. The cell memory has stored therein information, e.g., the VCI and sequence number, for a predetermined number of most recent cells transmitted to output FIFO 106. Accordingly, in view of the addition of a new record at step 4- 6, at step 4-8 the oldest record is removed from the memory. The person skilled in the art understands how such a moving buffer can be maintained, e.g., by pointers to newest and oldest record addresses. Step 4-9 represents completion of processing of the copy of the cell. It should be understood that the next cell copy obtained from plane selector 100 is processed beginning with step 4-1.
The cell copies loaded into output FIFO 106 are extracted by conventional techniques for application on a first-in/first-out basis to physical egress link 42. Such extraction can be accomplished, e.g., by suitable link termination circuitry.
The double reception field (shown as DUP in Fig. 3) can be augmented to provide cell selector 40 with the capability of monitoring performance of the switch planes. For example, double reception field can comprise two subfields, a first of the subfields being marked upon reception of a cell copy from first switch plane 30(1) and the second subfield being marked upon reception of a cell copy from second switch plane 30(2). Cell selector 40, or other processor connected thereto, can utilize a double reception field so structured in order to perform analyses (e.g., statistical analyses) regarding transmission integrity of the switch planes.
Fig. 5 shows an embodiment of ATM switch 20' which includes three switch planes, including switch planes 30(1) and 30(2) as previously illustrated in Fig. 1, and third switch plane 30(3). Like the other switch planes, switch plane 30(3) has a switch core [50(3)], switch ingress ports [50(3 A), etc.], and switch egress ports [54(3 A), etc.]. The switch egress ports of switch plane 30(3) are connected to corresponding cell selectors, as representively illustrated by switch egress port 54(3 A) being connected by line 70(3 A) to cell selector 40A.
The representative cell selector for the three switch plane switch 20' of Fig. 5 differs from that shown in Fig. 3 primarily in three respects. In the first differing respect, the plane selector 100 has three inputs, i.e., one input from each of switch planes 30(1), 30(2), and 30(3). In the second differing respect, a log 112' as illustrated in Fig. 6 differs from log 112 by further inclusion of fields for a plane 1 flag (P1F), a plane 2 flag (P2F), and a plane 3 flag (P3F) for each record. In the second differing respect, a different logic as shown in Fig. 7 is
implemented in the determination of whether a cell is copy is to be stored in the output FIFO and applied to physical egress link 42.
Fig. 7 shows basic steps performed by the cell selector for the three switch plane embodiment of Fig. 5. Step 7-1 through step 7-3 and step 7-5 correspond to step 4-1 through step 4-3 and step 4-5, respectively, of Fig. 4, and are understood with reference thereto. The steps of Fig. 7 which primarily differ from those of Fig. 4 are steps 7-6, 7-4 A, and 7-4B, as described below. Upon completion of step 7-4B, steps 7-7 through 7-9 are performed, which correspond to and are understood with reference to respective steps 4-7 through 4-9 of Fig.
4.
In accordance with the method and operation shown in Fig. 7, when a first copy of a cell is received at the cell selector, a record is generated in log 112 therefor. As mentioned above, the log record includes three fields for flags, in particular plane 1 flag (P1F), plane 2 flag (P2F), and plane 3 flag (P3F). At step 7-6, one of these flags P1F, P2F, or P3F is set in accordance with whether the first copy of the cell was obtained from first switch plane 30(1), second switch plane 30(2), or third switch plane 30(3), respectively. Then, in contrast to Fig. 4, the cell copy is not immediately applied to physical egress link 42.
Rather, processing of the cell copy is terminated.
When a second copy of the cell is detected at step 7-3, steps 7-4A through 7-4C are executed. At step 7-4A, an appropriate one of the flags P1F, P2F, or P3F in the appropriate record (i.e., the record having the same VCI and sequence number) is set in accordance with whether the second copy of the cell was obtained from first switch plane 30(1), second switch plane 30(2), or third
switch plane 30(3), respectively. Then, at step 7-4, the record is analyzed to ascertain whether a predetermined number of copies of the cell have been received. Typically, the predetermined number of copies is a number which represents a majority of the number of switch planes. Thus, in the specific example of Fig. 5, the predetermined number of copies is two. If the predetermined number of copies has been received, the selector will eventually perform steps 7-7 through 7-9 which result in writing the cell copy to the output FIFO 106 and thus to the physical egress link 42. Before doing so, however, step 7-4C is performed. At step 7-4C, a check is made whether the predetermined number of copies of the cell has been exceeded. Step 7-4C is pertinent should cell copies be received for the same cell from all three switch planes 30(1), 30(2),and 30(3), in which case the cell was applied to physical egress link 42 upon reception of the second copy. Therefore, as the affirmative branch from step 7-4C, the third copy of the cell is discarded at step 7-2.
The flags P1F, P2F, or P3F of the embodiment of Fig. 5, indicating receipt of cell copies having the same VCI and sequence number for each of the three switch planes, are thus used for determining when to apply a cell to physical egress link 42. Moreover, the flags P1F, P2F, or P3F can also be utilized for error detection and other analyses. For example, if a copy of the cell has entered only from the first plane, the first plane has an error of adding a cell. If a copy of the cell has entered only from the first two planes, there is an error in the third plane. If copies of the cell enter from all planes, all plane are functioning satisfactorily. Thus, the method discovers added and/or missing cells in a plane.
If one of the three switch planes 30(1) - 30(3) of the embodiment of Fig. 5 were to fail completely, e.g., as determined by consistent absence of flags for the failing plane, the cell selector can automatically change to a two plane method as described in Fig. 1 by ignoring the failed plane and implementing the logic described in Fig. 4.
While the embodiment of Fig. 5 has been shown with three switch planes, it should be understood that the principles thereof can be extrapolated to more than three switch planes.
The sequence numbers assigned to cells of the same virtual channel identifier (VCI) must be unique and must be monotonic, although not strictly consecutive. The sequence number must be assigned in accordance with a convention that enables cell selector 40 to determine the order of two cells associated with the same VCI and which, at any give moment, are inside the switch.
The preceding discussion has emphasized the operation of one cell selector, particularly cell selector 40A, which applies cells to physical egress link 42A. It should be understood that other cell selectors 40B - 40N also make determinations regarding which cells received from switch egress ports 54(1B) - 54(1N), 54(2B) - 54(2N), of switch planes 30(1), 30(2) are to be applied to physical egress links 42B - 42N, respectively. Moreover, while the preceding discussion has conveniently assumed that cells incoming on physical ingress link 56A exit switch 20 by physical ingress link 42 A, such need not necessarily be the case. In fact, typically some of the cells incoming on any particular physical ingress link exit on one of the physical egress links while others of the cells
incoming on the same physical ingress link exit on another one of the physical egress links, in accordance with VPI and VCI values, as is commonly understood in the art.
While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not to be limited to the disclosed embodiment, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.