WO1999003241A3 - Appareil de demodulation pour l'obtention d'informations numeriques - Google Patents

Appareil de demodulation pour l'obtention d'informations numeriques Download PDF

Info

Publication number
WO1999003241A3
WO1999003241A3 PCT/GB1998/002022 GB9802022W WO9903241A3 WO 1999003241 A3 WO1999003241 A3 WO 1999003241A3 GB 9802022 W GB9802022 W GB 9802022W WO 9903241 A3 WO9903241 A3 WO 9903241A3
Authority
WO
WIPO (PCT)
Prior art keywords
signal
threshold
previously decoded
decoded symbols
data slicing
Prior art date
Application number
PCT/GB1998/002022
Other languages
English (en)
Other versions
WO1999003241A2 (fr
Inventor
Robert William Young
James Digby Yarlet Collier
Original Assignee
Cambridge Consultants
Robert William Young
James Digby Yarlet Collier
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB9714529.6A external-priority patent/GB9714529D0/en
Application filed by Cambridge Consultants, Robert William Young, James Digby Yarlet Collier filed Critical Cambridge Consultants
Publication of WO1999003241A2 publication Critical patent/WO1999003241A2/fr
Publication of WO1999003241A3 publication Critical patent/WO1999003241A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/063—Setting decision thresholds using feedback techniques only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dc Digital Transmission (AREA)

Abstract

L'invention porte sur un appareil de démodulation permettant d'obtenir des informations numériques à partir d'un signal de porteuse modulé. Les informations numériques comprennent une séquence de symboles numériques, chaque symbole numérique étant défini par la modulation du signal de porteuse sur une durée de symbole. L'appareil comprend un générateur de seuil (8) qui génère un signal de seuil analogique; et un comparateur (3) comportant une entrée (4) de signal qui reçoit le signal de porteuse modulé, une entrée (5, 6) qui reçoit le signal de seuil, et une sortie (7). Le comparateur (3) compare le signal de porteuse modulé avec le signal de seuil et génère un signal numérique en fonction de la comparaison obtenue, chaque signal numérique représentant un symbole numérique respectif. Le signal de seuil produit par le générateur est déterminé conformément aux N signaux numériques précédemment générés.
PCT/GB1998/002022 1997-07-11 1998-07-10 Appareil de demodulation pour l'obtention d'informations numeriques WO1999003241A2 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB9714529.6 1997-07-11
GBGB9714529.6A GB9714529D0 (en) 1997-07-11 1997-07-11 Signal processing architectures
GB9723718.4 1997-11-10
GBGB9723718.4A GB9723718D0 (en) 1997-07-11 1997-11-10 Demodulating apparatus for obtaining digital information

Publications (2)

Publication Number Publication Date
WO1999003241A2 WO1999003241A2 (fr) 1999-01-21
WO1999003241A3 true WO1999003241A3 (fr) 1999-10-28

Family

ID=26311859

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1998/002022 WO1999003241A2 (fr) 1997-07-11 1998-07-10 Appareil de demodulation pour l'obtention d'informations numeriques

Country Status (1)

Country Link
WO (1) WO1999003241A2 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19909086C2 (de) * 1999-03-02 2002-05-08 Siemens Ag Analog-Digital-Wandler
US6826390B1 (en) 1999-07-14 2004-11-30 Fujitsu Limited Receiver, transceiver circuit, signal transmission method, and signal transmission system
EP1243089B1 (fr) * 1999-12-30 2005-08-31 Siemens Aktiengesellschaft Circuit et procede approprie de production d'une interface d'horloge de reference
US6760551B2 (en) * 2002-10-29 2004-07-06 Agilent Technologies, Inc. Adaptive decoder for skin effect limited signals
KR100839318B1 (ko) * 2005-02-16 2008-06-17 엘지전자 주식회사 수신기 내의 슬라이싱 장치

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1296436A (fr) * 1960-08-29 1962-06-15 Western Electric Co Détecteur d'amplitude d'impulsions
GB2085268A (en) * 1980-09-09 1982-04-21 Nippon Electric Co Digital signal processing circuit
JPS5869153A (ja) * 1981-10-21 1983-04-25 Nippon Telegr & Teleph Corp <Ntt> 符号識別判定回路
US4423518A (en) * 1981-05-19 1983-12-27 Nippon Electric Co., Ltd. Timing recovery circuit
EP0296253A1 (fr) * 1987-01-12 1988-12-28 Fujitsu Limited Circuit de commande de la temporisation de discrimination
EP0414349A1 (fr) * 1989-08-24 1991-02-27 Ampex Systems Corporation Egaliseur rapide à décision récursive pour données numériques
EP0469647A2 (fr) * 1990-07-31 1992-02-05 Ampex Systems Corporation Décodeur à décision récursive de type pipeline
WO1996035284A1 (fr) * 1995-05-05 1996-11-07 Boerjesson Per Ola Detecteur de symboles dote de moyens de seuil pour symboles
US5652541A (en) * 1993-11-23 1997-07-29 Motorola, Inc. Data demodulator employing decision feedback for reference parameter recovery and method used therin

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1296436A (fr) * 1960-08-29 1962-06-15 Western Electric Co Détecteur d'amplitude d'impulsions
GB2085268A (en) * 1980-09-09 1982-04-21 Nippon Electric Co Digital signal processing circuit
US4423518A (en) * 1981-05-19 1983-12-27 Nippon Electric Co., Ltd. Timing recovery circuit
JPS5869153A (ja) * 1981-10-21 1983-04-25 Nippon Telegr & Teleph Corp <Ntt> 符号識別判定回路
EP0296253A1 (fr) * 1987-01-12 1988-12-28 Fujitsu Limited Circuit de commande de la temporisation de discrimination
EP0414349A1 (fr) * 1989-08-24 1991-02-27 Ampex Systems Corporation Egaliseur rapide à décision récursive pour données numériques
EP0469647A2 (fr) * 1990-07-31 1992-02-05 Ampex Systems Corporation Décodeur à décision récursive de type pipeline
US5652541A (en) * 1993-11-23 1997-07-29 Motorola, Inc. Data demodulator employing decision feedback for reference parameter recovery and method used therin
WO1996035284A1 (fr) * 1995-05-05 1996-11-07 Boerjesson Per Ola Detecteur de symboles dote de moyens de seuil pour symboles

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 007, no. 162 (E - 187) 15 July 1983 (1983-07-15) *

Also Published As

Publication number Publication date
WO1999003241A2 (fr) 1999-01-21

Similar Documents

Publication Publication Date Title
MY124752A (en) Decoding of information in audio signals
KR930703767A (ko) 시간 영역 파일럿 요소를 갖는 통신 신호의 수신 및 송신 방법
DE69326140D1 (de) Psk empfänger
CA2012163A1 (fr) Circuit et methode de decodage de signaux numeriques
MY113537A (en) Method and apparatus for decoding noisy, intermittent data, such as manchester encoded data or the like
KR920003702A (ko) 디지탈 신호 수신기
KR920702579A (ko) 정보 신호 전송 및 수신 방법
EP0833483A3 (fr) Dispositif comparateur de phase pour démodulateur utilisant une détection différentielle
WO1999003241A3 (fr) Appareil de demodulation pour l&#39;obtention d&#39;informations numeriques
JPS6444154A (en) Circuit structure for signal decoding in frequency modulation transmission
MY132501A (en) Transmission, recording and reproduction of a digital information signal
WO1999044327A3 (fr) Circuit d&#39;extraction d&#39;horloge et recepteur dote d&#39;un tel circuit
JPS5549042A (en) Sound momentary break interpolating receiver
KR970058180A (ko) 적외선 신호 복조기
EP0158409A3 (fr) Détecteur de seuil perfectionné
KR930015366A (ko) 크로스-카운팅(Cross-Counting) FSK 복조기
KR920013383A (ko) 디지탈 테이프 레코더
ATE63793T1 (de) Schaltungsanordnung zur rueckgewinnung des taktes eines isochronen binaersignales.
KR900702709A (ko) 음성신호 복조회로
KR970049536A (ko) 파셜 리스펀스 클래스-4 신호검출장치
AU6952891A (en) Circuit for generating a timing pulse train
KR880003486A (ko) 차분 pcm 신호형성방법 및 그 장치
KR910017384A (ko) 콤팩트 디스크 플레이어
KR920019112A (ko) 데이타 복원회로
KR870002546A (ko) 디지탈 오디오 기기의 동기 검출방법

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): JP US

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

121 Ep: the epo has been informed by wipo that ep was designated in this application
AK Designated states

Kind code of ref document: A3

Designated state(s): JP US

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

NENP Non-entry into the national phase

Ref country code: JP

Ref document number: 1999508331

Format of ref document f/p: F

122 Ep: pct application non-entry in european phase