WO1998045950A1

WO1998045950A1 - Afc-digital tuning through mutual digital synthesis

Info

Publication number: WO1998045950A1
Application number: PCT/DE1998/000436
Authority: WO
Inventors: Ludwig Hofmann
Original assignee: Siemens Aktiengesellschaft
Priority date: 1997-04-07
Filing date: 1998-02-13
Publication date: 1998-10-15
Also published as: DE59813535D1; ID22545A; US6104252A; AU6717398A; AU728239B2; CN1252186A; CN1214534C; JP2001519109A; EP0974196A1; ES2262229T3; EP0974196B1

Abstract

The present invention relates to an afc-digitial tuning circuit having an oscillator (1), a digital synthesis system (DDS) (2) to which the frequency fxtal of the oscillator (2) is directed as a clock rate and which generates an output signal with the frequency fmut, as well as a frequency comparing facility (3) which determines a deviation of the output frequency fmut in the digital synthesis system (2) from a control frequency fref and generates a digital output signal (Sd) that reproduces said deviation. The digital output signal Sa is then directed to the digital synthesis facility (2) as an addition value. The afc-circuit enables a signal with a frequency fmut to be generated which is highly accurate and thermocompensated.

Description

description

Digital AFC setting through reciprocal DDS

The present invention relates to an automatic frequency control (AFC) circuit.

Automatic frequency control is required in many devices. The area of application is the electronic tuning of the frequency of

Oscillator circuits. So-called capacitance diodes are used in this electronic tuning, for example. In operation, capacitance diodes require a DC voltage of 10 volts to 30 volts, which must be constant at a few millivolts. For battery-powered receivers, they can therefore only be used together with a DC voltage converter. A major disadvantage of the capacitance diodes is the temperature dependence of the junction capacitance. For this reason, a diode with the same temperature coefficient is often connected to the supply voltage as a temperature-dependent resistor.

In the case of large RF voltages, the curved characteristic curve of the capacitance diode causes a shift in the mean DC voltage value and thus a change in capacitance. This can lead to distortion. These changes in capacitance can be compensated for by two identical diodes which are connected to one another. The voltage dependency and temperature dependency of the capacitance diodes has an effect above all at high frequencies. Even small changes in capacity lead to considerable changes in frequency. The result is a distorted reception of the set station. For this reason, automatic frequency control is required, for example, for diode tuning. The controlled variable is the frequency of the oscillator. With automatic frequency control (AFC) the tuning is thus kept stable by regulating the oscillator frequency.

A known AFC circuit is shown in FIG. A temperature-compensated voltage-controlled oscillator (VCO) sends a signal with a specific clock to a frequency comparison device 3. This frequency comparison device 3 compares the clock of the temperature-compensated voltage-controlled oscillator (VCO) 9 with a system clock f _ref , which is obtained, for example, from a time standard information becomes. The frequency comparison device 3 outputs a digital tracking signal, which reproduces the frequency difference determined in the frequency comparison device 3 between the clock of the VCO 9 and the system clock f _ref . This digital

Tracking signal is fed to a digital-to-analog (D / A) converter 10, which converts it into an analog tracking signal. This analog tracking signal is fed to the temperature-compensated VCO 9 for regulating its oscillator frequency, as a result of which the control loop is closed.

As can be seen from FIG. 9, the control loop is implemented analogously. This analog implementation has several disadvantages. For example, disturbances are easily coupled in. There are also problems with the required dynamic range. This is particularly important for devices with reduced supply voltages, as is the case with cell phones, for example. A further disadvantage is that the design effort with regard to the D / A converter 10 for tracking the analog tuning voltage is very large, since the accuracy of the digital-analog converter 10 is crucial for the precision of the control. A further disadvantage is that the AFC circuit constructed as shown in FIG. 1 slowly settles in and continues to be difficult to integrate into an integrated circuit due to the analog tracking.

The present invention has for its object to provide a circuit for automatic frequency control (AFC) which enables precise tracking of the oscillator frequency in a simple manner.

This object is solved by the features of claims 1 and 4, respectively. The central idea of the invention is to create a highly accurate and temperature-compensated signal by using a so-called direct digital synthesis device (DDS).

According to the invention, a circuit for automatic frequency control is therefore provided which has an oscillator which oscillates at a frequency f _xtal . This frequency f _{xtal of} the oscillator is fed to a direct digital synthesis device as a clock. Furthermore, a frequency comparison device is provided which determines a difference between the output frequency f _{mut of} the digital synthesis device and a reference frequency f _ref . The frequency comparison device generates a digital output signal, which reproduces the determined frequency difference between the output frequency f _{mut of} the digital synthesis device and the reference frequency f _ref . The digital output signal of the frequency comparison device is then fed to the digital synthesis device as an add value, whereby the control loop is closed. There is therefore a digital feedback.

The digital output signal of the frequency

The comparison device is preferably temperature-compensated, ie there is, for example, a characteristic of the temperature dependence of the oscillator in the frequency comparison device stored and further, the frequency _V is ergleichseinrichtung temperature information supplied.

Between the digital synthesis device and the frequency comparison device, a bandpass filter with a

Pass frequency f _{bp can be} switched. The pass frequency f _bp essentially corresponds to the time average of the frequency f _{mut of} the output signal of the digital synthesis device. The spectral purity of the output signal of the digital synthesis device can be improved by the provision of the bandpass filter.

According to a further aspect of the present invention, an automatic frequency control (AFC) circuit is provided which has an oscillator which is connected to a

Frequency f _xtal oscillates. Furthermore, a digital synthesis device is provided which generates an output signal with the frequency f _out . A phase comparator (Phasenko perator) compares the phase of the signal of the oscillator with the frequency f _xtal with the phase of

Output signal of the digital synthesis device and generates an analog output signal which represents the result of the comparison. That is, the greater the difference between the phase of the signal of the oscillator and the phase of the output signal of the digital synthesis device, the greater the analog output signal of the phase comparator. The analog output signal of the phase comparator is then fed to a voltage-controlled oscillator as a control signal. This voltage controlled oscillator (VCO) generates an output signal with a mother _clock frequency f _mut depending on the control signal. A frequency comparison device determines a difference between the mother clock frequency f _{mut of} the output signal of the voltage-controlled oscillator (VCO) and a reference frequency f _ref . The frequency

Comparison device generates a digital output signal, that reflects the frequency difference determined. That is, the greater the difference between the mother clock frequency f _{mut of} the voltage-controlled oscillator and the reference frequency f _ref , the greater the digital output signal of the frequency comparison device. This digital

The output signal of the frequency comparison device is then fed to the digital synthesis device as an add value. The analog output signal of the voltage-controlled oscillator (VCO) with a mother clock frequency f _mut is fed to the digital synthesis device as a clock. The voltage controlled oscillator (VCO) is thus tracked in the manner of a PLL (phase locked loop) loop to the mother _clock frequency f _mut in such a way that the output signal of the digital synthesis device is compared with a non-temperature compensated oscillator and the tracking is carried out by adjusting the very finely gradable (non-integer) control value of the digital synthesis device.

The digital output signal of the frequency

The comparison device can be temperature compensated.

A frequency divider can be connected between the voltage-controlled oscillator (VCO) and the digital synthesis device, which frequency divider the frequency f _{mut of} the output signal of the voltage-controlled oscillator, that of

Digital synthesis device is supplied as a clock to divide a certain value to a frequency f _in .

The invention will now be explained in more detail using exemplary embodiments and with reference to the figures of the accompanying drawings. Show it:

1 shows a first circuit according to the invention for automatic frequency control (AFC) according to a first exemplary embodiment of the present invention, FIG. 2 shows a further circuit for automatic frequency control according to the first exemplary embodiment of the present invention,

Figure 3 shows a circuit for automatic

Frequency control according to a second embodiment of the present invention,

Figure 4 shows another circuit for automatic

Frequency control according to the second embodiment of the present invention,

FIG. 5 shows a schematic diagram of a digital synthesis device (DDS),

FIG. 6 shows an illustration to explain the operation of a digital synthesis device,

FIG. 7 shows a further illustration to explain the frequency changeover during the operation of a digital synthesis device,

FIG. 8 shows a representation to explain the conversion of the signal generated by the digital synthesis device into a sinusoidal signal, and

Figure 9 shows a circuit for automatic frequency control according to the prior art.

First, a so-called digital synthesis device (Direct Digital Synthesis, DDS) will be explained, which is a central component of the present invention. The digital synthesis device enables digital signal synthesis. FIG. 5 shows a basic representation of the function of such a digital synthesis device (DDS). 2 shown. The basic function of a DDS is an accumulator, which adds an input signal A to the output signal B in a certain cycle. The mathematical function performed by a DDS can therefore be represented as follows:

B _n = A + B _(n . _X) (equation 1)

If a certain number range, the so-called accumulator range or adding range, is exceeded, the output signal of the digital synthesis device (DDS) falls back to 0 or the newly calculated value B = B modulo counting range (overflow addition). The following example should serve as an explanation:

Clock = 1 MHz

Addition value A = 1

Accumulator area (word width, adding area) = 1 million

According to the function of equation 1, the output value B in this case runs continuously from 0 to 1 million and then falls back to 0. Then the start-up of the starting value B begins again. This means that a sawtooth with a certain frequency f _{out is} generated. This frequency can be calculated as follows:

f _out = cycle x add value A add area (equation 2)

Thus, if the clock is 1 MHz, the add value A = 1 and the add range = 1 million, a sawtooth is generated with a repetition frequency of 1 Hz, as shown in FIG. 6. From equation 2 it is easy to see that the frequency f _out generated directly depends on the clock, the applied add value A and the word width of the adder (accumulator). Now consider the case where the add value A is changed to 2, for example (see FIG. 7). In this case, as can be calculated from equation 2, the one generated

Change frequency f _out by jumping the add value from 1 to 2 from 1 Hz to 2 Hz. The generated frequency f _out is therefore switched over. The switching of the output frequency f _{out of} the DDS can be done very quickly, namely within one cycle. Furthermore, the frequency f _{out is switched} without a phase shift, as can also be seen in FIG. 7.

A sawtooth-shaped signal is normally not desired for further processing. As can be seen from FIG. 8, a sinusoidal signal can be obtained from the sawtooth-shaped output signal with the frequency f _{out of} the DDS 2, in which the output signal B with the frequency f _{out of} the DDS 2 is supplied as an address to a so-called look-up table 11. The sawtooth function is thus implemented via a look-up table 11, so that a sinusoidal signal is generated directly from the address information.

As can be seen in particular from equation 2, FM modulation of the generated signal with the frequency f _{out can be} made possible by changing the addition value A. The maximum frequency f _{out of} the output signal of the DDS 2 that can be generated is theoretically half the clock frequency of the DDS 2. In practice, however, the maximum frequency should be a maximum of 30% of the clock frequency of the DDS 2. If the DDS is to be used for an application in the mobile radio sector, it can be produced as an integrated circuit (IC), for example using CMOS technology.

After the basic explanation of the function of a digital synthesis device (DDS) is now a first Embodiment of a circuit for automatic frequency control according to the invention will be explained. As can be seen from FIG. 1, the output signal of a non-temperature-compensated oscillator 1 with the frequency f _{xtal is fed} as a clock to a digital synthesis device (DDS) 2. The DDS 2 generates an output signal with the frequency f _mut , which is fed to a frequency comparison device 3 as the mother clock. The frequency comparison _device 3 compares the frequency f _{mut of} the output signal of the DDS 2 with a reference frequency f _ref , which can be obtained, for example, in the form of a system clock from time normal information. The reference frequency f _ref can also be obtained by a reference oscillator such as a quartz. The frequency comparison device 3 generates a digital output signal that depends on the determined difference between the frequency f _{mut of} the output signal of the DDS 2 and the reference frequency f _ref . The

Frequency comparison device 3 will normally be implemented in software. The digital output signal S _{d of} the frequency comparison device 3 is supplied to the DDS 2 as an add value.

A table can be stored in the frequency comparison device 3, which shows the characteristic of the temperature dependence f (T) of the frequency of the non-temperature-compensated oscillator 1. If the frequency comparison device 3 is now supplied with temperature information T, it can temperature compensate the digital output signal S _{d by} combining the temperature information T and the stored information

Characteristic of the temperature dependence of the non-temperature compensated oscillator 1 determines the extent to which the digital output signal S _{d has to be} increased or decreased in order to compensate for the temperature dependence (drift) of the oscillator 1. From a clock signal, namely the

Output signal of the non-temperature compensated oscillator 1 With the frequency f _xtal , which is neither temperature-compensated nor otherwise tracked, a temperature-compensated signal f _mut, which is tracked to a system clock with the frequency f _ref , is thus generated with the aid of the DDS 2 and the frequency _{comparison device} 3 acting as a control unit.

However, it must be taken into account that the output signal of the DDS 2 with the frequency f _mut , which is used as the mother clock, is generally much worse than a quartz crystal in terms of its spectral purity. This results from the fact that the spectral purity is determined by the resolution of the D / A converter in the DDS 2 and these D / A converters cannot be as good as desired. FIG. 2 shows how this disadvantage can be eliminated. As can be seen from FIG. 2, an analog filter 4 can be connected between the DDS 2 and the frequency comparison device 3, which in particular improves the wide range of the output signal of the DDS 3 with the frequency f _mut . The improvement in the near spectrum is naturally less. The analog filter 4 is a

Bandpass filter with a pass frequency f _bp , which is selected so that it essentially corresponds to the time average of the frequency f _{mut of} the output signal of the DDS 2.

A second exemplary embodiment of a circuit for automatic frequency control according to the invention is now shown, which is shown in FIG. As can be seen from FIG. 3, the output signal of the non-temperature-compensated oscillator 1 with the frequency f _{xtal is fed to} a so-called phase comparator (phase comparator) 6. The phase comparator 6 compares the phase of the output signal of the non-temperature-compensated oscillator 1 with the frequency f _xtal with the phase of the output signal of a DDS 2 with the frequency f _out . The phase comparator 6 generates an analog output signal (tracking signal) depending from the result of the comparison of the phase of the output signal of the non-temperature-compensated oscillator 1 or of the DDS 2. This analog tracking signal is fed to a voltage-controlled oscillator 5 by means of a low-pass filter 7. The VCO 5 can be used, for example, with

Capacitance diodes tunable oscillators, astable flip-flops and blocking oscillators. The output signal of the voltage-controlled oscillator 5 with the frequency f _in is supplied to the digital synthesis device 2 as a clock. The output signal of the voltage-controlled oscillator 5 is also fed to a frequency comparison device 3 as a mother clock with the frequency f _mut . This frequency comparison _device 3 compares the frequency f _{mut of} the voltage-controlled oscillator 5 with a reference frequency f _ref, which can be obtained, for example, as a system clock from time normal information. As has already been described in the context of the first exemplary embodiment, the frequency comparison device 3 can furthermore have devices for temperature compensation, information about the temperature T being supplied. The

Frequency comparison device 3 generates a digital tracking signal SD depending on the result of the frequency comparison. This digital tracking signal SD is supplied to the DDS 2 as an add value.

The voltage controlled oscillator is tracked so in the manner of a PLL (Phase Locked Loop) in the native frequency f _mut in such a way that the output signal of the DDS 2 with the frequency f _out of the frequency f _xtal of a non-temperature compensated oscillator is compared. This PL-L-like circuit is adjusted by setting the control value of the DDS 2. This control value can be very finely graduated (not an integer). The following equations apply Equation 3 Fout = add value Fin add range

Equation 4 Fout = Fin * add value add range

the DDS 2.

It should be taken into account that the frequency f _{xtai of} the non-temperature-compensated oscillator 1 and also the frequency of the output signal of the DDS 2 is very small compared to the frequency f _{in of} the voltage-controlled oscillator 5, as can be seen from equation 2, which must be taken into account that the value of the adding area is significantly larger than that of the adding value A.

In the phase and frequency-rigid coupling state of the circuit shown in FIG. 3, f _out = f _xtal and in this regulated state the following applies:

Equation 5 Fin add range Fxtal add value

From this equation it can be seen that the generated mother frequency f _mut can be connected to the non-temperature compensated oscillator 1 in very small steps by changing the addition value. The control of the temperature drift of the non-temperature-compensated oscillator 1 and the frequency offsets can thus be carried out by the control by continuously tracking this add value as a control value. The unwanted signals are suppressed by the oscillator 1 itself, since this has a high quality, as well as through the low-pass filter 7.

FIG. 4 shows a modification of the circuit for automatic frequency control shown in FIG. 3.

This modification is advantageous if a mother clock f _mut is to be generated at a very high frequency. As can be seen from FIG. 4, a frequency divider (prescaler) 8 is connected between the voltage-controlled oscillator 5 and the digital synthesis device 2. This divider 8 divides the frequency of the output signal of the voltage-controlled oscillator 5 by a predetermined value N. This frequency f _{ιn divided} by the value N is then fed to the DDS 2 as a clock. The DDS 2 can thus run at a low clock compared to the mother clock f _mut , whereby the power consumption and the demands on the DDS can be reduced. This is particularly advantageous in applications such as mobile radio devices in which low power consumption has top priority.

Through the digital tracking and the use of the DDS 2, a signal can be generated that is very precise and temperature compensated.

Claims

claims

_1st _S circuit for automatic frequency control, comprising: an oscillator (1) which oscillates at a frequency f _xtal ,

- A digital synthesis device (2) to which the frequency f _{xtal of} the oscillator (1) is supplied as a clock and which generates an output signal with the frequency f _mut , and - A frequency comparison device (3) which has a difference between the output frequency f _{mut of} the digital synthesis device (2) and a reference frequency f _{ref is} determined and a digital output signal (Sd) reproducing the determined frequency difference is generated, the digital output signal (Sd) being fed to the digital synthesis device (2) as an add value.

2. Circuit according to claim 1, characterized in that the frequency comparison device (3) has a table in which the temperature characteristic of the oscillator is stored and that the frequency comparison device (3) for temperature compensation of the output signal (Sd) contains temperature information is feedable.

3. Circuit according to one of claims l or 2, characterized in that between the digital synthesis device (2) and the frequency comparison device (3) an analog bandpass filter (4) is connected with a pass frequency f _bp , which is essentially the temporal Means the frequency f _{mut of} the output signal of the digital synthesis device (2).

4. Circuit for automatic frequency control, comprising: an oscillator (1) which oscillates at a frequency f _xtal ,

- A digital synthesis device (2), which generates an output signal with the frequency f _out , - A phase comparator (6), the phase of the signal of the oscillator (1) with the frequency f _xtal with the phase of the output signal of the digital synthesis device (2) compares and generates an analog output signal Sa, which reproduces the result of the comparison, - a voltage-controlled oscillator (5), to which the analog output signal Sa of the phase comparator (6) is fed as a control signal and which has an output signal dependent on the control signal Mother _{clock frequency} f _mut generated,

- A frequency comparison device (3) which has a difference between the mother _clock frequency f _mut and one

The reference frequency f _{ref is} determined and a digital output signal (Sa) reproducing the determined frequency difference is generated, the digital output signal (Sa) of the frequency comparison device (3) of the digital synthesis device (2) as an add value and the analog output signal of the voltage-controlled oscillator (5). with the mother clock frequency f _mut the digital synthesis device (2) are supplied as a clock.

5. A circuit according to claim 4, characterized in that the digital output signal (Sd) of the frequency

Comparison device is temperature compensated.

6. Circuit according to one of claims 4 or 5, characterized in that a frequency divider (8) is connected between the voltage-controlled oscillator (5) and the digital synthesis device (2), the frequency f _{mut of} the output signal, the ^f _m ut the digital synthesis device (2) fed as a clock is divided by a certain value (s) on the frequency f _in .