WO1998013936A1 - Connected source of current - Google Patents

Connected source of current Download PDF

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Publication number
WO1998013936A1
WO1998013936A1 PCT/DE1997/001462 DE9701462W WO9813936A1 WO 1998013936 A1 WO1998013936 A1 WO 1998013936A1 DE 9701462 W DE9701462 W DE 9701462W WO 9813936 A1 WO9813936 A1 WO 9813936A1
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WO
WIPO (PCT)
Prior art keywords
transistor
emitter
resistor
collector
current source
Prior art date
Application number
PCT/DE1997/001462
Other languages
German (de)
French (fr)
Inventor
Robert-Grant Irvine
Original Assignee
Siemens Aktiengesellschaft
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Publication of WO1998013936A1 publication Critical patent/WO1998013936A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/4508—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using bipolar transistors as the active amplifying circuit
    • H03F3/45085—Long tailed pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/30—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
    • H03F3/3066—Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor the collectors of complementary power transistors being connected to the output
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/4508—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using bipolar transistors as the active amplifying circuit
    • H03F3/45085—Long tailed pairs
    • H03F3/45094—Folded cascode stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/30—Indexing scheme relating to single-ended push-pull [SEPP]; Phase-splitters therefor
    • H03F2203/30078—A resistor being added in the pull stage of the SEPP amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/30—Indexing scheme relating to single-ended push-pull [SEPP]; Phase-splitters therefor
    • H03F2203/30111—A resistor being added in the push stage of the SEPP amplifier

Definitions

  • the invention relates to a switched current source. This is used to generate a high-frequency switched current signal.
  • the maximum switching frequency is around 150 MHz.
  • the invention can be used, for example, in an up-conversion loop as used in mobile radio.
  • PLL phased-locked loop
  • a differential voltage UE at the two input terminals D and VB2 drives a first transistor Q28 and a second transistor Q29, which direct the constant current I generated by a constant current source either onto the supply voltage rail VCC2 or onto the current mirror consisting of two transistors Q33 and Q34.
  • the current mirror Q33, Q34 is switched on and off, the base-emitter and base-substrate capacitances of the two transistors Q33 and Q34 and the base-collector capacitance of the transistor Q34 have to be recharged. This leads to a relatively high duty cycle at output A of the switched current source.
  • the current IA at output A thus increases relatively slowly.
  • the duty cycle is approximately 20 ns.
  • a circuit arrangement for generating a switched current signal according to FIG. 2 is known from the prior art ISSCC 95 / Session 8 / Wireless Communications / Paper TA 8.8, IEEE, 1995, pages 150 to 151.
  • This circuit arrangement shorter switching times can be achieved compared to the switched current source shown in FIG.
  • the two npn transistors B23 and B22 switch the constant current I back and forth between the supply voltage VSP and the emitter of the pnp output transistor Bl operated in the base circuit.
  • the output transistor Bl When the transistor B22 is de-energized, that is to say the transistor B22 is off, the output transistor Bl is switched on, that is to say conductive, and an output current IA flows from the reference voltage VCSH applied to the terminal Ref at the base of the output transistor Bl and the Emitter negative feedback resistance R2 is determined. Otherwise, the transistor B22 conducts the current I through the emitter negative feedback resistor R2, and if the product of the current I and the emitter negative feedback resistor R2 is large enough, the output transistor B1 becomes blocking. The switchover takes place faster than with the current mirror shown in FIG. 1, because only the base-emitter capacitance of the output transistor B1 has to be recharged. However, the circuit according to FIG.
  • the object of the invention is to provide a switched current source or current sink in which the switching edges are as steep as possible and switching times which are as short as possible can thus be achieved.
  • the invention is solved by a switched current source according to claim 1.
  • the circuit arrangement according to claim 4 has the advantage that it can also be used to implement a current sink.
  • Figure 1 shows a switched current source according to the prior art.
  • FIG. 2 shows a second embodiment of a switched current source according to the prior art.
  • FIG. 3 shows a switched current source according to the invention.
  • Figure 4 shows a switched current sink according to the invention.
  • FIG. 5 shows an embodiment of the transimpedance amplifier used in FIG. 4.
  • FIG. 3 shows the implementation of a switched current source according to the invention.
  • a differential voltage UE At the entrances El and E2 there is a differential voltage UE.
  • the input E1 is connected to the base of a first NPN transistor T1 and the input E2 is connected to the base of a second NPN transistor T2.
  • the two transistors T1 and T2 are emitter-coupled and connected via their emitters to a constant current source which supplies the constant current I.
  • the collector of transistor T2 is connected both to a first emitter negative feedback resistor R1 and to the emitter of a pnp transistor T3.
  • the collector of the first transistor T1 is connected both to a second emitter negative feedback resistor R2 and to the emitter of a second pnp transistor T4.
  • Transistors T3 and T4 are lateral pnp transistors.
  • the collector of transistor T3 is connected to an output terminal A.
  • the two base connections of the transistors T3 and T4 are connected to a reference voltage via the terminal Ref.
  • the two emitter negative feedback resistors R1 and R2 are at the supply voltage potential VCC.
  • the first stage is the emitter negative feedback resistor R1 in connection with the pnp transistor T3 ', which is controlled via the transistor T2.
  • the second stage comprises the emitter negative feedback resistor R2 and the pnp transistor T4, which is controlled via the collector current of the transistor Tl.
  • a push-pull base circuit is formed by this circuit arrangement.
  • the charging of the base-emitter capacitance of the output transistor T3 is compensated for by the discharge of the base-emitter capacitance of the transistor T4.
  • the circuit arrangement according to the invention brings about a significant reduction in the interference acting on the reference voltage. and enables a clean, rectangular current pulse shape at output A.
  • the dynamic load on the supply voltage VCC is reduced because the changes in the emitter currents of the transistors T3 and T4 cancel each other out during switching.
  • the total current remains constant.
  • FIG. 4 shows a switchable current sink which results from an expansion of the switchable current source shown in FIG. 3.
  • the circuit arrangement corresponds to the circuit arrangement shown in FIG. 3.
  • a reference current source which supplies a reference current IRef and the input of a transimpedance amplifier TV is additionally connected to the output terminal A.
  • the transimpedance amplifier TV is connected to the base connection of an NPN transistor T5.
  • the emitter of the npn transistor T5 is connected to ground potential via a resistor R4.
  • the output signal of the switchable current sink can be tapped at the terminal AI, which is connected to the collector of the transistor T5.
  • Such a circuit advantageously provides a large output voltage range at the terminal AI.
  • the switched current source according to FIG. 4, left part, is used to control a broadband transimpedance amplifier TV, which switches the output transistor T5 on and off.
  • the reference current source which supplies the reference current IRef, serves to increase the voltage at the base of the output transistor T5.
  • the reference current IRef is finely adjustable.
  • FIG. 5 shows an embodiment of a transimpedance amplifier TV which is suitable for the above-mentioned purpose.
  • the use of a transimpedance amplifier TV instead of an npn current mirror allows faster switching times because the collector voltage at transistor T3 remains constant and the collector base capacitance therefore does not have to be recharged.
  • the output terminal A of the switched current source is connected to both the base of an npn transistor T6 and a resistor R3.
  • the collector of transistor T6 is connected to the base of a further npn transistor T7 and via a resistor R5 to the supply voltage VCC. This is also applied to the collector of transistor T7.
  • the emitter of the transistor T7, the resistor R3 and an additional resistor R ⁇ lead to the output terminal AI, at which the output signal of the current sink can be tapped.
  • the emitter of transistor T6 and the second terminal of resistor R6 are clamped to ground.
  • the current at the input of the transimpedance amplifier TV and the emitter negative feedback resistor R4 are set so that the desired output current flows through the transistor T5 when the transistor T3 turns off.
  • transistor T3 conducts, its collector current flows through transimpedance resistor R3.
  • the resulting voltage drop at the base of the output transistor T5 must be large enough to be able to switch it off.
  • Transistors T3 and T4 are lateral pnp transistors.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

So far, lateral pnp-transistors were not fitted to high frequency charging pumps. As a solution, the invention suggests that two transistor-resistor modules (T4, R2; T3, T1) be controlled by emitter-coupled transistors (T1, T2) with a differential input voltage, resulting in a push-pull common base circuit, where the charge in one base-emitter is compensated by the discharge in the other base-emitter capacity.

Description

Beschreibungdescription
Geschaltete StromquelleSwitched power source
Die Erfindung betrifft eine geschaltete Stromquelle. Diese dient der Erzeugung eines hochfrequent geschalteten Stromsignals. Die maximale Schaltfreuquenz liegt bei ca. 150 MHz. Einsetzbar ist die Erfindung beispielsweise in einer Up- Conversion-Loop, wie sie im Mobilfunk verwendet wird. Die Er- findung kann dort in einer Phased-Locked-Loop (PLL) als Ladungspumpe (= Charge Pump) verwendet werden.The invention relates to a switched current source. This is used to generate a high-frequency switched current signal. The maximum switching frequency is around 150 MHz. The invention can be used, for example, in an up-conversion loop as used in mobile radio. The invention can be used there in a phased-locked loop (PLL) as a charge pump (= charge pump).
Bei integrierten Schaltungen ist die Realisierung einer Stromquelle, die schnell ein- und ausgeschaltet werden kann, vor allem dann schwierig, wenn weder PMOS-Transistoren noch vertikale pnp-Transistoren mit isoliertem Kollektor zur Verfügung stehen, sondern nur laterale pnp-Transistoren. Diese pnp-Transistoren haben als Nachteile erstens eine niedrige Grenzfrequenz und zweitens eine schlechte Stromergiebigkeit. Die niedrige Grenzfrequenz hat eine hohe Basis-Emitter-Diffusions-Kapazität zur Folge, und die schlechte Stromergiebigkeit führt- dazu, daß große Transistoren mit entsprechend hohen Basis-Kollektor- und Basis-Substrat-Sperrschichtkapazitäten benutzt werden müssen.In the case of integrated circuits, the realization of a current source that can be switched on and off quickly is particularly difficult when neither PMOS transistors nor vertical pnp transistors with an insulated collector are available, but only lateral pnp transistors. The disadvantages of these pnp transistors are firstly a low cut-off frequency and secondly a poor current yield. The low cut-off frequency results in a high base-emitter diffusion capacitance, and the poor current yield means that large transistors with correspondingly high base-collector and base-substrate junction capacitances have to be used.
Die in Figur 1 gezeigte Realisierung einer geschalteten Stromquelle ist aus dem Stand der Technik DE 3 116 603 C2 bekannt. Eine differenzielle Spannung UE an den beiden Eingangsklemmen D und VB2 steuert einen ersten Transistor Q28 und einen zweiten Transistor Q29 an, die den von einer Konstantstromquelle erzeugten konstanten Strom I entweder auf die Versorgungsspannungsschiene VCC2 oder auf dem aus zwei Transistoren Q33 und Q34 bestehenden Stromspiegel lenken. Beim Ein- und Ausschalten des Stromspiegels Q33, Q34 müssen die Basis-Emitter- und die Basis-Substrat-Kapazitäten der beiden Transistoren Q33 und Q34 und die Basis-Kollektor- Kapazität des Transistors Q34 umgeladen werden. Dies führt zu einer relativ hohen Einschaltdauer am Ausgang A der geschalteten Stromquelle. Der Strom IA am Ausgang A steigt somit relativ langsam an. Bei der in Figur 1 gezeigten Schaltungsanordnung beträgt die Einschaltdauer ca. 20 ns .The implementation of a switched current source shown in FIG. 1 is known from the prior art DE 3 116 603 C2. A differential voltage UE at the two input terminals D and VB2 drives a first transistor Q28 and a second transistor Q29, which direct the constant current I generated by a constant current source either onto the supply voltage rail VCC2 or onto the current mirror consisting of two transistors Q33 and Q34. When the current mirror Q33, Q34 is switched on and off, the base-emitter and base-substrate capacitances of the two transistors Q33 and Q34 and the base-collector capacitance of the transistor Q34 have to be recharged. this leads to a relatively high duty cycle at output A of the switched current source. The current IA at output A thus increases relatively slowly. In the circuit arrangement shown in FIG. 1, the duty cycle is approximately 20 ns.
Weiterhin ist aus dem Stand der Technik ISSCC 95/ Session 8/ Wireless Communications / Paper TA 8.8, IEEE, 1995, Seiten 150 bis 151 eine Schaltungsanordnung zur Erzeugung eines geschalteten Stromsignals gemäß Figur 2 bekannt. Mit dieser Schaltungsanordnung können gegenüber der in Figur 1 gezeigten geschalteten Stromquelle kürzere Schaltzeiten realisiert werden. Die beiden npn-Transistoren B23 und B22 schalten den konstanten Strom I zwischen der Versorgungsspannung VSP und dem Emitter des in Basisschaltung betriebenen pnp-Ausgangs- transistors Bl hin und her. Wenn der Transistor B22 stromlos ist, das heißt der Transistor B22 sperrt, ist der Ausgangstransistor Bl eingeschaltet, das heißt leitend und es fließt ein Ausgangsstrom IA, der von der an der Klemme Ref angelegten Referenzspannung VCSH an der Basis des Ausgangstransi- stors Bl und dem Emittergegenkopplungswiderstand R2 bestimmt wird. Im anderen Fall leitet der Transistor B22 den Strom I durch den Emittergegenkopplungswiderstand R2 , und, wenn das Produkt aus dem Strom I und dem Emittergegenkopplungswiderstand R2 groß genug ist, wird der Ausgangstransistor Bl sper- rend. Die Umschaltung erfolgt schneller als mit dem in Figur 1 gezeigten Stromspiegel, weil nur die Basis-Emitter-Kapazität des Ausgangstransistors Bl umgeladen werden muß. Die Schaltung gemäß Figur 2 hat jedoch den Nachteil, daß der Spannungssprung am Emitter des Ausgangstransistors Bl über dessen Basis-Emitter-Kapazität auf dessen Basis gekoppelt wird. Der Grund dafür ist die Referenzspannung VCSH, die nicht beliebig niederohmig erzeugt werden kann. Von der Basis des Ausgangstransistors Bl wird der Spannungssprung über die Basis-Kollektor-Kapazität auf den Ausgang OUTPUT gekoppelt. Die dadurch entstehende Störung kann größer sein als der eigentlich zu erzeugende Stromimpuls. Die Aufgabe der Erfindung ist es, eine geschaltete Stromquelle beziehungsweise Stromsenke anzugeben, bei der die Schaltflanken möglichst steil sind und damit möglichst kurze Schaltzeiten erreicht werden können.Furthermore, a circuit arrangement for generating a switched current signal according to FIG. 2 is known from the prior art ISSCC 95 / Session 8 / Wireless Communications / Paper TA 8.8, IEEE, 1995, pages 150 to 151. With this circuit arrangement, shorter switching times can be achieved compared to the switched current source shown in FIG. The two npn transistors B23 and B22 switch the constant current I back and forth between the supply voltage VSP and the emitter of the pnp output transistor Bl operated in the base circuit. When the transistor B22 is de-energized, that is to say the transistor B22 is off, the output transistor Bl is switched on, that is to say conductive, and an output current IA flows from the reference voltage VCSH applied to the terminal Ref at the base of the output transistor Bl and the Emitter negative feedback resistance R2 is determined. Otherwise, the transistor B22 conducts the current I through the emitter negative feedback resistor R2, and if the product of the current I and the emitter negative feedback resistor R2 is large enough, the output transistor B1 becomes blocking. The switchover takes place faster than with the current mirror shown in FIG. 1, because only the base-emitter capacitance of the output transistor B1 has to be recharged. However, the circuit according to FIG. 2 has the disadvantage that the voltage jump at the emitter of the output transistor B1 is coupled to its base via its base-emitter capacitance. The reason for this is the reference voltage VCSH, which cannot be generated with any low resistance. The voltage jump is coupled from the base of the output transistor B1 to the output OUTPUT via the base-collector capacitance. The resulting disturbance can be greater than the current pulse actually to be generated. The object of the invention is to provide a switched current source or current sink in which the switching edges are as steep as possible and switching times which are as short as possible can thus be achieved.
Vorteilhaf erweise werden mit der Erfindung die dem Stand der Technik anhaftenden Nachteile vermieden.Advantageously, the disadvantages inherent in the prior art are avoided with the invention.
Die Erfindung wird durch eine geschaltete Stromquelle gemäß dem Patentanspruch 1 gelöst.The invention is solved by a switched current source according to claim 1.
Vorteilhafte Weiterbildungen ergeben sich aus den Unteransprüchen .Advantageous further developments result from the subclaims.
So hat die Schaltungsanordnung gemäß Anspruch 4 den Vorteil, daß mit ihr auch eine Stromsenke realisierbar ist.Thus, the circuit arrangement according to claim 4 has the advantage that it can also be used to implement a current sink.
Die Erfindung wird im folgenden anhand von 5 Figuren weiter beschrieben.The invention is further described below with reference to 5 figures.
Figur 1 zeigt eine geschaltete Stromquelle gemäß dem Stand der Technik.Figure 1 shows a switched current source according to the prior art.
Figur 2 zeigt eine zweite Ausführungsform einer geschalte- ten Stromquelle gemäß dem Stand der Technik.FIG. 2 shows a second embodiment of a switched current source according to the prior art.
Figur 3 zeigt eine geschaltete Stromquelle gemäß der Erfindung .Figure 3 shows a switched current source according to the invention.
Figur 4 zeigt eine geschaltete Stromsenke gemäß der Erfindung.Figure 4 shows a switched current sink according to the invention.
Figur 5 zeigt eine Ausführungsform des in Figur 4 eingesetzten Transimpedanzverstärkers .FIG. 5 shows an embodiment of the transimpedance amplifier used in FIG. 4.
In Figur 3 ist die erfindungsgemäße Realisierung einer geschalteten Stromquelle gezeigt. An den Eingängen El und E2 liegt eine differenzielle Spannung UE an. Der Eingang El ist mit der Basis eines ersten npn-Transistors Tl und der Eingang E2 mit der Basis eines zweiten npn-Transistors T2 verbunden. Die beiden Transistoren Tl und T2 sind emittergekoppelt und über ihre Emitter mit einer Konstantstromquelle, die den konstanten Strom I liefert, verbunden. Der Kollektor des Transistors T2 ist sowohl mit einem ersten Emittergegenkopplungswiderstand Rl als auch mit dem Emitter eines pnp-Transistors T3 verbunden. Der Kollektor des ersten Transistors Tl ist sowohl mit einem zweiten Emittergegenkopplungswiderstand R2 als auch dem Emitter eines zweiten pnp-Transistors T4 verbunden. Die Transistoren T3 und T4 sind laterale pnp-Transistoren.FIG. 3 shows the implementation of a switched current source according to the invention. At the entrances El and E2 there is a differential voltage UE. The input E1 is connected to the base of a first NPN transistor T1 and the input E2 is connected to the base of a second NPN transistor T2. The two transistors T1 and T2 are emitter-coupled and connected via their emitters to a constant current source which supplies the constant current I. The collector of transistor T2 is connected both to a first emitter negative feedback resistor R1 and to the emitter of a pnp transistor T3. The collector of the first transistor T1 is connected both to a second emitter negative feedback resistor R2 and to the emitter of a second pnp transistor T4. Transistors T3 and T4 are lateral pnp transistors.
Der Kollektor des pnp-Transistors T4 ist auf Massepotential (= Referenzpotential) gelegt. Der Kollektor des Transistors T3 ist mit einer Ausgangsklemme A verbunden. Die beiden Basisanschlüsse der Transistoren T3 und T4 sind über die Klemme Ref mit einer Referenzspannung verbunden. Die beiden Emittergegenkopplungswiderstände Rl und R2 liegen auf Versorgungs- spannungpotential VCC. Als erste Stufe wird im folgenden der Emittergegenkopplungswiderstand Rl in Verbindung mit dem pnp- Transistor T3 ' , der über den Transistor T2 gesteuert wird, bezeichnet. Die zweite Stufe umfaßt den Emittergegenkopplungswiderstand R2 und den pnp-Transistor T4, der über den Kollektorstrom des Transistors Tl gesteuert wird. Durch diese Schaltungsanordnung wird eine Gegentaktbasisschaltung gebildet. Dadurch wird die Aufladung der Basis-Emitter-Kapazität des Ausgangstransistors T3 durch die Entladung der Basis- Emitter-Kapazität des Transistors T4 kompensiert. Dies gilt auch in umgekehrter Richtung. Das heißt, die Umladeströme fließen zwischen den Basisanschlüssen der beiden Transistoren T3 und T4. Sie belasten nicht die Schaltung, die die Referenzspannung, die an der Klemme ref anliegt, erzeugt.The collector of the pnp transistor T4 is connected to ground potential (= reference potential). The collector of transistor T3 is connected to an output terminal A. The two base connections of the transistors T3 and T4 are connected to a reference voltage via the terminal Ref. The two emitter negative feedback resistors R1 and R2 are at the supply voltage potential VCC. In the following, the first stage is the emitter negative feedback resistor R1 in connection with the pnp transistor T3 ', which is controlled via the transistor T2. The second stage comprises the emitter negative feedback resistor R2 and the pnp transistor T4, which is controlled via the collector current of the transistor Tl. A push-pull base circuit is formed by this circuit arrangement. As a result, the charging of the base-emitter capacitance of the output transistor T3 is compensated for by the discharge of the base-emitter capacitance of the transistor T4. This also applies in the opposite direction. That is, the recharge currents flow between the base connections of the two transistors T3 and T4. They do not load the circuit that generates the reference voltage that is present at terminal ref.
Die erfindungsgemäße Schaltungsanordnung bewirkt eine deutliche Reduzierung der auf die Referenzspannung wirkenden Stö- rungen und ermöglicht eine saubere, rechteckige Stromimpulsform am Ausgang A.The circuit arrangement according to the invention brings about a significant reduction in the interference acting on the reference voltage. and enables a clean, rectangular current pulse shape at output A.
Außerdem wird die dynamische Belastung der Versorgungsspan- nung VCC verringert, weil sich die Änderungen der Emitter- strόme der Transistoren T3 und T4 beim Schalten aufheben. Der Gesamtstrom bleibt damit konstant.In addition, the dynamic load on the supply voltage VCC is reduced because the changes in the emitter currents of the transistors T3 and T4 cancel each other out during switching. The total current remains constant.
In Figur 4 ist eine umschaltbare Stromsenke dargestellt, die aus einer Erweiterung der in Figur 3 gezeigten umschaltbaren Stromquelle resultiert. Die Schaltungsanordnung entspricht bis zur Ausgangsklemme A der in der Figur 3 gezeigten Schal - tungsanordnung. An die Ausgangsklemme A ist zusätzlich eine Referenzstromquelle, die einen Referenzstrom IRef liefert und der Eingang eines Transimpedanzverstärkers TV angeschlossen. Ausgangsseitig ist der Transimpedanzverstärker TV mit dem Basisanschluß eines npn-Transistors T5 verbunden. Der Emitter des npn-Transistors T5 ist über einen Widerstand R4 auf Massepotential gelegt. Das Ausgangssignal der umschaltbaren Stromsenke ist an der Klemme AI abgreifbar, welche mit dem Kollektor des Transistors T5 verbunden ist.FIG. 4 shows a switchable current sink which results from an expansion of the switchable current source shown in FIG. 3. Up to the output terminal A, the circuit arrangement corresponds to the circuit arrangement shown in FIG. 3. A reference current source which supplies a reference current IRef and the input of a transimpedance amplifier TV is additionally connected to the output terminal A. On the output side, the transimpedance amplifier TV is connected to the base connection of an NPN transistor T5. The emitter of the npn transistor T5 is connected to ground potential via a resistor R4. The output signal of the switchable current sink can be tapped at the terminal AI, which is connected to the collector of the transistor T5.
Eine derartige Schaltung stellt vorteilhafterweise einen großen Ausgangsspannungsbereich an der Klemme AI zur Verfügung.Such a circuit advantageously provides a large output voltage range at the terminal AI.
Die geschaltete Stromquelle gemäß Figur 4, linker Teil wird benutzt, um einen breitbandigen Transimpedanzverstärker TV anzusteuern, der den Ausgangstransistor T5 ein- und ausschaltet. Die Referen∑stromquelle, die den Referenzstrom IRef lie- fert, dient der Erhöhung der Spannung an der Basis des Ausgangstransistors T5. Der Referenzstrom IRef ist fein einstellbar.The switched current source according to FIG. 4, left part, is used to control a broadband transimpedance amplifier TV, which switches the output transistor T5 on and off. The reference current source, which supplies the reference current IRef, serves to increase the voltage at the base of the output transistor T5. The reference current IRef is finely adjustable.
Durch die in Figur 4 gezeigte Schaltungsanordnung bleibt die in Figur 4, linker Teil gezeigte Stromquelle unbelastet, was kürzere Schaltzeiten mit sich bringt. In Figur 5 ist eine Ausführungsform eines Transimpedanzver- starker TV, der für den obengenannten Zweck geeignet ist, gezeigt . Die Verwendung eines Transimpedanzverstarkers TV anstatt eines npn-Stromspiegels erlaubt schnellere Schaltzei- ten, weil die Kollektorspannung am Transistor T3 konstant bleibt, und die Kollektor-Basis-Kapazitat daher nicht umgeladen werden muß.Due to the circuit arrangement shown in FIG. 4, the current source shown in FIG. 4, left part remains unloaded, which results in shorter switching times. FIG. 5 shows an embodiment of a transimpedance amplifier TV which is suitable for the above-mentioned purpose. The use of a transimpedance amplifier TV instead of an npn current mirror allows faster switching times because the collector voltage at transistor T3 remains constant and the collector base capacitance therefore does not have to be recharged.
Die Ausgangsklemme A der geschalteten Stromquelle ist sowohl mit der Basis eines npn-Transistors T6 als auch einem Widerstand R3 verbunden. Der Kollektor des Transistors T6 ist mit der Basis eines weiteren npn-Transistors T7 und über einen Widerstand R5 mit der Versorgungsspannung VCC verbunden. Diese liegt auch am Kollektor des Transistors T7 an. Der Emitter des Transistors T7 , der Widerstand R3 und ein zusätzlicher Widerstand Rβ führen auf die Ausgangsklemme AI, an welcher das Ausgangssignal der Stromsenke abgreifbar ist. Der Emitter des Transistors T6 und der zweite Anschluß des Widerstands R6 sind auf Masse geklemmt.The output terminal A of the switched current source is connected to both the base of an npn transistor T6 and a resistor R3. The collector of transistor T6 is connected to the base of a further npn transistor T7 and via a resistor R5 to the supply voltage VCC. This is also applied to the collector of transistor T7. The emitter of the transistor T7, the resistor R3 and an additional resistor Rβ lead to the output terminal AI, at which the output signal of the current sink can be tapped. The emitter of transistor T6 and the second terminal of resistor R6 are clamped to ground.
Der Strom am Eingang des Transimpedanzverstarkers TV und der Emittergegenkopplungswiderstand R4 werden so eingestellt, daß der gewünschte Ausgangsstrom durch den Transistor T5 fließt, wenn der Transistor T3 sperrt. Wenn der Transistor T3 leitet, fließt dessen Kollektorstrom durch den Transimpedanzwiderstand R3. Der daraus resultierende Spannungsabfall an der Basis des Ausgangstransistors T5 muß groß genug sein, um diesen ausschalten zu können.The current at the input of the transimpedance amplifier TV and the emitter negative feedback resistor R4 are set so that the desired output current flows through the transistor T5 when the transistor T3 turns off. When transistor T3 conducts, its collector current flows through transimpedance resistor R3. The resulting voltage drop at the base of the output transistor T5 must be large enough to be able to switch it off.
Die Transistoren T3 und T4 s nd laterale pnp-Transistoren. Transistors T3 and T4 are lateral pnp transistors.

Claims

Patentansprüche claims
1. Geschaltete Stromquelle,1. Switched power source,
- bei der zwei Eingangsanschlüsse (El, E2) und ein Ausgangs- anschluß (A) vorgesehen sind,- in which two input connections (E1, E2) and one output connection (A) are provided,
- bei der ein erster Transistor (Tl) und ein zweiter Transistor (T2) emittergekoppelt sind, und die Steuereingänge mit den beiden Eingangsanschlüssen (El, E2 ) und die Emitter mit einer Konstantstromquelle verbunden sind, - bei der der Emitter eines dritten Transistors (T3) einerseits über einen ersten Widerstand (Rl) mit einer Versorgungsspannung (VCC) und andererseits mit dem Kollektor des zweiten Transistors (T2) verbunden ist,- In which a first transistor (T1) and a second transistor (T2) are emitter-coupled, and the control inputs are connected to the two input terminals (El, E2) and the emitters are connected to a constant current source, - in which the emitter of a third transistor (T3 ) is connected on the one hand to a supply voltage (VCC) via a first resistor (R1) and on the other hand to the collector of the second transistor (T2),
- bei der der Emitter eines vierten Transistors (T4) einer- seits über einen zweiten Widerstand (R2) mit der Versorgungsspannung (VCC) und andererseits mit dem Kollektor des ersten Transistors (Tl) verbunden ist,- in which the emitter of a fourth transistor (T4) is connected on the one hand via a second resistor (R2) to the supply voltage (VCC) and on the other hand to the collector of the first transistor (Tl),
- bei der die Steuereingänge des dritten und des vierten Transistors (T3, T4) mit einer Referenzspannung verbunden sind,the control inputs of the third and fourth transistors (T3, T4) are connected to a reference voltage,
- bei der der Kollektor des dritten Transistors (T3) mit dem Ausgangsanschluß (A) und der Kollektor des vierten Transistors (T4) mit Masse verbunden ist.- In which the collector of the third transistor (T3) is connected to the output terminal (A) and the collector of the fourth transistor (T4) to ground.
2. Geschaltete Stromquelle nach Anspruch 1, bei der der erste und der zweite Transistor (Tl, T2 ) npn- Transistoren sind.2. Switched current source according to claim 1, wherein the first and the second transistor (Tl, T2) are npn transistors.
3. Geschaltete Stromquelle nach Anspruch 1 oder 2, bei der der dritte und der vierte Transistor (T3, T4) laterale pnp-Transistoren sind.3. Switched current source according to claim 1 or 2, wherein the third and fourth transistors (T3, T4) are lateral pnp transistors.
4. Geschaltete Stromquelle nach einem der Ansprüche 1 bis 3,4. Switched current source according to one of claims 1 to 3,
- bei der eine Referenzstromquelle und ein Transimpedanzver- stärker (TV) vorgesehen sind, die mit dem Ausgangsanschluß- In which a reference current source and a transimpedance amplifier (TV) are provided, which are connected to the output connection
(A) verbunden sind, - bei der ein fünfter Transistor (T5) vorgesehen ist, dessen Steuereingang mit dem Ausgang des Transimpedanzverstarkers verbunden ist, dessen Emitter über einen Emittergegenkopplungswiderstand (R4) mit einem Referenzpotential verbunden ist, und dessen Kollektor mit einer Ausgangsklemme (AI) verbunden ist.(A) are connected, - In which a fifth transistor (T5) is provided, the control input of which is connected to the output of the transimpedance amplifier, the emitter of which is connected to a reference potential via an emitter negative feedback resistor (R4), and the collector of which is connected to an output terminal (AI).
5. Geschaltete Stromquelle nach Anspruch 4,5. Switched current source according to claim 4,
- bei der der Transimpedanzverstärker (TV) eingangseitig mit dem Steuereingang eines sechsten Transistors (T6) und einem- In which the transimpedance amplifier (TV) on the input side with the control input of a sixth transistor (T6) and one
Widerstand R3 verbunden ist,Resistor R3 is connected
- bei der der Kollektor des sechsten Transistors (T6) mit dem Steuereingang eines siebten Transistor (T7) und einem Widerstand (R5) verbunden ist, - bei der der Emitter des sechsten Transistors (T6) mit dem Referenzpotential verbunden ist,- in which the collector of the sixth transistor (T6) is connected to the control input of a seventh transistor (T7) and a resistor (R5), - in which the emitter of the sixth transistor (T6) is connected to the reference potential,
- bei der der Emitter des siebten Transistors (T7), der Widerstand R3 und ein Widerstand R6 mit der Ausgangsklemme (AI) verbunden sind, - bei der der zweite Anschluß des Widerstands R6 mit dem Referenzpotential verbunden ist,the emitter of the seventh transistor (T7), the resistor R3 and a resistor R6 are connected to the output terminal (AI), - the second connection of the resistor R6 is connected to the reference potential,
- bei der der zweite Anschluß des Widerstands R5 und der Kollektor des siebten Transistors (T7) mit der Versorgungsspannung (VCC) verbunden sind. - In which the second connection of the resistor R5 and the collector of the seventh transistor (T7) are connected to the supply voltage (VCC).
PCT/DE1997/001462 1996-09-26 1997-07-10 Connected source of current WO1998013936A1 (en)

Applications Claiming Priority (2)

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DE19639706A DE19639706C1 (en) 1996-09-26 1996-09-26 Controlled current source, especially for charge pump
DE19639706.5 1996-09-26

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FR2887708B1 (en) * 2005-06-28 2008-02-15 Atmel Grenoble Soc Par Actions ELECTRONIC CIRCUIT WITH A NETWORK OF DISYMETRIC DIFFERENTIAL PAIRS

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EP0011705A1 (en) * 1978-11-23 1980-06-11 Siemens Aktiengesellschaft Microphone amplifier, in particular for telephone installations
EP0144647A1 (en) * 1983-10-24 1985-06-19 Kabushiki Kaisha Toshiba Differential amplifier
JPS60134506A (en) * 1983-12-22 1985-07-17 Seiko Epson Corp Differential amplifier

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EP0011705A1 (en) * 1978-11-23 1980-06-11 Siemens Aktiengesellschaft Microphone amplifier, in particular for telephone installations
EP0144647A1 (en) * 1983-10-24 1985-06-19 Kabushiki Kaisha Toshiba Differential amplifier
JPS60134506A (en) * 1983-12-22 1985-07-17 Seiko Epson Corp Differential amplifier

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