WO1997036428A1 - Systeme d'acquisition video haute resolution en temps reel - Google Patents

Systeme d'acquisition video haute resolution en temps reel Download PDF

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Publication number
WO1997036428A1
WO1997036428A1 PCT/US1997/005043 US9705043W WO9736428A1 WO 1997036428 A1 WO1997036428 A1 WO 1997036428A1 US 9705043 W US9705043 W US 9705043W WO 9736428 A1 WO9736428 A1 WO 9736428A1
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WO
WIPO (PCT)
Prior art keywords
video
data stream
yuv
data
communication
Prior art date
Application number
PCT/US1997/005043
Other languages
English (en)
Inventor
Jeffery D. Belote
Jeff S. Ford
Original Assignee
Intergraph Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intergraph Corporation filed Critical Intergraph Corporation
Priority to EP97917079A priority Critical patent/EP0890266A1/fr
Publication of WO1997036428A1 publication Critical patent/WO1997036428A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/79—Processing of colour television signals in connection with recording
    • H04N9/80—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
    • H04N9/804—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components
    • H04N9/8042—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components involving data reduction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N11/00—Colour television systems
    • H04N11/06—Transmission systems characterised by the manner in which the individual colour picture signal components are combined
    • H04N11/20—Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/426—Internal components of the client ; Characteristics thereof

Definitions

  • the present invention generally relates to the processing of video data, and more particularly to a system and apparatus that supports real-time capture and playback of high resolution compressed and uncompressed digital video data.
  • a user In the field of video processing, a user usually wants a computer graphics system that captures and plays back both compressed and uncompressed video data.
  • a Digital Disk Recorder may process either compressed or uncompressed data, but not both.
  • the capturing of uncompressed video data also is problematic because of bus bandwidth limitations when using single bus designs. And the systems that will process uncompressed data may not be compatible with some file systems. Furthermore, the use of proprietary file formats and the cost of such systems, make them of limited use in the industry.
  • the capture and playback functions, as well as editing be performed on a single board within the system.
  • PCI Peripheral Component Interconnect
  • the capture function will be performed on one board and the playback function on another board.
  • there is often no scaling feature or means to do other video editing e.g., color correction, and adjusting of brightness, hue, and saturation.
  • the present invention in a preferred embodiment, is a real-time high resolution video capture and playback system which comprises a digital video input; a bus interface in communication with the video input providing a high resolution digital video data stream; a transient memory in communication with the interface over a first data path; and a digital storage medium in communication with the transient memory over a second data path, wherein the first and second data paths are configured to permit real-time storage of the data stream under microprocessor control.
  • the first data path may comprise a first data bus and the second data path may comprise a second data bus .
  • the bus interface is preferably DMA.
  • the digital storage medium may be a plurality of disk drives, for example, a redundant array of inexpensive disks.
  • the digital video signal is processed by a Joint Photographic Experts Group (JPEG) digital video board which is a single PCI board that supports real-time video capture and playback, and video editing of a digital video data stream on a computer graphics workstation.
  • JPEG Joint Photographic Experts Group
  • the video data stream may either be compressed or uncompressed.
  • the board comprises: a digital video input for receiving a video data stream; a YUV coding device in communication with the video input for processing the video data stream into a YUV data stream; a formatter in communication with the YUV coding device for processing the YUV data stream; a plurality of lookup tables in communication with the YUV coding device for adjusting contrast and brightness of the YUV data stream; a sealer in communication with the YUV coding device for scaling the YUV data stream; a bus interface in communication with the lookup tables for communicating the YUV data stream across the first data bus to system memory; a JPEG device in communication with the YUV decoding device for compressing an uncompressed video stream; and a composite video encoder in communication with the YUV coding device for encoding the video data stream into an analog format.
  • the board allows full 60 fields capture and playback of CCIR-601 sampled video using the Dl transmission standard. This provides the highest possible video quality into and out of the workstation. The resultant video quality is limited only by the available disk bandwidth. Captured video may be optionally scaled down from full size to reduce the data volume or processing time during editing sessions. The finished video may be scaled up on playback, if necessary, to full frame size.
  • the board supports memory-to-memory compression and decompression services required during video editing, as well as unsealed and uncompressed video capture and playback.
  • FIG. 1 is a block diagram of a preferred embodiment of a real-time high resolution video capture and playback system of the present invention.
  • FIG. 2 is a functional block diagram of the flow of video data in a preferred embodiment of a video board of the present invention.
  • FIG. 1 shows a block diagram of a preferred embodiment of a real-time high resolution video capture and playback system of the present invention.
  • High resolution means at least 720 x 486 for National Television System Committee (NTSC) or 720 x 576 for Phase-Alternation Line (PAL) .
  • Video Board 10 preferably a JPEG board, receives or captures a digital video data stream on video input line Dl. The video data stream is processed in accordance with the path of FIG. 2 (explained in detail below) .
  • the video data stream is communicated across a first data path using a bus interface.
  • the first data path is PCI bus 11 and the bus interface is a PCIDMA chip 16.
  • PCIDMA Chip 16 allows the board 10 to transfer data directly to and from the system memory using the PCI bus 11.
  • the video stream is stored in a transient memory that communicates with PCIDMA chip 16.
  • the transient memory is found on a microprocessor chip 20, preferably of the Intel Chipset type.
  • the video data stream is then communicated across a second data path to digital storage mediums such as Redundant Array of Inexpensive Disks (RAID) 31, 35, 36 and 40.
  • FIG. 1 only shows 2 RAIDS per RAID controllers 30 and 41 for illustration purposes only. It should be understood by those of ordinary skill in the art, that there may be a plurality of RAIDS per RAID controller.
  • the second data path is PCI bus 12.
  • Using two PCI buses 11 and 12 to communicate the captured video data from video input Dl throughout the system provides the additional bus bandwidth needed to process high resolution uncompressed video data.
  • the JPEG Codec or JPEG device 15 of board 10 processes the data before it is transferred to transient memory using PCI bus 11.
  • a bridge chip 50 preferably a DEC bridge chip, is used to provide communication to other peripheral devices (not shown) within the system.
  • video data is received on the Dl input line and is decoded and formatted into a YUV data stream using a YUV decoding device 1 and a formatter 2, respectively.
  • the data stream is formatted into a 10-bit, 27 MHZ YUV 4:2:2 data stream according to Society Of Motion Picture And Television Engineers (SMPTE) 125M and Consultative Committee of International Radio (CCIR) 656 specifications for 10-bit parallel video transmission.
  • SMPTE Society Of Motion Picture And Television Engineers
  • CCIR Consultative Committee of International Radio
  • the YUV data stream is then processed by a plurality of lookup tables (LUT) 3.
  • the 10-bit luma (Y) data is adjusted for contrast and brightness in a plurality of Look-Up Tables (LUT) .
  • the 9-bit output of the luma LUT is then truncated to 8 bits and sent to a sealer 4 input first-in, first-out (FIFO) .
  • the 10-bit chroma (Cb and Cr) data is rounded to 9 bits and adjusted for hue and saturation in a different LUT.
  • the 18-bit output of the chroma LUT is then multiplexed and truncated to 8 bits before it is sent to the sealer 4 input FIFO.
  • the 9-bit per component data out of the luma and chroma LUTs 3 are simultaneously re-encoded into a SMPTE 125M video stream using formatter 2 and transmitted on the Dl output line.
  • the LUT modified 10-bit SMPTE125M stream is also sent to a composite video encoder 6 which encodes the stream into a composite or S-Video analog format.
  • the composite video encoder 6 is an NTSC/PAL video encoder.
  • the 16-bit luminance/chrominance (YUV) 4:2:2 video data may be scaled down in both the horizontal and vertical dimensions using the sealer 4.
  • the resultant scaled video must have horizontal and vertical dimensions which are an integer multiple of 8 in order for the JPEG compression algorithm to be applied by the JPEG device 15.
  • each field of the scaled video is then placed into one of two field buffers.
  • the double-buffered field Random Access Memories (RAMs) decouple the sporadic JPEG compressor of JPEG device 15 accesses from the constant rate video stream.
  • the JPEG compressor pulls data out of the frame buffer, through the data router 5, and puts it into the line buffer RAM which acts as a local data buffer for the compressor.
  • the data is sent to the host memory via a Direct Memory Access (DMA) transfer controlled by the PCIDMA chip 16.
  • DMA Direct Memory Access
  • the board 10 works in the same manner a ⁇ described in the paragraph above, except that the data router 5 is configured to send the scaled (or unsealed) video data from the field store to the uncompressed FIFO to be DMA'd into system memory.
  • JPEG device 15 is not involved in this process.
  • the sealer 4 may be configured to produce either YUV 4:2:2 data or Red, Green, Blue (RGB) 4:4:4 data, but if RGB data is selected, it cannot be played back to the Dl outputs without color-space conversion to YUV by the Central Processing Unit (CPU) 21.
  • CPU Central Processing Unit
  • the luma and chroma Lookup Tables (LUTs) 3 are double buffered to allow the user to modify the brightness, contrast, hue, and saturation in real time, either before or during a capture operation.
  • the user may view the results of an adjustment as it is being made on the Dl, composite, or S-Video outputs.
  • compressed data is DMA'd from system memory into the JPEG device 15 for decompression.
  • the decompressed data is sent through the data router 5 and FIFO to the sealer 4, where it is scaled to full size (720 x 486 for NTSC or 720 x 576 for PAL) and put into the field buffer.
  • the double- buffered field buffer decouples the sporadic JPEG decompression stream from the constant rate video stream.
  • the video is taken out of the field buffers through the data router 5 to the LUT.
  • the 8-bit luma (Y) data is adjusted for contrast and brightness in a Look-Up Table (LUT) .
  • the 8-bit chroma (Cb and Cr) data is adjusted for hue and saturation in a different LUT.
  • the 18-bit output of the chroma LUT is then multiplexed together with the 9-bit luma LUT output, formatted according to SMPTE125M and CCIR 656 10-bit parallel video standards, then encoded into a Dl video stream which is transmitted on the Dl output.
  • the LUT modified 10-bit SMPTE125M stream is also sent to the NTSC/PAL video encoder which encodes the stream into a composite or S-Video analog format. If the decompressor cannot keep up with full rate video playback, the last full field received is retransmitted (replicated) until the decompressor finishes the current field.
  • the board 10 works in the same manner as described in the paragraph above, except that the data router 5 is configured to send the scaled (or unsealed) video data from the uncompressed FIFO to the sealer 4 input FIFO.
  • the JPEG device 15 is not involved in this process .
  • the video data format is preferably YUV 4:2:2 for uncompressed video playback.
  • the luma and chroma LUTs 3 are double buffered to allow the user to modify the brightness, contrast, hue, and saturation in real-time, either before or during a playback operation.
  • the user may view the results of an adjustment as it is being made on the Dl, composite, or S-Video outputs.
  • the reference input allows the outgoing video to be field-locked to a black burst or other stable composite reference input.
  • the reference input preferably has no more than 63.5 ⁇ s of jitter between vertical syncs to obtain a stable video output.
  • the board 10 may be configured to do memory to memory compression of either scaled or unsealed fields.
  • Scaled fields must be in YUV 4:2:2 format, and the compressed field size must be an integer multiple of 8 in both x and y.
  • the following formats are available for unsealed compression: • RGB (packed, unpacked)
  • All data will be compressed with no loss or insertion of fields in memory to memory compression mode, since the data is not required to be processed at a fixed rate as in video capture.
  • the board 10 may be configured to do memory to memory scaled or unsealed decompression.
  • Decompressed, scaled fields may be in either the YUV
  • RGB 4:4:4 packed or unpacked formats.
  • the following formats are available for unsealed compression:

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

Système d'acquisition et de reproduction en temps réel de données vidéo numériques comprimées et décomprimées, à haute résolution, reçues sur une carte vidéo JPEG (10) par une ligne d'entrée (D1). Ce signal d'entrée est converti en signal de luminance/chrominance YUV et peut être mis à l'échelle et réglé par rapport à la couleur, au contraste, à la teinte et à la saturation. Une interface de bus (16) communique avec le signal d'entrée vidéo pour produire un flux de données vidéo numériques à haute résolution. Une mémoire non résidente (20) communique avec l'interface (16) sur un premier chemin de données (11) et un support d'informations numérique (31, 35, 36, 40) communique avec cette mémoire non résidente sur un deuxième chemin de données (12), les premier et deuxième chemins de données étant configurés de façon à permettre le stockage en temps réel du flux de données sous la commande du microprocesseur.
PCT/US1997/005043 1996-03-27 1997-03-27 Systeme d'acquisition video haute resolution en temps reel WO1997036428A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP97917079A EP0890266A1 (fr) 1996-03-27 1997-03-27 Systeme d'acquisition video haute resolution en temps reel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US1422696P 1996-03-27 1996-03-27
US60/014,226 1996-03-27

Publications (1)

Publication Number Publication Date
WO1997036428A1 true WO1997036428A1 (fr) 1997-10-02

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EP (1) EP0890266A1 (fr)
WO (1) WO1997036428A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6697525B1 (en) 1998-10-02 2004-02-24 Parthusceva Ltd. System method and apparatus for performing a transform on a digital image
US6868186B1 (en) 2000-07-13 2005-03-15 Ceva D.S.P. Ltd. Visual lossless image compression

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0510639A2 (fr) * 1991-04-26 1992-10-28 Casio Computer Company Limited Enregistreur numérique
WO1993011633A1 (fr) * 1991-12-06 1993-06-10 Accom, Inc. Systeme de disque en temps reel
US5298992A (en) * 1992-10-08 1994-03-29 International Business Machines Corporation System and method for frame-differencing based video compression/decompression with forward and reverse playback capability
EP0613298A2 (fr) * 1992-12-31 1994-08-31 Gte Laboratories Incorporated Dispositif de reproduction de signaux vidéo à accès multiple
US5359365A (en) * 1991-05-24 1994-10-25 Canon Kabushiki Kaisha Moving image processing method and apparatus

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0510639A2 (fr) * 1991-04-26 1992-10-28 Casio Computer Company Limited Enregistreur numérique
US5359365A (en) * 1991-05-24 1994-10-25 Canon Kabushiki Kaisha Moving image processing method and apparatus
WO1993011633A1 (fr) * 1991-12-06 1993-06-10 Accom, Inc. Systeme de disque en temps reel
US5298992A (en) * 1992-10-08 1994-03-29 International Business Machines Corporation System and method for frame-differencing based video compression/decompression with forward and reverse playback capability
EP0613298A2 (fr) * 1992-12-31 1994-08-31 Gte Laboratories Incorporated Dispositif de reproduction de signaux vidéo à accès multiple

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6697525B1 (en) 1998-10-02 2004-02-24 Parthusceva Ltd. System method and apparatus for performing a transform on a digital image
US6868186B1 (en) 2000-07-13 2005-03-15 Ceva D.S.P. Ltd. Visual lossless image compression

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Publication number Publication date
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