WO1997034218A1 - Methode et appareil de gestion de l'energie par regulation de l'alimentation - Google Patents

Methode et appareil de gestion de l'energie par regulation de l'alimentation Download PDF

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Publication number
WO1997034218A1
WO1997034218A1 PCT/US1997/003962 US9703962W WO9734218A1 WO 1997034218 A1 WO1997034218 A1 WO 1997034218A1 US 9703962 W US9703962 W US 9703962W WO 9734218 A1 WO9734218 A1 WO 9734218A1
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WO
WIPO (PCT)
Prior art keywords
time
period
determining
processor
turning
Prior art date
Application number
PCT/US1997/003962
Other languages
English (en)
Inventor
David J. Allard
Neal A. Osborn
Original Assignee
Rockwell Semiconductor Systems, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rockwell Semiconductor Systems, Inc. filed Critical Rockwell Semiconductor Systems, Inc.
Priority to AU22100/97A priority Critical patent/AU2210097A/en
Priority to EP97915057A priority patent/EP0894301A1/fr
Priority to JP9532834A priority patent/JP2000506649A/ja
Publication of WO1997034218A1 publication Critical patent/WO1997034218A1/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
    • H04W52/02—Power saving arrangements
    • H04W52/0209—Power saving arrangements in terminal devices
    • H04W52/0261—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level
    • H04W52/0287—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level changing the clock frequency of a controller in the equipment
    • H04W52/0293—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level changing the clock frequency of a controller in the equipment having a sub-controller with a low clock frequency switching on and off a main controller with a high clock frequency
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Definitions

  • J Figure 5 is a flow chart illustrating steps performed by the timer manager software in servicing timed interrupts.
  • FIG 2 illustrates in more detail the real-time clock 18 in accordance with the present invention.
  • the real-time clock 18 includes an alarm register 30 which contains the data indicating the time that the next alarm is to occur. If the processor 12 is turned off, this alarm time determines when the processor 12 is turned back on.
  • the alarm register 30 receives this information from data stored in the CPU memory (not shown) through the read- write bus 20.
  • user interface means may be used to permit a user to set particular times of the day for the system 10 to be on or off. This information would then be communicated to the real-time clock 18 via read- write bus 20.
  • Step 60 this event is entered into the alarm register 30 (Step 60), which is compared to the real-time clock counter register. If not, the event that was at the top of the list remains the next event, and the routine is exited (Step 62).
  • Figure 5 illustrates a flow chart of the process performed by the timer manager software 31 when servicing timer interrupts. This process is referred to as the Interrupt Service Routine (ISR).
  • ISR Interrupt Service Routine
  • An alarm clock interrupt occurs when, the comparison register 36 determines that the value in the real time counter register 34 is equal to the value in the alarm register 30. When this happens, an interrupt signal is sent from the real-time clock 18 along line 38 to the interrupt controller 16 (Step 64).
  • the CPU 12 is turned on, if it was off (Step 66), by reenabling the high speed clock 14.
  • the re-enabled CP jumps to the timer interrupt vector. If the real-time value in counter register 34 is greater than or equal to the top of the list, then the interrupt controller 16 will wake up the task that set that alarm (Step 68) and delete that event from the top of the link list (Step 70). The process then loops back through path 72 and proceeds again to Step 68. If instead, the real-time value is less than the value at the top of the list, then the current item in the top of the link list is placed into the alarm register 30 in the real-time clock 18, and the Interrupt Service Routine is exited (STEP 74).
  • the alarm register 30 in the real-time clock 18 may only support a subset of the bits in the real time counter register 34.
  • This subset of bits would represent a limited time period (e.g. 10 minutes), which is less than the total amount of time which is desired to be measured.
  • the situation is handled by putting in the subset of bits for the alarm time, which is less than its total time needed and then repeatedly entering these bits for the same time period until the longer desired time period has been reached.
  • the alarm clock will go off several times, and the processor will wake up briefly to reset the alarm clock, turning off immediately thereafter. The task which originally set the alarm will not be started until the ultimate real-time is reached.
  • such external interrupts in a communications system may comprise radio events.
  • communications systems such as Cellular Digital Packet Data (CDPD), and personal Air Communications Technology (pACT) there may be hundreds of protocol timers running at any given time. These timers identify time periods during which particular events happen or do not happen.
  • timers were implemented via software timing loops by incrementing counters based on a timer ticks. This process required the operation of the CPU, and the expenditure of significantly higher levels of power than the real-time clock 18 of the present invention.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Sources (AREA)

Abstract

Méthode et appareil permettant de conserver l'énergie dans des dispositifs de calcul ou de communication grâce à une horloge d'avertissement en temps réel (18) qui permet au processeur (12) du dispositif de s'éteindre pendant des laps de temps fixes et déterminés. Ces laps de temps peuvent être mesurés en termes de temps relatif ou de temps absolu, au moyen de l'horloge en temps réel (18) proposée dans cette invention. Ainsi le processeur (12) est dispensé de la tâche de synchronisation des événements, qu'ils soient internes, externes ou saisis par l'utilisateur. Par conséquent, on réduit sensiblement la consommation d'énergie du fait que l'horloge en temps réel (18) consomme beaucoup moins d'énergie que le processeur (12) et ses circuits associés. On prolonge ainsi la durée de vie de la pile du dispositif et l'on réduit sa consommation globale d'énergie.
PCT/US1997/003962 1996-03-14 1997-03-13 Methode et appareil de gestion de l'energie par regulation de l'alimentation WO1997034218A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
AU22100/97A AU2210097A (en) 1996-03-14 1997-03-13 Method and apparatus for power management using power control
EP97915057A EP0894301A1 (fr) 1996-03-14 1997-03-13 Methode et appareil de gestion de l'energie par regulation de l'alimentation
JP9532834A JP2000506649A (ja) 1996-03-14 1997-03-13 電源制御装置を用いる、電力を管理するための方法および装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US61605996A 1996-03-14 1996-03-14
US08/616,059 1996-03-14

Publications (1)

Publication Number Publication Date
WO1997034218A1 true WO1997034218A1 (fr) 1997-09-18

Family

ID=24467873

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1997/003962 WO1997034218A1 (fr) 1996-03-14 1997-03-13 Methode et appareil de gestion de l'energie par regulation de l'alimentation

Country Status (4)

Country Link
EP (1) EP0894301A1 (fr)
JP (1) JP2000506649A (fr)
AU (1) AU2210097A (fr)
WO (1) WO1997034218A1 (fr)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2789501A1 (fr) * 1999-02-09 2000-08-11 St Microelectronics Sa Procede et dispositif de reduction de la consommation d'un microcontroleur
FR2817686A1 (fr) * 2000-12-01 2002-06-07 Thomson Csf Dispositif de gestion d'energie pour appareils electroniques relies en reseau
EP1333361A2 (fr) * 2002-01-30 2003-08-06 Hewlett-Packard Company Dispositif informatique ayant des transitions d'état programmables
EP1509822A1 (fr) * 2002-05-13 2005-03-02 Motorola, Inc., A Corporation of the State of Delaware; Activation d'horloge de synchronisation dans un dispositif electronique
EP1763210A1 (fr) * 2005-09-12 2007-03-14 Research In Motion Limited Dispositif de communications mobiles avec mise en marche automatique avancée
US7263035B2 (en) 2005-09-12 2007-08-28 Research In Motion Limited Early auto-on mobile communications device
US7696905B2 (en) 1996-05-22 2010-04-13 Qualcomm Incorporated Method and apparatus for controlling the operational mode of electronic devices in response to sensed conditions
EP2228724A1 (fr) 2009-03-13 2010-09-15 Giga-Byte Technology Co., Ltd. Carte mère avec circuit réseau de sauvegarde
EP2234002A1 (fr) * 2009-03-25 2010-09-29 Giga-Byte Technology Co., Ltd. Système ayant un échéancier pour allumer/éteindre automatiquement et procédé de contrôle du programme pour allumer/éteindre un système automatiquement
US9070273B2 (en) 2013-01-24 2015-06-30 Blackberry Limited Communications device having battery monitoring capabilities and performing pre-scheduled events

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7343504B2 (en) * 2004-06-30 2008-03-11 Silicon Labs Cp, Inc. Micro controller unit (MCU) with RTC

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4203153A (en) * 1978-04-12 1980-05-13 Diebold, Incorporated Circuit for reducing power consumption in battery operated microprocessor based systems
JPS5968029A (ja) * 1982-10-12 1984-04-17 Nec Corp 時刻起動電源投入方式
US4718007A (en) * 1984-06-19 1988-01-05 Hitachi, Ltd. Power control method and apparatus for data processing systems
US5083266A (en) * 1986-12-26 1992-01-21 Kabushiki Kaisha Toshiba Microcomputer which enters sleep mode for a predetermined period of time on response to an activity of an input/output device
EP0529269A2 (fr) * 1991-08-23 1993-03-03 International Business Machines Corporation Fonctionnement efficade de batterie pour protocole d'accès planifié
WO1995012158A1 (fr) * 1993-10-27 1995-05-04 Elonex Technologies, Inc. Systeme pilote par horloge pour l'arret et la mise en route d'ordinateurs
EP0666525A2 (fr) * 1994-02-04 1995-08-09 Intel Corporation Méthode et appareil pour le contrôle de la consommation de courant dans un ordinateur

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4203153A (en) * 1978-04-12 1980-05-13 Diebold, Incorporated Circuit for reducing power consumption in battery operated microprocessor based systems
JPS5968029A (ja) * 1982-10-12 1984-04-17 Nec Corp 時刻起動電源投入方式
US4718007A (en) * 1984-06-19 1988-01-05 Hitachi, Ltd. Power control method and apparatus for data processing systems
US5083266A (en) * 1986-12-26 1992-01-21 Kabushiki Kaisha Toshiba Microcomputer which enters sleep mode for a predetermined period of time on response to an activity of an input/output device
EP0529269A2 (fr) * 1991-08-23 1993-03-03 International Business Machines Corporation Fonctionnement efficade de batterie pour protocole d'accès planifié
WO1995012158A1 (fr) * 1993-10-27 1995-05-04 Elonex Technologies, Inc. Systeme pilote par horloge pour l'arret et la mise en route d'ordinateurs
EP0666525A2 (fr) * 1994-02-04 1995-08-09 Intel Corporation Méthode et appareil pour le contrôle de la consommation de courant dans un ordinateur

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 008, no. 171 (P - 293) 8 August 1984 (1984-08-08) *

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7696905B2 (en) 1996-05-22 2010-04-13 Qualcomm Incorporated Method and apparatus for controlling the operational mode of electronic devices in response to sensed conditions
US9009505B2 (en) 1996-05-22 2015-04-14 Qualcomm Incorporated Method and apparatus for controlling the operational mode of electronic devices in response to sensed conditions
US6381705B1 (en) 1999-02-09 2002-04-30 Stmicroelectronics S.A. Method and device for reducing current consumption of a microcontroller
FR2789501A1 (fr) * 1999-02-09 2000-08-11 St Microelectronics Sa Procede et dispositif de reduction de la consommation d'un microcontroleur
FR2817686A1 (fr) * 2000-12-01 2002-06-07 Thomson Csf Dispositif de gestion d'energie pour appareils electroniques relies en reseau
EP1333361A2 (fr) * 2002-01-30 2003-08-06 Hewlett-Packard Company Dispositif informatique ayant des transitions d'état programmables
EP1333361A3 (fr) * 2002-01-30 2004-04-14 Hewlett-Packard Company Dispositif informatique ayant des transitions d'état programmables
EP1509822A4 (fr) * 2002-05-13 2010-07-28 Motorola Inc Activation d'horloge de synchronisation dans un dispositif electronique
EP1509822A1 (fr) * 2002-05-13 2005-03-02 Motorola, Inc., A Corporation of the State of Delaware; Activation d'horloge de synchronisation dans un dispositif electronique
US7263035B2 (en) 2005-09-12 2007-08-28 Research In Motion Limited Early auto-on mobile communications device
EP1763210A1 (fr) * 2005-09-12 2007-03-14 Research In Motion Limited Dispositif de communications mobiles avec mise en marche automatique avancée
EP2228724A1 (fr) 2009-03-13 2010-09-15 Giga-Byte Technology Co., Ltd. Carte mère avec circuit réseau de sauvegarde
EP2234002A1 (fr) * 2009-03-25 2010-09-29 Giga-Byte Technology Co., Ltd. Système ayant un échéancier pour allumer/éteindre automatiquement et procédé de contrôle du programme pour allumer/éteindre un système automatiquement
US9070273B2 (en) 2013-01-24 2015-06-30 Blackberry Limited Communications device having battery monitoring capabilities and performing pre-scheduled events

Also Published As

Publication number Publication date
EP0894301A1 (fr) 1999-02-03
AU2210097A (en) 1997-10-01
JP2000506649A (ja) 2000-05-30

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