WO1997018581A1 - Emetteur de lumiere a microcavite et seuil faible - Google Patents

Emetteur de lumiere a microcavite et seuil faible Download PDF

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Publication number
WO1997018581A1
WO1997018581A1 PCT/US1996/018194 US9618194W WO9718581A1 WO 1997018581 A1 WO1997018581 A1 WO 1997018581A1 US 9618194 W US9618194 W US 9618194W WO 9718581 A1 WO9718581 A1 WO 9718581A1
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Prior art keywords
cavity surface
cavity
spacer
vertical cavity
surface emitter
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PCT/US1996/018194
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English (en)
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Dennis G. Deppe
Diana L. Huffaker
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Board Of Regents, The University Of Texas System
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Priority to AU77302/96A priority Critical patent/AU7730296A/en
Priority to US09/068,591 priority patent/US6370179B1/en
Publication of WO1997018581A1 publication Critical patent/WO1997018581A1/fr
Priority to US10/119,378 priority patent/US20030189963A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H01L33/105Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector with a resonant cavity structure
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
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    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02241III-V semiconductor
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • HELECTRICITY
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    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18308Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
    • H01S5/18311Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement using selective oxidation
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    • H01S2301/00Functional characteristics
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    • H01S2301/166Single transverse or lateral mode
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    • H01S2301/00Functional characteristics
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    • H01S2301/176Specific passivation layers on surfaces other than the emission facet
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    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/1078Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region with means to control the spontaneous emission, e.g. reducing or reinjection
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    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18308Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
    • H01S5/18316Airgap confined
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    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18308Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
    • H01S5/18322Position of the structure
    • H01S5/1833Position of the structure with more than one structure
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    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18358Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] containing spacer layers to adjust the phase of the light wave in the cavity
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    • H01S5/00Semiconductor lasers
    • H01S5/10Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
    • H01S5/18Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
    • H01S5/183Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
    • H01S5/18361Structure of the reflectors, e.g. hybrid mirrors
    • H01S5/18369Structure of the reflectors, e.g. hybrid mirrors based on dielectric materials

Definitions

  • the present invention relates generally to the field of semiconductor light emitters and more particularly to the field of vertical cavity surface emitters, including lasers.
  • a goal of the semiconductor industry is to fabricate light emitting devices for use in either optical fiber or free space optical interconnects.
  • a benefit in the optical interconnect complexity is derived with the use of light emitting devices such as semiconductor lasers or spontaneous light emitting diodes which operate with both high power conversion efficiency and minimal input power, thus allowing a large number of individual semiconductor light emitters to act as signal transmitters for a given total input power.
  • a challenge is to realize a small volume region which highly confines both injected electrical charge carriers as well as the internal optical mode. This small volume then minimizes the input electrical power required to achieve lasing threshold, and leads to cavity controlled spontaneous emission in a light emitting diode and improved power conversion efficiency.
  • the vertical cavity surface emitting laser Jewell et al.
  • both the optical mode and the injected charge carriers are highly confined in only the normal direction of the cavity.
  • Both types of devices are based generally on short. planar semiconductor Fabry-Perot cavities fabricated through epitaxial crystal growth in the normal direction to the crystal surface.
  • the length dimension in the normal direction to the cavity which establishes the length of the optical mode can be controlled only to a length of one or several emission wavelengths (on the order of microns), while the charge carriers in the cavity normal direction are confined to dimensions of hundreds of angstroms through the use of heteroj unction quantum wells.
  • planar Fabry-Perot cavity is limited by its weak lateral confinement in controlling spontaneous emission. If an attempt is made to reduce the lateral size of the planar cavity device to less than a dimension characteristic of the vertical loss rate of the cavity, the resulting optical mode internal to the laser cavity will suffer high diffraction loss, and therefore loss of lateral optical confinement. resulting in both an increased input power requirement and a reduced power conversion efficiency.
  • the characteristic limiting lateral dimension is an 8 to l O ⁇ m optical mode diameter.
  • the first being achieving a small area low loss optical mode within the cavity, and the second being the chemical instability of any exposed AlAs (or high Al composition Al x Gaj. x As. x>0.6) which might remain at the device surface due to the device fabrication. If left unprotected, the exposed AlAs (or AlGaAs) will decompose over times of hours, days, weeks, or years, into various porous oxides thus leading to device failure (Dallesasse et ai. 1990).
  • One such possible treatment of an exposed AlAs or AlGaAs is the steam oxidation as described in US Patent 5,262,360 of Holonyak and Dallesasse. and also in the laser device of US Patent 5,359.618 of Lebbv et ai with reduced electrical conductance.
  • the oxide described is formed by exposing an AlAs surface to a water vapor containing ambient (steam) at the elevated temperature range of 400 to 500°C.
  • This oxide formed by steam oxidation of AlGaAs is useful in forming low refractive index layers buried within an epitaxial AlGaAs/GaAs heterostructure as the oxidation proceeds at a very high rate, and to achieve lateral optical confinement within a semiconductor cavity.
  • the oxide formed by steam oxidation also has undesirable characteristics due to its thickness (typically greater than several microns) and strain created within the semiconductor device.
  • the oxide formed by steam oxidation can crack the semiconductor and lead to device failure.
  • the strain due to the thick oxide formed by steam oxidation can lead to device failure over long term operation.
  • Controllable thin oxides formed by the steam oxidation are difficult to achieve due to the high oxidation rate and the necessity to oxidize at temperatures greater than about 400°C (US Patent 5.262.360). Therefore. for very small AlAs/GaAs devices in which the AlAs semiconductor might form an exposed surface it is desirable to have an alternative method by which the AlAs crystal surface may be effectively sealed against further decomposition due to oxygen exposure.
  • the index confinement is optimally placed within a lateral dimension characteristic o the vertical cavity design for laser operation, and more optimally within a lateral dimension characteristic of the coherence of the spontaneous emission from the electrical semiconductor charge carriers of electrons and holes.
  • these lateral dimensions are less than l O ⁇ m and easily reach 2 ⁇ m in diameter.
  • the present inventors have substantially reduced the required threshold drive level of a vertical cavity surface emitting laser over that of prior art in which threshold drive currents were typically greater than 0.5mA. and more often greater than 2mA. to less than 0.1 mA with room temperature operation.
  • the low refraction index layer allows the lateral size reduction of the optical mode below that characteristic of the otherwise planar vertical cavity design, while maintaining low diffraction loss.
  • the low refraction layer is also designed as electrically insulating so that electrical current is confined to the small light emitting area. Ultra low power operation of a semiconductor laser with high power conversion efficiency then becomes possible because of the very small and low loss optical volume.
  • a discovery of the present invention is that the lateral index confinement within the cavity spacer can lead to controlled spontaneous emission into a single optical mode of the cavity, with the result of spontaneous angular narrowing in the radiated far-field. It is understood that the present disclosure is applicable to any group III-V crystal as that is understood in the an and that AlAs/GaAs/InGaAs/AlGaAs are used by way of example only.
  • small area half-wave cavity VCSELs with single QW active regions defined using the native-oxide process (Huffaker. Deppe. et ai . 1994: Deppe et ai. 1994).
  • the native-oxide can be formed very close to the active region, and the present disclosure demonstrates a 2 ⁇ m laser in which the oxide is only 200A from the QW.
  • a CW room-temperature lasing threshold current of 91 ⁇ A is achieved.
  • the present invention may be described in certain embodiments as a vertical cavity surface emitter comprising a cavity spacer, wherein a low refraction index confining layer is built directly into, or is contained in the cavity spacer, so that a single or multiple QW active region can be placed in very close proximity to the low index layer (within one-fourth of an potical wavelength).
  • the low refraction index confining layer is preferablv in the upper part of the cavity spacer, but may also be in the lower part, or both.
  • the cavity spacer may be a full wavelength spacer or may be more preferably a 1/2 wav elength spacer.
  • a wavelength of 1 2 wavelength spacer is understood to mean the vertical dimension of the spacer is equal to the size of one wavelength or 1/2 wavelength, respectively of the emitted light.
  • the cavity spacer is adjusted in thickness so as to achieve a spectral resonance between a semiconductor light emitting region and adjacent cavity reflectors, as is typical with a full wavelength cavity spacer or more preferably a 1/2 wavelength spacer. Within such an otherwise planar cavity, an optical mode will occur representing the lowest loss mode of the cavity.
  • This lateral size of this lowest loss optical mode will be set by lateral diffraction of the field within the cavity, and is due to both the cavity spacer thickness and any field penetration into the mirrors, and the number of round trips within the cavity Ujihara has derived the approximate expression for this lateral mode area given by A ⁇ L/( l -R) where ⁇ is the resonant wavelength within the cav itv spacer material.
  • L is the effective length of the total cavitv including field penetration into distributed mirrors
  • R is the mirror reflectiv product, square root R ] R-> of the two cavity mirrors
  • a significant difficulty in fabricating small area ertical-cav ity surface-emitters is the rapid increase in diffraction loss if an activ e area is reduced to less than the size of A
  • this diffraction loss can be controlled through the introduction of the low refraction index lav er directlv into the cav ity spacer and within the mode area A of the otherwise planar cav itv with the result of controlling both the lateral diffraction loss and the lateral mode size
  • Tv pical dimensions of present day lateral mode sizes in semiconductor v ertical cav itv surface emitting lasers (VCSELs) based on AlAs/Ga s semiconductors is -6- 10 ⁇ m diameter ⁇ certain embodiment described herein has reduced this mode size to ⁇ 2 ⁇ m diameter Scaling the threshold current w ith dev ice area
  • the Al x O v is prepared by selective conversion of AlAs or AlGaAs using a steam oxidation at elevated temperatures of 400 to 500°C.
  • the low refractive index layer may be prepared by other means such as chemical vapor deposition, electron beam deposition, sputtering, or other oxidation technique.
  • the low refraction index confining layer may also be an etched void.
  • Etched v oids present an added difficulty due to the chemical instability of any exposed AlAs layers. Such layers will degrade in the atmospheric environment with the result of early device failure. If an etched void is used, or if any exposed AlAs occurs on a device surface, the present discovery enables one to seal the surface against further decomposition, by subjecting the AlAs surface to a rapid temperature anneal (RTA ) in an inert gas containing a small percentage (less than or
  • the inert gas may be nitrogen or argon or an inert gas with -10% Ho v/v at a higher temperature than one would normally use for the wet oxidation described above.
  • the RTA may be performed at a temperature of from about 400 to about 1000°C. or at a temperature of from about 500 to about 600°C. or even at a temperature of from about 525 to about 550°C.
  • the present disclosure demonstrates that the anneal may be performed for a time as brief as from 5 seconds to 10 minutes. or for a period of from about 5 seconds to 1 minute or for a period of from about 15 seconds to about 45 seconds or even for a period of about 30 seconds.
  • the basis of the sealing of the AlAs surface is the self-terminating conversion of porous oxides formed at room temperature to a thin, dense protective oxide which is impermeable to further oxidative decomposition.
  • the oxide formed by the RTA is a distinct material from that formed by the wet oxidation as described in US Patent 5.262.360 of Holonyak and Dallesasse.
  • the higher temperature RTA formed surface oxide blocks further wet oxidation, making it useful as a mask of the wet oxidation.
  • the practice of this embodiment of the present invention is of benefit in device processing by blocking subsequent steam oxidation and certain wet etches of AlAs.
  • the AlAs or AlGaAs that is annealed by the present method is slightly oxidized by exposure to normal atmosphere, the rapid temperature anneal forms a dense structure that inhibits further oxidation.
  • the devices of the present invention will employ native oxides or etched voids, and will require subsequent steam oxidation or selective etching.
  • the RTA oxide of the present invention will find utility as a mask for either subsequent steam oxidations or selective etches of such devices due to the greatly reduced HCl etch rate of RTA sealed AlAs surfaces compared to non-sealed surfaces. Since, in the device processing steps many AlAs layers might be exposed in which selective conversion to Al O,, due to steam oxidation is undesirable, the RTA sealing oxide can be formed first on these layers preventing their further conversion. In this manner a native oxide can be formed only in the VCSEL cavity or other desired AlAs layers, while the sealed AlAs surfaces remain intact.
  • the invention may be described as a vertical cavity surface emitter comprising a distributed Bragg reflector composed of layers of n-type
  • the low refractive index layer may preferably be an
  • Al x O v layer and may be formed by selective conversion of AlAs or AlGaAs. or alternatively, the low refractive index layer may be an etched void and the void may be sealed by a rapid thermal anneal.
  • FIG. 1 Schematic cross-section of the half-wave VCSEL structure (not to scale) showing the native-oxide layer placed 200A from the single quantum well.
  • FIG. 9 Light versus current curves for the 3 ⁇ m index-guided planar half wave microcavity device at both 300 (right) and 250 ( left ) ( CW).
  • the inset shows a schematic o the half-wave cavity spacer.
  • FIG. 10 Plots showing the measured threshold currents versus device size for 10. 7. 4. and 3 ⁇ m squares at 300 (reversed triangles ) and 250K (filled circles), ⁇ /2 cavity. CW.
  • the 3 ⁇ m sized VCSEL is anomalous in its low threshold compared to the larger devices.
  • the inset shows the angular radiation pattern (degrees) for the same low Q cavity.
  • FIG. 12 Angular spontaneous and lasing characteristics of the high Q cavity
  • FIG 13A. FIG 13B. FIG 13C and FIG 13D Optical microscope photographs looking down on two pieces of the same wafer exposed to a wet oxidation of 430°C for 15 mm The wafer piece of FIG 13A (arrows indicate sealed edges) and FIG 13C has first been exposed to a 600°C. 30 sec rapid thermal anneal in forming gas while the piece of FIG 13B (arrows indicate Al O ) and FIG 13D has not The rapid thermal anneal blocks the AlGaAs decomposition due to the wet oxidation
  • FIG 14A and FIG 14B Optical microscope photographs showing the effectiveness of the rapid thermal anneal of exposed AlGaAs in blocking a wet chemical I minute etch in 1 1 HCl H 2 0 FIG 14A annealing at 500°C 30 s FIG 14B no annealing
  • FIG 15A and FIG 15B Scanning electron microscope photograph demonstrating the use of the rapid thermal anneal of the exposed AlGaAs mesa edge to mask a wet oxidation
  • FIG 15B mesa center single arrow QW s double arrow Al ⁇ O,
  • FIG 16B Schematic illustration of the microcav itv cross-section
  • FIG. 19 Spectral tuning with temperature of the low Q. quasi-mode. 0 pairs
  • FIG. 22 Schematic cross section illustrating the index confined vertical cavitv emitter in which the index confining layer is an etched void.
  • FIG. 23 Schematic cross section illustrating the index confined vertical cavitv emitter in which the index confining layer is a native oxide and the upper AlAs layers of the Bragg reflector are sealed through a RTA oxide.
  • FIG. 24 Schematic cross section illustrating the index confined vertical cavity emitter in which the QW emitting region is placed in a high index GaAs cavity spacer including an adjacent low index AlAs layer to be oxidized. Carrier confinement to the QW emitting region is due to tunnel barrier confinement. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • FIG. 1 shows a schematic cross-section representing the epitaxial layers of the
  • the epitaxial structure is grown on a GaAs substrate by molecular beam epitaxy and consists of a 0.5 ⁇ m n-type GaAs buffer layer 10 followed by a 26 pair n-type GaAs/AlAs quarter-wave distributed Bragg reflector 12. a symmetrical undoped active region consisting of a single 8 ⁇ A In 0 ⁇ Gag 8 As QW 14 sandwiched between adjacent layers of l OOA GaAs barriers next to l OOA
  • the VCSELs After the native-oxide is formed the VCSELs have defined active regions of 2 ⁇ m x 2 ⁇ m squares due to the hole injection path. Not shown in FIG. 1 is the completion of the upper Bragg reflector which comprises five pairs of high contrast ZnSe CaF-, quarter-wave layers deposited on to the p-GaAs surface after metallization ( Lei et ai . 1991 ). Many of the VCSELs tested exhibit CW threshold currents in the l OO ⁇ A range. The lowest threshold device measured had a
  • the calculated threshold current density is -2.3kA/cm ⁇ .
  • Larger active area devices have also been fabricated from the same epitaxial wafer using the native-oxide process as described for the 2 ⁇ m square active region.
  • the minimum CW thresholds for the larger device dimensions are
  • the threshold current density for the 8 ⁇ m square device is quite low. with a calculated minimum value of -340A/cm " .
  • the measured high threshold current density for the 2 ⁇ m square VCSEL is therefore most likely due to a combination of current spreading and mirror loss for the small size lasing mode.
  • the Al x O v 20 is formed by the selective conversion of AlAs as described by
  • Half-wave cavity VCSELs with the layered structures as illustrated in FIG. 1 are fabricated with lateral dimensions of 8 ⁇ m. 5 ⁇ m. and 2 ⁇ m squares.
  • the half-wave cavity VCSEL uses 26 pairs of n-AlAs/GaAs distributed Bragg reflectors (DBRs) for the bottom mirror, a half-wave cavity spacer composed of an n-AlAs layer 22 beneath the QW and p-AlAs layer on top and a p-GaAs cap layer as shown in FIG. 1.
  • the top mirrors, not shown in the figure, are deposited as the last fabrication step and consist of five pairs of high contrast ZnSe/CaF DBRs.
  • the lateral dimensions of the lasers are then defined electrically by the current injection path due to the Al x O insulator, and optically due to the refractive index step between the Al x O and unconverted p-type AlAs.
  • Many of the 2 ⁇ m square devices have CW thresholds in the l OO ⁇ A range, with a minimum measured room temperature threshold of 91 ⁇ A.
  • the effect of the lateral index step of the Al x O on the spontaneous emission spectra of the 2 ⁇ m and 8 ⁇ m square active region devices before the deposition of the five pairs of CaF/ZnSe was also measured.
  • the measured spectrum for the 5 ⁇ m square active region is nearly identical to that of the 8 ⁇ m device.
  • a consistent measurement on the 2 ⁇ m square active regions versus the 5 and 8 ⁇ m square active regions is the narrowing of the spontaneous emission spectrum due to the lateral index step.
  • the spontaneous mode of an emitter (DeMartini et ai. 1990; Ujihara. 1991 ; Bjork et ai . 1993; Huffaker. Lin et ai. 1994) is expected to fill the 2 ⁇ m square region.
  • the minimum CW room-temperature thresholds for the larger devices are 316 ⁇ A for a 5 ⁇ m square active region and 220 ⁇ A for an 8 ⁇ m square active region.
  • the s minimum room-temperature current density of 340A/cm ⁇ for the 8 ⁇ m device for 300K is quite low.
  • the inventors' work on full-wave microcavity lasers with a single QW active region has shown stable lowest-order transverse mode operation for pump levels up to ten times threshold in a 5 ⁇ m device (Huffaker. Shin and Deppe, 1994).
  • stable lowest-order transverse mode behavior is observed in the 2 ⁇ m device, whereas the 8 ⁇ m device develops a higher order mode at 4 times threshold, and the 5 ⁇ m device operates in a higher-order transverse mode even at threshold.
  • the far-field and near-field radiation patterns for the 5 ⁇ m square half-wave cavity laser at 1 .5 and 4.0 times threshold.
  • a double-lobed higher order transverse mode was observed throughout the range of operation for the 5 ⁇ m device and little change is observed in the far-field or near field radiation patterns.
  • the Al x O y layer should have less effect on the transverse mode characteristics.
  • Far-field and near-field radiation patterns for an 8 ⁇ m device at 1 .5 and 4.0 times threshold, with a lasing threshold of 200 ⁇ A in pulsed operation (300K) were also determined. The device operates in its lowest order mode to 4.0 times threshold at which point four lobes are visible in the near-field.
  • the threshold current trend for the 8, 5. and 2 ⁇ m square VCSELs provide consistent evidence that the closely spaced Al x O v layer plays a significant role in lateral index guiding.
  • the minimum threshold currents on the devices are not too different than the typical values measured for several devices of each size. These show that the thresholds increase from 220 ⁇ A to 316 ⁇ A for a decrease in active region size from 8 ⁇ m to 5 ⁇ m. with the higher order mode selected for the 5 ⁇ m device, but with a significant drop in threshold current from 220 ⁇ A to 97 ⁇ A from the 8 ⁇ m to the 2 ⁇ m device, with again lowest order mode lasing achieved.
  • the threshold is given by the population inversion ( ⁇ : - .V
  • both b and Q are dependent on the coupling between the cavity length and the transverse dimension of the lowest loss passive cavity mode (DeMartini et ai. 1990) When the mode area is larger than the value of.-l m ⁇ n » ( ⁇ * L)/( ⁇ - R).
  • lateral index-confinement placed at the center of a planar microcavity appears to increase the spontaneous coupling to the lasing mode if the index step is placed within the spontaneous mode area.
  • a continuous-wave threshold of 59mA is measured at 250K for a 3mm square active region.
  • the microcavity lasers of the present example are based on half-wave cavity spacers and make use of a single InGaAs quantum well activ e region 30. a lower n- type AlAs/GaAs Bragg reflector of twenty-six pairs 32. and an upper Bragg reflector of a combination one pair AlAs/GaAs and five pairs CaF ZnSe 34.
  • a schematic cross-section of the device is shown in the inset of FIG. 9.
  • the device includes a cavity spacer composed of an n-GaAs layer 38 beneath the QW and a p-GaAs cap layer 40. Using the process of selective oxidation of exposed AlAs (Dallesasse et ai .
  • a low index Al x O lateral confinement layer 36 is constructed around the active region within the half- wave cavity spacer. The process yields a lateral index step from AlAs to Al x O v of -2.95 to - 1 .7.
  • the selective oxidation is used to fabricate lateral active regions ranging in size from l O ⁇ m to 3 ⁇ m squares as measured by an optical microscope.
  • the 3 ⁇ m device size is of interest, as a sharp transition is found when the lateral dimension is reduced from 4 ⁇ m to 3 ⁇ m.
  • the threshold current versus lateral dimension was plotted for several devices each of the 10. 7. 4. and 3 ⁇ m sizes measured continuous-wave at 300K. Further measurements were performed over a range of temperatures for the lowest threshold lasers and show that the minimum threshold of each device size occurs at -250K. For the larger devices (>4 ⁇ m). the threshold current density increases as the active area is decreased, which is expected from increased current spreading and increased diffraction loss. However, in comparing the different active regions, the 3 ⁇ m size is anomalous, with a lower threshold than expected from the larger devices.
  • the angular radiation patterns versus pump level have been measured for all four device sizes. Both above and below threshold the 10. 7. and 4 ⁇ m lasers have nearly identical radiation characteristics, which might be somewhat su ⁇ rising for above threshold operation. However, the similarity of the angular radiation characteristics for the different larger device sizes can be taken as evidence that, with respect to the lasing mode, these larger devices all simply appear planar, with the lateral mode profile dominated by the planar cavity design (Huffaker. Lin et ai . 1994; Osuge and Ujihara. 1994: Huffaker. Shin et ai, 1994). Since the 10. 7. and 4 ⁇ m devices have similar characteristics, the present example focuses on comparing the 4 and 3 ⁇ m sizes.
  • the devices are first characterized without these upper mirrors.
  • the spontaneous emission spectra were measured for the 3 and 4 ⁇ m devices before completion of the mirrors.
  • a spectrum narrowed by a factor of -1.8 is consistently measured for all the 3 ⁇ m devices as compared to the 4 ⁇ m and larger devices.
  • the differential slope efficiencies are also measured for the 3 and 4 ⁇ m devices before the deposition of the CaF/ZnSe DBRs. for which case the normally directed spontaneous emission is totally radiated from the top of the device.
  • These spontaneous slope efficiencies are measured to be identically 6% for both the 3 ⁇ m and 4 ⁇ m devices.
  • the angular radiation patterns measured before the completion of the mirrors were found to be identical for all device sizes.
  • the angular radiation patterns are again measured below and above threshold
  • the increased mirror reflectivity along with the tight lateral index confinement decreases the angular radiation pattern in spontaneous emission from the 3 ⁇ m sized device as compared to the 4 ⁇ m
  • This, and the spectral narrowing are unexpected results, which are attributed to the lateral index confinement
  • the same measurements were repeated for a second 3 ⁇ m device. with the similar angular narrowing of the spontaneous emission measured For laser operation, the expected result of the tighter lateral confinement was measured, with the 3 ⁇ m cavity showing an increased angular width compared with the 4 ⁇ m and larger devices
  • planar microcavity has been analyzed previously to characterize the radiation field from a confined point source emitter (Ujihara. 1991 . Osuge and Ujihara. 1994. Deppe and Lei. 1992. Line et al . 1994. Deng et al . 1995) Using the deriv ation given in Deng et al ( 1995). a mode size. A m ⁇ of -9 ⁇ m diameter is calculated for a single frequency point source confined in this dielectric cav ity design The much smaller measured mode sizes for the 10. 7.
  • each true spontaneous point source in fact radiates a mode into the cavity normal having an angular distribution set by the Bragg reflector contrast ratio and frequency spread (Deppe and Lei. 1992). as opposed to the mirror reflectivity (or A mm )
  • the angular spontaneous emission is narrowed somewhat from the low O cavity v alue of a full-width at half-maximum of ⁇ 54°. to the high O cav ity value of -38°. 4 ⁇ m device In Lin et al .
  • the most important difference between the 4 and 3 ⁇ m cavities is the change in the fractional angular coupling to the lasing mode, that is. the angular coupling of the spontaneous mode to the lasing mode.
  • the total fractional coupling of the spontaneous emission to the lasing mode for an emitter located at the center of the lasing mode is estimated to be
  • the 3 ⁇ m sized laser has a spot size of
  • the binary compound AlAs might readily serv e as a transparent substrate for light emitting diodes or lasers since it would remov e the difficultv ol controlling the stoichiometry of AlGaAs
  • degradation in the room env ironment i so rapid that w ithout some protective lay er a thick ( tens or hundreds of microns ) exposed AlAs lay er can decompose w ithin minutes ⁇ 1 ⁇ s lav ers ot more moderate thickness ( ⁇ 0 l ⁇ m ) are also desirable in the distributed Bragg reflector ( DBR ) layers of AlAs/AlGaAs/InGa s ertical-cav ity surface-emitting lasers (VCSELs ) since they simplify the epitaxial growth and maximize the semiconductor DBR contrast ratio
  • DBR distributed Bragg reflector
  • the high Al composition AlGaAs can be attractiv e for edge-emitting semiconductor lasers to maximize optical confinement and therefore reduce w av eguide loss and lasing threshold But again, facet degradation can limit the laser lifetime especially in high power diode lasers, and appears related to the AlGaAs composition ( Garbuzov et al .
  • the sealant is formed by a rapid thermal anneal (RTA) to a temperature of ⁇ 500°C to 600°C in forming gas containing a small fraction of 0 : , after exposure of the AlAs surface to the typical room-temperature ambient.
  • RTA rapid thermal anneal
  • the surface barrier layer thus formed is thin and impermeable to further wet oxidation. even at elevated temperatures, and can be thermally cycled.
  • the RTA surface oxide has features that in some applications are more attractive while in others are complementary to the thick native oxide formed through wet oxidation.
  • the RTA oxide is used to mask a wet oxidation and form a multi-mode index-confined AlAs'GaAs VCSEL.
  • FIG. 13 A. FIG. 13B. FIG. 13C and FIG. 13D show four photographs looking down on two different pieces of an AlAs/AlGaAs/GaAs heterostructure. and illustrates the effectiveness of the RTA surface oxide as a barrier against wet oxidation.
  • the epilaver structure consists of four periods of GaAs ( 80 ⁇ A)/ Al 0 90 Ga 0 ⁇ 0 As (150A)/ AlAs ( 1200A)/ Alo ⁇ Gao 10 As ( 150A) layers followed by GaAs (800A), AlAs (-400A). an Al 0 g ⁇ Gao 10 As etch stop layer ( l OOA). and a GaAs (80 ⁇ A) cap layer.
  • Square mesas of 150 ⁇ m per side on 500 ⁇ m centers are defined by selectively removing the 800A GaAs top layer by wet etching to expose the Al 0 9 oGa Q oAs etch stop layer. After the selective etch, the sample of FIG. 13A and
  • FIG. 13C is annealed at 600°C for 30s in forming gas containing - 10% dry oxygen.
  • An undoped GaAs substrate is placed face down on top of the sample to prevent As deso ⁇ tion.
  • This sample is then placed in a wet oxidation furnace along with the second processed heterostructure from the same wafer, shown in FIG. 13B and FIG. 13D. which has not undergone the RTA. Both wafers are exposed to the steam ambient for 15 min at 430°C.
  • FIG. 13C shows that the RTA surface oxide has sealed both the surface of the A 0 9Q Gd' r, I ⁇ AS and the edges of the 150 ⁇ m square mesas, as well as the exposed AlAs layers at the ragged edges of the wafer.
  • FIG. 13A shows a higher magnification photograph of the sealed edges.
  • the sample shown in FIG. 13B and FIG. 13D shows the typical et oxidation expected.
  • FIG. 13B shows that in the 15 min wet oxidation anneal at 430°C. the upper exposed Alo goGa ⁇
  • FIG. 14A and FIG. 14B show optical microscope photographs looking down on the top of two 60 ⁇ m AlAs/GaAs mesas after an HC1:H 0 ( 1 : 1 ) etch for 1 min.
  • the mesas are formed by isotropically wet etching through five periods of alternating AlAs/GaAs layers.
  • the mesa in FIG. 14A has been annealed at 500°C for 30s before the 1 min HCl etching and shows no effect of the etch.
  • the present inventors have demonstrated how the wet oxidation of AlAs can be used to fabricate buried current and photon confining layers within a VCSEL cavity to achieve improved device performance (Huffaker. Deppe et ai . 1994). This wet oxidation process has been extended to all-epitaxial VCSELs by adjusting AlGaAs compositions within the upper DBR to control the lateral oxidation rates in different layers (Choquette et al . 1994). Herein is shown how the RTA surface oxide can be used instead to selectively block the wet oxidation, and achieve deep lateral oxidation in only the preferred DBR layers closest to the VCSEL active region
  • the advantage of the process is the simplified epitaxial growth which removes the need for critical control of the AlGaAs composition in the DBR layers.
  • the epitaxial VCSEL structure is grown by metal-organic chemical vapor deposition on an n-type GaAs substrate and consists of a lower 35.5 pair n-type AlAs/Al 0 ⁇ Ga ⁇ 85 As DBR. an Al 0 60 GaQ 40 As undoped full- wave cavity spacer layer cladding three 8 ⁇ A GaAs quantum wells (QWs). followed by an upper 22 pair p-type DBR.
  • FIG. 15A and FIG. 15B show the mesa edge and center along with a blow-up of the buried Al x O v layer formed by wet oxidation.
  • the 60 ⁇ m wide mesa is formed by wet-etching through the top 20 pairs of p-AlAs/Al 0
  • a second l OO ⁇ m wide mesa centered on the 60 ⁇ m sealed mesa is then formed by etching through the remaining 1.5 pairs to expose the two AlAs layers closest to the active region for wet oxidation.
  • the wafer is wet oxidized at 430 C for 30min. As shown in FIG. 1 5A. the two unsealed AlAs layers undergo rapid lateral oxidation w hile the top 20 mirror pairs remain sealed.
  • a schematic cross-section of the single InGaAs/GaAs quantum well heterostructure after oxidation is giv en in ( Huffaker and Shin et ai . 1995).
  • Twenty-six n-type AlAs/GaAs quarter- wave pairs form the lower distributed Bragg reflector which is R 2 of FIG. 16B. while the reflectivity of the upper mirror R ] is varied by adding CaF/ZnSe quarter wave-pairs to the quarter- wave thick p-type GaAs contact layer (Huffaker and Shin et ai , 1995).
  • the cavities are somewhat detuned at room temperature, the low current density limits bandfilling and spectral broadening.
  • the low signal power then requires the measurement detector to be placed within 5 ⁇ m for a 600 ⁇ m pin-hole necessitating the far-field measurement outside a devvar system.
  • the low Q quasi-modes are formed with only the single quarter-wave p-type GaAs layer (0 pairs of CaF/ZnSe) as R,. while the high Q quasi-modes are formed with an additional three pairs of CaF/ZnSe.
  • the effect of spectral tuning on the spontaneous coupling efficiency is measured by mounting the devices on a temperature controlled de ar stage
  • the temperature tuning is used to move the quantum well emission peak in and out of resonance with the cavity quasi-mode
  • this setup requires a higher current density which results in increased bandfillmg. but the effect of lateral confinement and quasi-mode Q is still significant
  • the effect ot planar microcav ity tuning on spontaneous emission with a broadened line idth is by now well known ( Deppe and Lei. 1992. Deppe et al . 1994. Huffaker et al .
  • FIG 19 shows similar measurements for the low Q index-confined mode of the 2 ⁇ m device, which is tuned at 21 OK The spectrally integrated intensity change from the tuned temperature of 21 OK to 1 80K is 30%.
  • FIG. 22 An index confined VCSEL fabricated with the use of an etched void in the spacer region is shown in FIG. 22.
  • This device is similar to that shown in FIG. 1. except that the native oxide is replaced by an etched and sealed void region for confinement 60. in which unprotected AlAs layers are etched selectively against GaAs layers. A suitable selective etch is 1 : 1 HCLH ⁇ O. The etching can be performed in two steps. First, vertical sidewalls are etched through existing upper p-type AlAs/GaAs. mirror layers down to the first upper GaAs p-type layer of the mirror. The exposed AlAs layers are then sealed through RTA at 500 to 600°C.
  • FIG. 23 is a schematic of a device in which the native Al x O 66 is used in combination with the RTA sealing of the AlAs sidewalls to achieve selective conversion only within the cavity spacer.
  • the first etch using reactive ion etching to achieve vertical sidewalls and RTA seal is identical to FIG. 22.
  • the RTA surface oxide is used to mask a subsequent wet oxidation carried out in the temperature range of 400 to 500°C in a steam ambient so that the Al x O v is again formed only within the cavity spacer layer.
  • FIG. 24 An index confined VCSEL fabricated with the QW emitting region placed at the edge of the cavity spacer is shown in FIG. 24.
  • This device is similar to that of FIG. 1 , with an upper DBR 90 and lower DBR 92. except that the cavity spacer now includes a ! _ wavelength (or single wavelength) thick high index layer 80 of GaAs 86 along with a - 1/4 wave thick low index layer of AlAs 82. Part of the AlAs layer is oxidized 84 to achieve lateral index confinement.
  • the QW emitting region is placed next to the low index AlAs layer to achieve maximum optical confinement.
  • This device scheme is carrier confinement to the QW region which is achieved using one to two thin layers of AlGaAs (less than or -5 ⁇ A ) on the electron side.
  • the thin layers allow injection of electrons through the barriers based on tunneling, while adequately confining hole carriers due to the larger valence band discontinuity and heavier hole masses.
  • the advantage of such a structure is that material quality just prior to deposition of the QW is improved by growing the GaAs layer, while still allowing the index confining layer to be placed effectively within the cavity spacer adjacent to the QW emitting region.
  • the oxide confining layer can also be replaced with the etched void, as in FIG. 22 and Example 5. -J J-
  • compositions and methods of this invention have been described in terms of preferred embodiments, it will be apparent to those of skill in the art that variations may be applied to the composition, methods and in the steps or in the sequence of steps of the method described herein without departing from the concept, spirit and scope of the invention. More specifically, it will be apparent that certain agents which are both chemically and physically related may be substituted for the agents described herein while the same or similar results would be achieved. All such similar substitutes and modifications apparent to those skilled in the art are deemed to be within the spirit, scope and concept of the invention as defined by the appended claims.

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Abstract

L'invention concerne un émetteur de surface à cavité verticale et seuil faible, présentant une couche de confinement (36) à faible indice de réfraction, située directement dans l'élément de séparation de la cavité. Ainsi, on peut produire un élément de séparation de la cavité demi onde et une dimension latérale qui peut descendre jusqu'à 2 νm. L'invention porte également sur un procédé de recuit rapide destiné à sceller un cristal III-V et à inhiber la dégradation oxydative.
PCT/US1996/018194 1995-11-13 1996-11-12 Emetteur de lumiere a microcavite et seuil faible WO1997018581A1 (fr)

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