WO1997012315A1 - Systeme d'affichage de cagnotte pour une machine de jeu electronique - Google Patents

Systeme d'affichage de cagnotte pour une machine de jeu electronique Download PDF

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Publication number
WO1997012315A1
WO1997012315A1 PCT/AU1996/000609 AU9600609W WO9712315A1 WO 1997012315 A1 WO1997012315 A1 WO 1997012315A1 AU 9600609 W AU9600609 W AU 9600609W WO 9712315 A1 WO9712315 A1 WO 9712315A1
Authority
WO
WIPO (PCT)
Prior art keywords
jackpot
egm
video
interface
signals
Prior art date
Application number
PCT/AU1996/000609
Other languages
English (en)
Inventor
Stephen John Found
Alex Millar
Eddie Shell
Original Assignee
Wintech Investments Pty. Ltd.
Bytecraft Systems Pty., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wintech Investments Pty. Ltd., Bytecraft Systems Pty., Ltd. filed Critical Wintech Investments Pty. Ltd.
Priority to NZ318341A priority Critical patent/NZ318341A/en
Priority to GB9806516A priority patent/GB2320664B/en
Priority to AU69807/96A priority patent/AU704372B2/en
Publication of WO1997012315A1 publication Critical patent/WO1997012315A1/fr

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Classifications

    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07FCOIN-FREED OR LIKE APPARATUS
    • G07F17/00Coin-freed apparatus for hiring articles; Coin-freed facilities or services
    • G07F17/32Coin-freed apparatus for hiring articles; Coin-freed facilities or services for games, toys, sports, or amusements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00Aspects of display data processing
    • G09G2340/12Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels

Definitions

  • This invention relates to an electronic gaming machine (EGM) which is capable of playing normal games such as poker, blackjack or other gambling games and which is also capable of participating in a jackpot involving a number of participating EGMs.
  • EGM electronic gaming machine
  • EGMs have a video display and EGM logic which generates video signals for displaying information relevant to the playing of the normal game on the video displays.
  • the EGMs also usually include hard meters which indicate such things as the credit played (which is the amount of cash which has been wagered), cash out (which is the amount of cash paid out by the EGM), cash in (which is the amount of cash inserted into the machine) and credit won (which is the amount of money which has been won on that machine).
  • the EGM logic is arranged to produce hard meter input signals for driving the hard meters.
  • the EGM includes a jackpot interface board which is responsive to the hard meter output signal in order to allow the EGM to participate in a jackpot game involving a number of EGMs linked together, the interface board also including means for generating video signals relevant to the jackpot, the arrangement being such that the jackpot signals can be superimposed on or replace the normal display.
  • the invention provides a jackpot interface for connection to an electronic gaming machine (EGM) which includes a video display, a hard meter, and EGM logic for generating first video signals for said video display and hard meter input signals for said hard meter, said EGM being adapted to play an independent game and participate in a multiple EGM jackpot game, wherein the jackpot interface comprises: a hard meter monitor which monitors said hard meter input signals for communication to a controller for determination of a jackpot award; video generating means for generating second video signals relating to said jackpot award; and combining means for causing the second video signals to be superimposed on or replace the first video signals to thereby display on said video display messages relating to said jackpot award.
  • EGM electronic gaming machine
  • the jackpot interface comprises: a hard meter monitor which monitors said hard meter input signals for communication to a controller for determination of a jackpot award; video generating means for generating second video signals relating to said jackpot award; and combining means for causing the second video signals to be superimposed on or replace the first video signals to
  • the combining means comprises a video multiplexing device which receives said first and second video signals and its output is coupled to said video display.
  • the EGM includes at least one EGM disable circuit (such as a door open circuit) for generating disable signals wherein the EGM logic is responsive to said disable signals to stop playing of normal games when a door is opened.
  • the jackpot interface board includes logic circuitry for generating, when a jackpot has been won, a signal which is transmitted to the EGM logic and which is interpreted by the EGM logic as a disable signal, thereby stopping normal game play on the EGM.
  • the invention also provides a jackpot interface board for use in an EGM having a video display, hard meters and EGM logic for generating first video signals for said video display and hard meter input signals to said hard meters, said jackpot interface board including monitoring means for monitoring hard meter input signals generated by the EGM logic and transferring said hard meter input signals for addition to a jackpot pool for determining when a jackpot pool is won, video generating means for generating jackpot video signals and video combining means for causing said jackpot video signals to be superimposed upon the video display when a jackpot has been won.
  • FIG 1 is a schematic block diagram of an EGM network having a number of EGMs of the invention incorporated therein;
  • Figure 2 schematically illustrates an EGM;
  • Figure 3 schematically shows some of the components of an EGM;
  • Figure 4 shows an interface board of the invention connected to an EGM;
  • Figure 5 is a block diagram of an interface board;
  • FIGS. 6 to 10 are a detailed circuit diagram of the video interface board shown in 5 Figure 5;
  • Figures 11 to 14 are block diagrams of the logic circuitry shown in Figure 7;
  • Figure 15 is an example of the coupling of the interface board to one form of EGM;
  • Figure 16 is a flow chart showing boot loading of the interface boards;
  • Figures 17 and 18 are flow charts showing main operating loops for the software in the 10 interface board.
  • FIG. 1 diagrammatically illustrates a plurality of EGMs 12 coupled together by means of a venue jackpot network 14.
  • This network is preferably additional to any existing network linking the EGMs together at a venue.
  • the venue jackpot network 14 may comprise
  • Each of the EGMs 12 is connected to the venue jackpot network 14 via a jackpot interface board 10.
  • the system includes jackpot control station 11 having control devices which arc coupled to the venue jackpot network 14 so as to provide various forms of control to the EGMs 12 via the jackpot interface boards (JEBs) 10.
  • the jackpot control station 11 includes a PC user interface
  • a jackpot controller 15 is coupled to the venue jackpot network 14 and essentially provides input and output signals to the venue jackpot network 14 relating to a particular jackpot which may be implemented in the system.
  • the jackpot controller 15 may be implemented in a number of ways, such as a computer having the necessary data handling
  • the preferred implementation is to use a Motorola MVME 162 LX embedded controller. These devices include memory and a processor which can provide the necessary input and output signals for carrying out a jackpot on the EGMs 12.
  • the embedded controller device is fitted with an ethernet controller which enables ready coupling to the venue jackpot network 14.
  • An example of the jackpot controller 15 is described in greater detail in a
  • the jackpot control station 11 may include other peripheral devices such as a bar code reader 17 and card printer 19 coupled to the venue jackpot network 14 by means of a peripheral interface board 21.
  • the system may include a number of video monitors 23 which are coupled to the venue jackpot network 14 by means of a video display interface 25.
  • the system may include a number of large LED displays 27 which are coupled to the venue jackpot network 14 by means of LED display interfaces 31.
  • the monitors 23 and LED displays 27 display prize money or other information relative to the jackpot.
  • Each of the EGM devices has its own internal video display ( Figure 2) and input and output devices by which the user can operate the EGM machine in the usual way.
  • a jackpot can be activated according to parameters determined by the jackpot controller 15.
  • jackpot signals When an event occurs corresponding to the winning of a jackpot, jackpot signals will be transmitted to the jackpot controller 15 by the EGM triggering the win.
  • the jackpot controller 15 will then generate signals which are applied to the venue jackpot network 14.
  • the signals will be received by the jackpot interface boards 10 of the various EGMs and on receipt of these signals the normal video display of the EGM has superimposed thereon information relating to the winning of the jackpot.
  • the superimposed info ⁇ nation can be restricted to the particular EGM which triggered the jackpot win or alternatively could be displayed on all or a selected number of the EGMs in the system. Whilst it is preferred that while the jackpot video info ⁇ nation is being displayed the normal EGM display is blanked out, an arrangement in which the jackpot video info ⁇ nation is superimposed on the normal EGM display could also be implemented.
  • FIG. 2 diagrammatically illustrates a typical EGM 12. It has a cabinet 1 in which is mounted an EGM display 2. The cabinet has control buttons 3 and optionally an operating lever 4 by which the user can make appropriate selections for playing a game.
  • the cabinet includes a money tray 5 to which coins can be dispensed when a win occurs.
  • Located within the cabinet 2 are four hard meters 6 which typically register parameters such as the amount of cash in, cash won, cash out and credit played.
  • T e EGM includes EGM logic circuitry 7 which controls the normal playing operation of the EGM and handles various inputs and outputs for playing the machine, as is well understood in the art. For security reasons, the hard meters 6 can only be accessed when an authorised operator opens a door 8 and this will trigger a door seal switch 9 located in the cabinet.
  • the EGM logic 7 is located within a sealed compartment which is provided with a logic seal switch 41.
  • the EGM 12 may also include an audit key 43 which enables an operator to carry out auditing and maintenance on the EGM.
  • the states of the switches 9 and 41 and the key 43 are monitored by the EGM logic 7 and usually operate to disable the normal running of the EGM when the doors have been open or the audit key turned. Usually this is accompanied by an appropriate message on the EGM display 2.
  • FIG 3 is a block diagram of the basic electric circuits of the EGM.
  • Figure 4 shows the way in which the jackpot interface board 10 is added. It will be seen that the interface board 10 is interposed between the EGM logic 7 and the EGM display 2. The interface board 10 is also interposed between the EGM logic 7 and the hard meters 6. In addition, the interface board 10 is effectively connected in series with the logic seal switch 41 and audit key 43. Thus the EGM logic 7 as well as the interface board 10 are responsive to changes in the states of the switch 41 and key 43.
  • the door seal switch 9 is inputted to the EGM logic 7 via the interface board 10 which includes relay contacts 45 effectively connected in series with the door seal switch 9. This provides a very simple and effective coupling between the interface board 10 and the EGM logic 7.
  • FIG. 5 diagrammatically illustrates a video superposition interface board 10 constructed in accordance with the invention.
  • the interface board 10 carries out a variety of functions. Its main function, however, is to enable the EGM 12 to which it is connected to participate in a jackpot game involving a number of EGMs 12 which are linked together, as shown in Figure 1.
  • the board 10 permits the jackpot controller 15 to monitor inputs to the hard meters 6 of the EGM. It also permits the jackpot controller to check the status of the logic seal switch 41, the audit key 43 and the door seal 9. It also superimposes messages on the EGM display 2 relevant to the jackpot.
  • the board 10 comprises a microprocessor 16, a serial communications port 18 (or a pair of serial ports), a memory 20 and a network interface 22.
  • the board 10 includes a system bus 78 coupled between the microprocessor 16 and the network interface 22.
  • the network interface 22 may comprise known forms of interface device such as "ethernet" cards or the like such as an AT/LANTIC DP83905 device, for example.
  • the network interface 22 is coupled to the venue jackpot network 14 by means of a connector 72. Data flows between the EGM and the venue jackpot network 14 through the interface device and is formatted by the microprocessor 16 by reference to stored information in the memory 20.
  • the memory 20 may for example comprise a flash ROM and battery backed RAM so as to be able to retain data without need for continued electric supply thereto.
  • the memory 20 contains software for implementation of processing steps by the microprocessor relating to jackpot implementation and video displays.
  • the board 10 also includes a serial communications bus 28 which can allow communications through the serial communications port 18 via connectors 108 and 110.
  • the interface board 10 also includes a video mixing device 42. This is able to receive video in data from the EGM logic 7 and provide video out data for the EGM display 2 via video in and video out connectors 140 and 144 respectively.
  • the device 42 is coupled to the microprocessor 16 which provides a control mechanism for controlling video mixing of video signals applied to the EGM display 2.
  • the device 42 is preferably arranged to superimpose jackpot info ⁇ nation on the normal display of the EGM. Alternatively, it can be arranged to blank out the normal display messages provided by the EGM logic 7 and display only jackpot info ⁇ nation which is derived through signals from the interface board 10.
  • the video mixing device 42 is coupled to the microprocessor 16 so that the microprocessor has control over the function of the mixing device 42.
  • the jackpot parameters are stored in the jackpot controller 15. In some systems this information may be transmitted to the jackpot controller from a remote location or altematively it could be inputted at the jackpot control station 11.
  • the jackpot controller 15 transmits the jackpot configuration to the jackpot interface board 10.
  • each jackpot interface board 10 will receive the configuration, store it in the memory 20, the board then sending an acknowledgment to the jackpot controller 15. If a jackpot interface board 10 is already on line, a new configuration can be transmitted to it by the jackpot controller 15. Once a jackpot interface board 10 receives the configuration, it preferably overlays an identifying number on the EGM display 2.
  • a start command can be issued to the jackpot controller 15 from the PC user interface 13 or from a remote centre, it checks for all the vital information that is required to run the jackpot.
  • the jackpot controller 15 then generates a hidden prize between the low limit and high limit and sends the hidden prize value to the PC user interface 13 or to the remote centre and thereafter the jackpot controller activates the jackpot interface boards 10 which are participating in the jackpot. This is achieved by broadcasting a jackpot open command together with an appropriate message to be displayed on the EGM displays 2 as well as to other displays such as the video monitors
  • the jackpot controller creates a jackpot pool and a hidden prize value and calculates the amount that is required to be contributed in order to hit the hidden value.
  • the jackpot interface board 10 monitors these pulses and sends signals to the jackpot controller 15 via the venue jackpot network 14 to increment the software counter that contains the accumulated number of pulses (absolute value). Once this event occurred, the jackpot interface board 10 sends a communication packet to the jackpot controller 15 that will contain the cu ⁇ ent time stamp and the software counter. If the venue jackpot network 14 is busy, the jackpot interface board 10 will retry next time. This means that the counter can be incremented more than once between each transmission.
  • the jackpot controller 15 there is a queue of all counters (contributions) that are received from all participating EGMs 12.
  • the jackpot controller 15 monitors the received counter values from the queue and performs the following steps: retrieves the individual EGM counter from jackpot controller's battery backed RAM and calculates the difference between the old value and the new value. Then it replaces the old with the new. the calculated difference is added to the jackpot pool that is also stored in its
  • the pool is compared to the hidden prize. If the pool is less than the prize, the process continues to the next entry in the queue. If the pool is equal or exceeds the hidden prize, the win process is initiated by the jackpot controller.
  • the contributions queue is processed until the win process verifies the winning EGM and its software, and the contributions are added to the separate pool. Once the winning EGM is verified, the jackpot is stopped by broadcasting a command with a message ID.
  • SUBSTTTUTE SHEET (Rule 26) Every defined period of time the jackpot controller broadcasts the current value of the jackpot pool to all the jackpot interface boards 10 (this comes as a message with message ID). As the amount is in cents, the jackpot controller 15 converts it to a dollar amount and then broadcasts. The jackpot interface boards 10, if configured to do so, will display the value on the EGM displays 2. Similar information may be displayed on the video monitors 23 and LED displays 27.
  • interface board 10 constructed in accordance with the invention.
  • the exemplary form of interface board is suitable for coupling to EGMs made by VLC.
  • the operation of the circuit shown will be apparent to those skilled in the art and therefore only a brief outline of the important features of the circuit are mentioned below.
  • FIG. 6 shows the network interface 22 which in this case is a standard ethernet chip.
  • the interface 22 is connected to the connector 72 via a pulse transformer 74 (e.g. NPI5826). Interconnections are also made to the network interface 22 via a local bus 76, a system bus 78, a control bus 80 and an EPLD bus 82 as will be explained in more detail below.
  • a pulse transformer 74 e.g. NPI5826
  • Interconnections are also made to the network interface 22 via a local bus 76, a system bus 78, a control bus 80 and an EPLD bus 82 as will be explained in more detail below.
  • the system bus 78 provides interconnection to the memory 20 in this case in the form of a flash memory device 90 and RAMs 92 and 94.
  • the system bus 78 also provides connection to EPLD logic circuitry 44 (e.g. EPM 7032-3).
  • the local bus 76 provides coupling between the interface 22 and the RAM 94 which stores data required by the interface 22.
  • the logic circuitry 44 may comprise Flash Programmable Gate Array (EPLD) such as an Altera 7032 a ⁇ ay which is set up to provide various logical signals.
  • Tne logic circuitry 44 essentially provides "glue logic" for the various components of the circuit board 10. As is well understood in the art, the glue logic is concerned primarily with providing signals which have the appropriate polarity, timing, etc. for correct functioning of the circuit.
  • the glue logic could be implemented by discrete components provided on the board. It is, however, desirable to implement them in the programmable array so as to provide economy, simplicity of design and flexibility to change circuit details if needed. Some examples of the glue logic functions carried out by the logic circuitry 44 illustrated in Figures 11 to 14.
  • FIG 8 shows the microprocessor 16 and its interconnections with the system bus 78 and a control bus 80.
  • T e microprocessor 16 may comprise an NEC V25 processor.
  • the microprocessor produces output signals for the video bus 102 which is coupled to the video mixing device 42 ( Figure 10) and to other components which are shown in Figure 9 via an EGM input/output bus 104.
  • the microprocessor 16 also handles the control and formatting of serial data signals (pins 41, 43, 44, 45, 46 and 47) for the communications bus 28.
  • Serial data from the microprocessor 16 is connected to output connectors 108 and 110 via converters 103 which convert TTL level outputs into a balanced drive required for the RS 422 serial link.
  • the circuit also includes converters 105 which convert RS 422 inputs into TTL compatible signals required by the microprocessor 16. Termination resistors 107 and 109 are provided for the connectors 108 and 110 respectively.
  • the circuitry also includes input protection diodes 111 and 113 for the connectors 108 and 110 respectively.
  • Figure 8 also shows an oscillator circuit 115 which produces 60 MHz clock pulses for the board 10.
  • Figure 9 shows an input/output connector 120 which is used to couple the board 10 to the input signals generated by the EGM logic 7 to drive the hard meters 6 of the EGM.
  • the connector 120 is coupled to the EGM input/output bus 104 via coupling resistors 122.
  • Input protection diodes 121 are provided across the various input lines of the connector 120.
  • the coupling resistors 122 may be replaced by opto-coupling circuits.
  • the hard meter input signals include: (i) credit played on line 123, (ii) cash out on line
  • FIG. 9 also shows a connector 131 to which connections are made from the door seal switch 9, audit key 43 and logic seal 41.
  • the circuit includes a relay having a coil 133 for operating the contacts 45.
  • the contacts 45 are connected in series in line 126 which leads to the door seal switch 9, as also shown in Figure 4.
  • the contacts 45 are normally closed.
  • Figure 9 also shows an input line 137 which is coupled to the logic seal switch 41 through the connector 131.
  • the line 137 is coupled to an 8-bit latch 139 (e.g. 74HCT299) which provides additional security so that the effect of the logic seal switch 41 cannot simply be shorted out.
  • the microprocessor 16 writes an 8-bit number into data lines (do-d 7 ) from system bus 78 and this is stored in the latch. If the state ofthe switch 41 changes the latch 139 will be reset and this will be sensed by the microprocessor, thus indicating that the logic seal has been broken. Opening of the switch 41 will also be sensed by the EGM logic 7.
  • the circuit also includes a memory supervisor chip 141 which operates to provide power to the memory 90 from the normal power supply or from backup batteries. The circuit 141 also provides power for the latch 139 and this provides additional security by preventing tampering with the latch 139 when power is off.
  • the circuit also includes a memory supervisor chip 143 which controls normal power or backup power to the memory 92 (see Figure 6).
  • a further memory supervisor chip 145 is provided to control the backup battery for the memory 94.
  • the chip 145 also monitors the power supply to the microprocessor 16 and enables the microprocessor 16 to backup various parameters before power is lost.
  • the chip 145 also includes a watchdog circuit. The program in memory 20 is required to cause the microprocessor 16 to reset the watchdog of chip 145 within a certain period of time. If this is not done, then the chip 145 causes a reset of the microprocessor 16. This provides a recovery mechanism should the microprocessor become "lost" for any reason.
  • the chip 145 may comprise an MAX690 and the chips 141 and 143 may comprise a DS1210S.
  • the video mixing device 42 is shown in greater detail in Figure 10.
  • Tne device 42 includes a video character generator 138 and a video multiplexer 150.
  • the character generator 138 is connected via the video bus 102 to a video input connector 140 which receives the current video output of the EGM 12 to which the board 10 is connected.
  • the multiplexer 150 comprises a digital multiplexer which is appropriate for a digital video display. This circuit operates to overlay or substitute video character signals produced by the generator 138 on or for the normal EGM video display received at the video input connector 140 and provide these signals to the video output connector 144 to which the EGM display 2 is connected.
  • the video character generator 138 may comprise an NEC UPD 6453 10 circuit and the multiplexer 150 may comprise a 74HC157 circuit.
  • Figure 11 diagrammatically illustrates the glue logic implemented by the logic circuit 44.
  • the logic includes an intelligent dividing device 160 which receives horizontal and vertical sync pulses from the EGM video via the video input connector 140 on lines 162 and
  • the device 160 is a ⁇ anged to always produce negative going outputs, which is appropriate for the rest ofthe circuitry. If the inputs are already negative then the sync pulses are simply passed to the output. If the input sync pulses are positive, the pulses are inverted at the outputs. The selection is made by a stored input from the microprocessor 16 which is set for particular machinery.
  • the circuitry of Figure 11 includes a divider circuit 166 which receives 60 megahertz clock pulses from the oscillator 115 and produces a 20 MHz output on line 168 and anti-phase 15 MHz outputs on the lines 170 and 172.
  • the clock pulses on line 168 are inputted to the network interface circuit 22 and the clock pulses on the lines 170 and 172 are inputted to the
  • Figure 13 shows the divider circuit 166 in more detail.
  • the circuit also includes a memory decode device 174 which has inputs on lines 176 from the microprocessor.
  • the memory decode device produces outputs on lines 178 which provide control signals for the memories 90 and 92, for the logic seal components 139 and 141
  • Figure 14 illustrates in more detail the memory decode device 174.
  • the circuit of Figure 11 includes an a ⁇ ay of gates 182 having input lines 184 from the microprocessor 16.
  • the gates 182 serve to provide output signals on lines 186 which are 5 coupled to the network interface 22 to provide signals in the appropriate format for writing to and from the network interface 22 and to the memory 92.
  • the circuit of Figure 11 also includes an inverter 188 which receives a power fail signal on line 190 and operates to provide an inverted output.
  • the circuit of Figure 11 also includes a NOR gate 192 which receives input on line 194 from the character generator 138 and on line 196 from the microprocessor 16.
  • the output line 198 ofthe gate 192 is inputted to the multiplexer 150.
  • the anangement is such that the signal on line 196 from the microprocessor operates to determine whether the normal signal display
  • the character information from the character generator 138 will be blanked out when the character information from the character generator 138 is displayed.
  • the information generated by the character generator 138 can be superimposed on the normal EGM video display.
  • Figure 15 diagrammatically illustrates the manner in which the board 10 is connected to the EGM logic 7.
  • Figure 16 is a flow chart showing typical steps in the boot loading of the memory 20 of the board 10 on receipt of appropriate signals from the jackpot controller 15. The flow
  • the 30 chart includes a question box 200 to determine if an initialising message JIB_INIT is received from the jackpot controller 15. If yes, the program executes an initialisation sequence indicated by step 202.
  • the flow chart includes a question box 204 which determines if a message is received (JIB_DOWNLOAD) signal is received from the jackpot controller 15 to download jackpot configuration data from the jackpot controller 15 into the memory 20 of the board 10, as indicated by the step 206. This step in the program can be used to update or load new software into the board 10 under the control of the jackpot controller 15.
  • the flow chart includes a question box 208 which determines if a reset message JIB_RESET message is received from the jackpot controller 15. If yes the board 10 is reset as indicated by step 210. It will be appreciated from the above that once the program of step 206 has been implemented, the board 10 is ready to participate in a jackpot together with other EGMs which have been programmed in a similar way subject to the control of the jackpot controller 15.
  • the boot loading program may also include provision of a procedure for initiating encryption of communications between the JIB and the jackpot controller in response to an "encrypt" message and encryption key from the jackpot controller, although those steps are not illustrated in the flowchart of Figure 16.
  • FIG 17 is a flow chart showing steps in the main programming loop 212 which is executed by the microprocessor 16.
  • the main loop 212 is executed after boot loading of the board 10, as described above.
  • the main loop includes a question box 214 which enquires whether any commands have been received from the jackpot controller 15. If yes, the command is performed as indicated by step 216 and an acknowledgment is given to the jackpot controller 15 as indicated by step 218. If no, an enquiry is made by question box 220 to see if the jackpot controller has communicated with the board 10 recently. If no, then a logical decision is made that a communication has been lost, as indicated by step 222 and steps are taken to stop checking the hard meter outputs of the EGM logic 7.
  • step 224 updates timed messages for the EGM 10.
  • the program then passes to question box 226 which monitors the hard meter inputs and also senses changes to other inputs such as logic seals and the like. If a change has occu ⁇ ed, the appropriate steps will be taken as indicated in step 228. If the step is an increment in the hard meter, the step 228 will cause appropriate signals to be sent to the jackpot controller 16. If other inputs have changed such as a logic seal being broken, then this causes stopping of the operation of the EGM and appropriate signalling to the jackpot controller 15.
  • the program passes to question 5 box 230 which enquires whether the board 10 has transmitted signals to the jackpot controller 15 recently. If no, the program passes to step 232 which causes a message to be sent to the jackpot controller 15 indicating that the board 10 is still operating. If the response to question box 230 is yes, the program returns to the first question box 214.
  • the flow chart of Figure 18 illustrates in more detail an EGM monitoring loop 234 which is carried out in the step 228.
  • the loop 234 includes a question box 236 which enquires whether the hard meter input pulse is bad, that is to say to see if the pulse shape does not fit certain preconfigured parameters. If yes, the program passes to step 238 which activates a bad pulse event which is transmitted to the jackpot controller 15 so that appropriate action can be
  • step 242 which activates a meter disconnected event and this is signalled to the jackpot controller 15 which causes discontinuance of participation of the EGM in the jackpot. If the response to question box 236 is no, the program passes to question box 240 which enquires whether the hard meter has become disconnected. This effectively checks to see if the hardware circuitry recognises a disconnection. If yes, the program passes to step 242 which activates a meter disconnected event and this is signalled to the jackpot controller 15 which causes discontinuance of participation of the EGM in the jackpot. If the response to question box 236 is no, the program passes to question box 240 which enquires whether the hard meter has become disconnected. This effectively checks to see if the hardware circuitry recognises a disconnection. If yes, the program passes to step 242 which activates a meter disconnected event and this is signalled to the jackpot controller 15 which causes discontinuance of participation of the EGM in the jackpot. If the response
  • the program passes to question box 224 which enquires whether a predetermined number of consecutive hard meter pulses has occu ⁇ ed. If the response is yes, the program passes to step 246 which activates the hard meter's consecutive event which may be flashing selected displays on the EGM screen while hard meters are being ticked (i.e. being incremented). If the response to question box 244 is no, the program passes to question box
  • step 25 248 which enquires whether the number of consecutive pulses has exceeded a predetermined runaway limit. If yes, the program passes to step 250 which activates a runaway event sequence for the meter and this again will be signalled to the jackpot controller 15. If the response to question box 248 is no, the program passes to question box 252 which enquires whether the number of pulses has reached the configured threshold. If yes, the program passes
  • the delta event may be activated when a predetermined number of hard meter pulses have been counted. Typically this may be, say, three meter counts.
  • the board 10 would not send a message to the jackpot controller 15 until either three meter counts had been received or it was time to send a message (i.e. to communicate with the jackpot controller 15 to let it know that the EGM is still active. This prevents rapidly sending many messages to the jackpot controller 15, each indicating one meter pulse when the meters are being incremented quickly. If no, the program will pass to question box 230.
  • main program loop 212 Whilst the board 10 is active the main program loop 212 will continue to operate and cany out the functions described above.

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  • Display Devices Of Pinball Game Machines (AREA)

Abstract

Interface (10) de cagnotte connectée à des machines de jeu électroniques (12) (par ex. poker, machines à sous, machines vidéo) qui comportent des dispositifs d'indication de montants (6) et des écrans vidéo (23, 27). Lesdites machines de jeu (12) sont capables de jouer des jeux indépendants et de participer à une cagnotte pour machines de jeu multiples. Lesdites machines de jeu (12) sont connectées à un réseau local (14). A l'attribution d'une cagnotte, un générateur d'affichage vidéo remplace un premier signal vidéo par un second signal qu'il génère, ou superpose le second signal sur le premier. Une unité de commande (15) de cagnotte procède à des augmentations sur la base des signaux de dispositifs d'indication de montants (6) et/ou attribue une cagnotte provenant d'un fonds de cagnotte à une machine de jeu sélectionnée (12). L'interface (10) de cagnotte stoppe le jeu indépendant de la machine de jeu (12) à l'attribution de la cagnotte. Ladite interface (10) de cagnotte est une carte de circuits séparée capable d'être installée dans une machine de jeu (12) standard.
PCT/AU1996/000609 1995-09-26 1996-09-26 Systeme d'affichage de cagnotte pour une machine de jeu electronique WO1997012315A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
NZ318341A NZ318341A (en) 1995-09-26 1996-09-26 Jackpot display system for an electronic gaming machine
GB9806516A GB2320664B (en) 1995-09-26 1996-09-26 Jackpot display system for an electronic gaming machine
AU69807/96A AU704372B2 (en) 1995-09-26 1996-09-26 Jackpot display system for an electronic gaming machine

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AUPN5642A AUPN564295A0 (en) 1995-09-26 1995-09-26 Jackpot display system for an electronic gaming machine
AUPN5642 1995-09-26

Publications (1)

Publication Number Publication Date
WO1997012315A1 true WO1997012315A1 (fr) 1997-04-03

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/AU1996/000609 WO1997012315A1 (fr) 1995-09-26 1996-09-26 Systeme d'affichage de cagnotte pour une machine de jeu electronique

Country Status (5)

Country Link
AU (1) AUPN564295A0 (fr)
CA (1) CA2232964A1 (fr)
GB (1) GB2320664B (fr)
NZ (1) NZ318341A (fr)
WO (1) WO1997012315A1 (fr)

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999060498A1 (fr) * 1998-05-18 1999-11-25 Aristocrat Leisure Industries Pty. Ltd. Systeme de controle intelligent d'entree/sortie
WO2003045520A1 (fr) * 2001-11-26 2003-06-05 Konami Australia Pty Ltd Regulateur de cagnotte lie
AU775882B2 (en) * 1999-04-28 2004-08-19 Igt Method and apparatus for displaying player tracking information on an electronic gaming machine display
WO2008148171A1 (fr) * 2007-06-08 2008-12-11 Paltronics Australasia Pty Limited Appareil permettant de déterminer l'attribution d'une pluralité d'ensembles de prix
EP2026300A1 (fr) * 2007-08-02 2009-02-18 Aristocrat Technologies Australia Pty. Ltd. Système de jeu et procédé de jeu
US8342935B1 (en) 2001-09-28 2013-01-01 Bally Gaming, Inc. Integrated display and input system
US8388424B2 (en) 1998-08-03 2013-03-05 Stanley P. Dabrowski Method and apparatus for modifying gaming machines to provide supplemental or modified functionality
US8876598B2 (en) 2004-07-23 2014-11-04 Wms Gaming Inc. System, method, and apparatus for presenting media in a wagering game machine
US8876591B2 (en) 2004-08-19 2014-11-04 Igt Gaming system having multiple gaming machines which provide bonus awards
US9600968B2 (en) 2004-08-19 2017-03-21 Igt Gaming system having multiple gaming machines which provide bonus awards
US9633508B2 (en) 2003-10-20 2017-04-25 Igt Enhanced video gaming machine
US9898886B2 (en) 2002-04-19 2018-02-20 Igt Methods and apparatus for providing communications services at a gaming machine
US10068417B2 (en) 2014-08-07 2018-09-04 Bally Gaming, Inc. Mobile secondary betting user interface
US10223865B2 (en) 2014-01-17 2019-03-05 Bally Gaming, Inc. Synchronous betting in wagering game systems
US10282941B2 (en) 2014-04-16 2019-05-07 Bally Gaming, Inc. Cashing out independent wagering games
US10839641B2 (en) 2018-02-27 2020-11-17 Stanley P. Dabrowski Method and apparatus for modifying gaming machines to provide supplemental or modified functionality

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090291733A1 (en) 2008-05-20 2009-11-26 Aristocrat Technologies Australia Pty Limited Gaming method and a gaming system

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4602286A (en) * 1982-01-15 1986-07-22 Quantel Limited Video processing for composite images
US4780709A (en) * 1986-02-10 1988-10-25 Intel Corporation Display processor
US4872056A (en) * 1987-02-05 1989-10-03 Video Graphic Styling, Inc. Method for displaying selected hairstyles in video form
US4947257A (en) * 1988-10-04 1990-08-07 Bell Communications Research, Inc. Raster assembly processor
US5048833A (en) * 1990-03-01 1991-09-17 Lamle Steward M Apparatus for detecting a series of game outcomes
US5116055A (en) * 1991-07-02 1992-05-26 Mikohn, Inc. Progressive jackpot gaming system linking gaming machines with different hit frequencies and denominations
US5280909A (en) * 1992-02-06 1994-01-25 Mikohn, Inc. Gaming system with progressive jackpot
US5324035A (en) * 1991-12-02 1994-06-28 Infinational Technologies, Inc. Video gaming system with fixed pool of winning plays and global pool access
US5353068A (en) * 1992-08-31 1994-10-04 Sony Corporation Video signal combining apparatus and method
US5398932A (en) * 1993-12-21 1995-03-21 Video Lottery Technologies, Inc. Video lottery system with improved site controller and validation unit

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4602286A (en) * 1982-01-15 1986-07-22 Quantel Limited Video processing for composite images
US4780709A (en) * 1986-02-10 1988-10-25 Intel Corporation Display processor
US4872056A (en) * 1987-02-05 1989-10-03 Video Graphic Styling, Inc. Method for displaying selected hairstyles in video form
US4947257A (en) * 1988-10-04 1990-08-07 Bell Communications Research, Inc. Raster assembly processor
US5048833A (en) * 1990-03-01 1991-09-17 Lamle Steward M Apparatus for detecting a series of game outcomes
US5116055A (en) * 1991-07-02 1992-05-26 Mikohn, Inc. Progressive jackpot gaming system linking gaming machines with different hit frequencies and denominations
US5324035A (en) * 1991-12-02 1994-06-28 Infinational Technologies, Inc. Video gaming system with fixed pool of winning plays and global pool access
US5280909A (en) * 1992-02-06 1994-01-25 Mikohn, Inc. Gaming system with progressive jackpot
US5353068A (en) * 1992-08-31 1994-10-04 Sony Corporation Video signal combining apparatus and method
US5398932A (en) * 1993-12-21 1995-03-21 Video Lottery Technologies, Inc. Video lottery system with improved site controller and validation unit

Cited By (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999060498A1 (fr) * 1998-05-18 1999-11-25 Aristocrat Leisure Industries Pty. Ltd. Systeme de controle intelligent d'entree/sortie
US9177436B2 (en) 1998-08-03 2015-11-03 Western Gaming Properties Method and apparatus for modifying gaming machines to provide supplemental or modified functionality
US9022847B2 (en) 1998-08-03 2015-05-05 Western Gaming Properties Method and apparatus for modifying gaming machines to provide supplemental or modified functionality
US9905075B2 (en) 1998-08-03 2018-02-27 Western Gaming Properties Method and apparatus for modifying gaming machines to provide supplemental or modified functionality
US9437076B2 (en) 1998-08-03 2016-09-06 Western Gaming Properties Method and apparatus for modifying gaming machines to provide supplemental or modified functionality
US9437075B2 (en) 1998-08-03 2016-09-06 Western Gaming Properties Method and apparatus for modifying gaming machines to provide supplemental or modified functionality
US8388424B2 (en) 1998-08-03 2013-03-05 Stanley P. Dabrowski Method and apparatus for modifying gaming machines to provide supplemental or modified functionality
US8734213B2 (en) 1998-08-03 2014-05-27 Western Gaming Properties Method and apparatus for modifying gaming machines to provide supplemental or modified functionality
AU775882B2 (en) * 1999-04-28 2004-08-19 Igt Method and apparatus for displaying player tracking information on an electronic gaming machine display
US7749081B1 (en) 1999-04-28 2010-07-06 Igt Method and apparatus for displaying player tracking information on an electronic gaming machine display
US8568228B2 (en) 1999-04-28 2013-10-29 Igt Method and apparatus for displaying player tracking information on an electronic gaming machine display
US10347071B2 (en) 2001-09-28 2019-07-09 Bally Gaming, Inc. Integrated display and input system
US8342935B1 (en) 2001-09-28 2013-01-01 Bally Gaming, Inc. Integrated display and input system
US10467846B2 (en) 2001-09-28 2019-11-05 Bally Gaming, Inc. Integrated display and input system
WO2003045520A1 (fr) * 2001-11-26 2003-06-05 Konami Australia Pty Ltd Regulateur de cagnotte lie
US9898886B2 (en) 2002-04-19 2018-02-20 Igt Methods and apparatus for providing communications services at a gaming machine
US9633508B2 (en) 2003-10-20 2017-04-25 Igt Enhanced video gaming machine
US9649559B2 (en) 2004-07-23 2017-05-16 Bally Gaming, Inc. System, method, and apparatus for presenting media in a wagering game machine
US8876598B2 (en) 2004-07-23 2014-11-04 Wms Gaming Inc. System, method, and apparatus for presenting media in a wagering game machine
US9005015B2 (en) 2004-08-19 2015-04-14 Igt Gaming system having multiple gaming machines which provide bonus awards
US9600968B2 (en) 2004-08-19 2017-03-21 Igt Gaming system having multiple gaming machines which provide bonus awards
US9852580B2 (en) 2004-08-19 2017-12-26 Igt Gaming system having multiple gaming machines which provide bonus awards
US8876591B2 (en) 2004-08-19 2014-11-04 Igt Gaming system having multiple gaming machines which provide bonus awards
US9224266B2 (en) 2004-08-19 2015-12-29 Igt Gaming system having multiple gaming machines which provide bonus awards
US8758118B2 (en) 2007-06-08 2014-06-24 Paltronics Australasia Pty Limited Apparatus for determining the award of a plurality of sets of prizes
WO2008148171A1 (fr) * 2007-06-08 2008-12-11 Paltronics Australasia Pty Limited Appareil permettant de déterminer l'attribution d'une pluralité d'ensembles de prix
AU2008203460B2 (en) * 2007-08-02 2011-08-25 Aristocrat Technologies Australia Pty Limited Gaming system and a method of gaming
EP2026300A1 (fr) * 2007-08-02 2009-02-18 Aristocrat Technologies Australia Pty. Ltd. Système de jeu et procédé de jeu
US10223865B2 (en) 2014-01-17 2019-03-05 Bally Gaming, Inc. Synchronous betting in wagering game systems
US10282941B2 (en) 2014-04-16 2019-05-07 Bally Gaming, Inc. Cashing out independent wagering games
US10339757B2 (en) 2014-08-07 2019-07-02 Bally Gaming, Inc. Mobile secondary betting user interface
US10068417B2 (en) 2014-08-07 2018-09-04 Bally Gaming, Inc. Mobile secondary betting user interface
US10839641B2 (en) 2018-02-27 2020-11-17 Stanley P. Dabrowski Method and apparatus for modifying gaming machines to provide supplemental or modified functionality

Also Published As

Publication number Publication date
GB9806516D0 (en) 1998-05-27
CA2232964A1 (fr) 1997-04-03
NZ318341A (en) 1999-09-29
GB2320664A (en) 1998-06-24
GB2320664B (en) 1999-11-03
AUPN564295A0 (en) 1995-10-19

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