WO1996009709A3 - Method and arrangement for eliminating the influence of high-capacitance nodes - Google Patents

Method and arrangement for eliminating the influence of high-capacitance nodes Download PDF

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Publication number
WO1996009709A3
WO1996009709A3 PCT/SE1995/001054 SE9501054W WO9609709A3 WO 1996009709 A3 WO1996009709 A3 WO 1996009709A3 SE 9501054 W SE9501054 W SE 9501054W WO 9609709 A3 WO9609709 A3 WO 9609709A3
Authority
WO
WIPO (PCT)
Prior art keywords
influence
arrangement
eliminating
node
digital signal
Prior art date
Application number
PCT/SE1995/001054
Other languages
French (fr)
Other versions
WO1996009709A2 (en
Inventor
Nianxiong Tan
Original Assignee
Forskarpatent I Linkoeping Ab
Nianxiong Tan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Forskarpatent I Linkoeping Ab, Nianxiong Tan filed Critical Forskarpatent I Linkoeping Ab
Priority to AU35814/95A priority Critical patent/AU3581495A/en
Publication of WO1996009709A2 publication Critical patent/WO1996009709A2/en
Publication of WO1996009709A3 publication Critical patent/WO1996009709A3/en

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • G06F13/4072Drivers or receivers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/028Arrangements specific to the transmitter end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0292Arrangements specific to the receiver end
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Analogue/Digital Conversion (AREA)
  • Logic Circuits (AREA)

Abstract

The invention relates to a method and an arrangement for avoiding the influence of a high-capacitance node on digital signal transfer in relation to a VLSI-circuit chip, for instance a CMOS-chip. A digital signal having voltage swing is converted to a digital signal having current swing and stabilized potential at the input of said node. The current swing signal is converted back to a voltage swing signal at the output of the node.
PCT/SE1995/001054 1994-09-21 1995-09-19 Method and arrangement for eliminating the influence of high-capacitance nodes WO1996009709A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU35814/95A AU3581495A (en) 1994-09-21 1995-09-19 Method and arrangement for eliminating the influence of high-capacitance nodes

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9403172-1 1994-09-21
SE9403172A SE9403172L (en) 1994-09-21 1994-09-21 Method and apparatus for eliminating the influence of high capacitance nodes

Publications (2)

Publication Number Publication Date
WO1996009709A2 WO1996009709A2 (en) 1996-03-28
WO1996009709A3 true WO1996009709A3 (en) 1996-06-06

Family

ID=20395322

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SE1995/001054 WO1996009709A2 (en) 1994-09-21 1995-09-19 Method and arrangement for eliminating the influence of high-capacitance nodes

Country Status (3)

Country Link
AU (1) AU3581495A (en)
SE (1) SE9403172L (en)
WO (1) WO1996009709A2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4941153A (en) * 1987-08-25 1990-07-10 Hughes Aircraft Company High-speed digital data communication system
WO1993021572A1 (en) * 1992-04-22 1993-10-28 Rambus, Inc. Electrical current source circuitry for a bus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4941153A (en) * 1987-08-25 1990-07-10 Hughes Aircraft Company High-speed digital data communication system
WO1993021572A1 (en) * 1992-04-22 1993-10-28 Rambus, Inc. Electrical current source circuitry for a bus

Also Published As

Publication number Publication date
SE9403172L (en) 1996-03-22
WO1996009709A2 (en) 1996-03-28
AU3581495A (en) 1996-04-09
SE9403172D0 (en) 1994-09-21

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