WO1994019829A1 - Semiconductor device comprising deuterium atoms - Google Patents

Semiconductor device comprising deuterium atoms Download PDF

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Publication number
WO1994019829A1
WO1994019829A1 PCT/US1994/001669 US9401669W WO9419829A1 WO 1994019829 A1 WO1994019829 A1 WO 1994019829A1 US 9401669 W US9401669 W US 9401669W WO 9419829 A1 WO9419829 A1 WO 9419829A1
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bonds
silicon
deuterium
plus
silicon dioxide
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PCT/US1994/001669
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French (fr)
Inventor
Boris S. Lisenker
Alfred Jankelevich
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National Semiconductor Corporation
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Priority to KR1019950703467A priority Critical patent/KR960701477A/en
Priority to EP94910119A priority patent/EP0685115A1/en
Priority to JP6519103A priority patent/JPH08507175A/en
Publication of WO1994019829A1 publication Critical patent/WO1994019829A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith

Definitions

  • the present invention relates to silicon-based electronic devices and methods of fabricating them.
  • the present invention provides improved VLSI fabrication methods that minimize some of the detrimental effects associated with hydrogen in oxides.
  • Oxide layers are used to isolate devices and device elements on an integrated circuit. They are also used to control leakage currents in junction devices and act as stable gate oxides in field effect devices.
  • Hydrogen can also be introduced unintentionally by a variety of standard fabrication processes including thermal oxidation of the wafer, post-oxidation treatments of the wafer, and ambient oxidation of the silicon surface. All of these processes result in the formation of Si-H and Si-OH bonds.
  • thermal oxidation of the wafer post-oxidation treatments of the wafer, and ambient oxidation of the silicon surface. All of these processes result in the formation of Si-H and Si-OH bonds.
  • Some hydrogen is introduced in the form of water present in materials used to fabricate semiconductor devices. In wet thermal oxidation processes water is purposely employed to form oxides, usually isolation oxides. These processes are rapid, but result in a somewhat porous oxide film.
  • the introduction of hydrogen has the beneficial result of tying up some dangling bonds at the silicon/silica interface.
  • the resulting Si-H bonds (as well as other compensating bonds such as Si-OH) are weaker than Si-0 bonds formed with the bulk oxide layer.
  • the density of silicon dangling bonding is increased because Si-H and Si-OH bonds break and the resulting hydrogen species migrate away.
  • Hot electrons having energies over 3.2eV which surmount the barrier between silicon and silicon dioxide. These "hot" electrons (or the resulting holes) can become trapped in the silica layer and break some of the silicon-hydrogen and silicon-OH bonds at the silicon and silicon dioxide interface. Hot electrons are especially prevalent during avalanche breakdown of a P-N junction, since the energy of avalanching carriers has a mean value of about 3eV. Hot electrons can also be produced in the channel region of MOS transistors, resulting in a change in the threshold voltage.
  • the present invention provides a method in which a silicon wafer is contacted with a deuterium containing material to form Si-D and Si-OD bonds in a silicon dioxide layer and on a silicon surface at an interface with the silicon dioxide layer.
  • Typical silicon dioxide layers suitable for treatment according to the present invention include isolation oxides, gate oxides, and various other oxide layers commonly used with semiconductor devices.
  • deuterium or a deuterium- containing material is directed onto the device by, for example, annealing in a deuterium containing atmosphere, and/or cleaning with a deuterium compound such as D 2 0, D 2 S0 4 , and DC1.
  • any hydrogen containing material used in VLSI fabrication can be replaced with corresponding deuterium containing material.
  • the stability of oxide layers is improved in the present invention because the bond energy of the Si-H and Si-OH bonds is increased by replacing the hydrogen atoms with deuterium atoms.
  • the Si-D and Si-OD bonds thus formed provide completed silicon dangling bonds that are less likely to break when exposed to electrical stresses. Therefore, the deuterium containing devices of the present invention have improved stability, quality, and reliability.
  • VLSI fabrication flows employ deuterium contained compounds in many or all of the fabrication steps that would normally employ hydrogen or a hydrogen containing compound.
  • a wet thermal oxidation step is performed with heavy water rather than normal water
  • an annealing step is conducted in a deuterium atmosphere rather than a hydrogen atmosphere
  • a polysilicon chemical vapor deposition step is performed with SiD 4 rather than silane, etc.
  • Devices of this invention will preferably have substantial numbers of Si-H and/or Si-OH bonds replaced with Si-D and/or Si-OD bonds.
  • Deuterium atoms represent a very small fraction of the atoms in naturally occurring hydrogen.
  • the ratio of deuterated to hydrogenated silicon bonds is substantially greater than the naturally occurring fraction of deuterium atoms. In most preferred embodiments the ratio of Si-D plus Si-OD bond to Si-H plus Si-OH bonds in the oxide and oxide- silicon interfaces will be greater than about 95:5.
  • Fig. 1 is a representation of a silicon-silicon dioxide interface having some desirable features of the present invention.
  • the present invention provides a method for producing semiconductor devices in which hydrogen-containing bonds in silicon dioxide are replaced with deuterium containing bonds. Specifically Si-H bonds are replaced with Si-D bonds and Si-OH bonds are replaced with Si-OD bonds. Because the deuterium containing bonds are less likely to break on exposure to electrical stresses, devices prepared according to this invention have various advantages over conventional devices. For example, they have more stable gate threshold voltage in MOS devices and better control over leakage currents in junction devices. The formation of Si-D and Si-OD bonds is accomplished in the present invention by contacting a silicon wafer with deuterium or a deuterium containing compound before, during, and/or after formation a device oxide layer.
  • deuterium refers to materials that include deuterium in a concentration above its naturally occurring level.
  • pure gaseous D 2 as well as a gaseous mixture of 50% H 2 and 50% D 2 qualify as “deuterium.”
  • any artificial gaseous mixture containing a ratio of D 2 to H 2 above the naturally occurring level constitutes “deuterium” as used herein.
  • the naturally occurring concentration of deuterium is about one part in 6000 parts of hydrogen.
  • deuterium containing compound is intended to refer to compositions containing deuterated compounds in a concentration above the naturally occurring level. Thus, a solution of 50% D 2 0 in H 2 0 would constitute a deuterium containing compound.
  • compositions containing DC1, D 2 S0 4 , SiD 4 are "deuterium containing compounds” so long as the deuterium containing compounds are present at a concentration greater than that of naturally occurring deuterium in hydrogen.
  • Silicon layer 10 may be, for example, a highly doped, conductive polysilicon gate contact or a single crystal silicon semiconductor.
  • the bulk oxide layer consists of infinitely linked Si0 4 tetrahedra with an occasional oxygen vacancy or other fault. Ideally, all silicon atoms at the interface are bonded to an oxygen atom associated with the oxide network. For example, at positions 8 and 22, silicon atoms on the surface of the silicon layer are bonded to oxygen atoms that are incorporated into Si0 tetrahedra. However, not all surface silicon atoms are bonded with the oxide layer.
  • Some silicon atoms at the interface have completed bonds with species other than the Si0 4 tetrahedra of the bulk oxide.
  • These bonding arrangements include Si-H and Si- OH groups shown at positions 14 and 24, respectively. As noted, these bonds result from contact of hydrogen or hydrogen containing compounds during the device fabrication steps. Some of them may have even been formed intentionally by hydrogen annealing to saturate dangling silicon bonds.
  • the bonding arrangements shown at positions 2 and 18 are favored for the present invention. At these positions, silicon atoms that would otherwise have dangling bonds are saturated by coupling with -0D and -D. These bonds are less likely than their hydrogen counterparts to break when subjected to electrical stresses. As shown below, the zero-point energy levels of deuterium containing bonds are lower than the corresponding hydrogen containing bonds and hence need a greater thermodyna ic driving force to break them.
  • the ionic product of D 2 0 (i.e. [D + ][0D ⁇ ]) is smaller by about an order of magnitude than the corresponding ionic product of H 2 0.
  • the ion product constant of D 2 0 is 1.1*10 -15 while the ion product constant for H 2 0 is 1.01*10 ⁇ 14 .
  • the present invention can be implemented throughout the VLSI fabrication procedure.
  • a typical fabrication procedure will include various doping, etching, annealing, deposition, cleaning, passivation, and oxidation steps.
  • deuterium or a deuterium containing compound can be used in its place. This is particularly important in those fabrication steps in which a permanent oxide layer is being formed or treated.
  • the method of this invention can be implemented, for example, by annealing in N 2 ambient with D 2 , by replacing HC1 and/or H 2 0 with DC1 and/or D 2 0 during cleaning, or by using deuterium containing compounds during chemical vapor deposition to form polysilicon layers.
  • deuterium or deuterium containing compounds having a mole fraction of near 1 are employed in fabrication steps.
  • lower concentrations of deuterated compounds may also be employed, but generally require a longer reaction or contact time to ensure formation of a substantial percentage of Si-D and/or Si-OD bounds.
  • annealing atmospheres of the present invention includes a deuterium mole fraction of greater than about 0.90, and more preferably greater than about 0.95. In especially preferred embodiments, the annealing atmosphere includes a deuterium mole fraction of greater than about 0.99.
  • the deuterium containing annealing atmosphere is preferably provided at a temperature of about 500°C and a pressure of about one atmosphere. These conditions are typically maintained for approximately 10 to 20 minutes. Of course, other acceptable conditions will be apparent to those of skill in the art.
  • the semiconductor devices fabricated according to the present invention are preferably cleaned with a deuterium containing compound.
  • preferred cleaning compounds include D 2 0, D 2 S0 4 , CDC1 3 , and DC1.
  • any other common hydrogen containing cleaning compound can be replaced with the corresponding deuterium containing compound.
  • Wet thermal oxidation of the silicon wafer can be conducted using heavy water. A suitable process is conducted by bubbling a carrier gas such as oxygen, nitrogen, or argon through a heavy water bath.
  • Some of the heavy water will be vaporized in the process and transported with the carrier gas to the silicon surface where an oxide layer is formed.
  • deuterium and oxygen gases are passed through a diffusion tube to form heavy water that is used to produce the oxide film.
  • some of the deuterium atoms from the heavy water will bond with surface silicon atoms. Although such bonds are less preferred than Si-O bonds with the bulk oxide, they are an inevitable side product of any wet oxidation processes. Because heavy - rather than normal - water is employed, these less preferred bonds will be satisfied with deuterium or deuterium oxide groups.
  • silanes such as SiH and Si(C 6 H 5 ) 3 H during chemical vapor deposition steps are another source of hydrogen in normal VLSI fabrication procedures. If deuterated silanes are substituted for their hydrogen counterparts, the density of Si-H and Si-OH bonds will be further reduced. In general, any of the organosilicon compounds widely used in VLSI technology can be replaced with the corresponding deuterium analogs.
  • the semiconductor devices of this invention will have at this interface a ratio of Si-OD plus Si-D bonds to Si-OH plus Si-H bonds that is substantially greater than ratio of naturally occurring deuterium to hydrogen. Similar ratios will be found in the bulk oxide of the devices. Thus, the ratio will be substantially greater than 1:6000 deuterated to hydrogenated bonds at the interface and in the bulk oxide. In preferred embodiments, the ratio of deuterated to hydrogenated silicon bonds will be greater than about 95:5, and in more preferred embodiments, greater than about 99:1.
  • Especially preferred devices of this invention are MOS transistors in which the gate oxide- silicon layer contains additional deuterium containing bonds.
  • other devices such as bipolar junction transistors are also within the purview of this invention.
  • the above description is intended to be illustrative and not restrictive. Many variations of the invention will become apparent to those of skill in the art upon review of this disclosure.
  • the invention has been illustrated with regard to specific deuterium containing compounds, it should be clear that a wide variety of deuterium containing compounds may be used herein without departing from the scope of the inventions herein. The scope of the invention should, therefore be determined not with reference to the above description, but instead should be determined with reference to the appended claims along with their full scope of equivalents.

Abstract

A method is provided in which a silicon wafer is contacted with a deuterium containing material to form Si-D and Si-OD bonds on a silicon surface at an interface with a silicon dioxide layer. An MOS device is formed by employing deuterium containing compounds at various stages of the fabrication procedure. After an MOS gate oxide is formed, the wafer is annealed in a deuterium containing atmosphere and a polysilicon layer is formed by chemical vapor deposition employing deuterium containing compounds. The device is subsequently cleaned with a deuterium containing compound such as D2O, D2SO4, and DCl.

Description

SEMICONDUCTOR DEVICE COMPRISING DEUTERIUM ATOMS
BACKGROUND OF THE INVENTION The present invention relates to silicon-based electronic devices and methods of fabricating them. In particular, the present invention provides improved VLSI fabrication methods that minimize some of the detrimental effects associated with hydrogen in oxides.
Oxide layers are used to isolate devices and device elements on an integrated circuit. They are also used to control leakage currents in junction devices and act as stable gate oxides in field effect devices.
Many semiconductor device elements rely on high quality silicon dioxide layers and the bonds they provide with adjacent surfaces. For example, high quality gate oxide layers are critical to the performance of MOSFET devices. Unfortunately, the performance of many silicon devices is limited by the oxide layer and the quality of the interface it provides with adjacent surfaces. In MOS devices, the problematic interfaces include the gate conductor (usually polysilicon) -gate oxide interfaces as well as the gate oxide-semiconductor interface. See Sah, Solid-state Electronics (1990) 3JL:147-167, incorporated herein by reference for all purposes. Poor quality oxide is evidenced by such effects as unstable threshold voltages in MOS devices, leakage currents at junctions, high 1/f noise, high sensitivity to hot carrier degradation, high sensitivity to ESD (Electrical Static Discharge) or EOS (Electrical Over Stress) , irradiation immunity, etc. These problems can result from a variety of physical factors, including increased numbers of surface states (at the silicon surfaces) caused by uncompleted or "dangling" silicon bonds, increased fixed charge on the silicon/silicon dioxide interface, and vacancies in the bulk oxide. The increased number of surface states can be populated by electrons that impose a potential on the silica/silicon interface. The fixed charge also contributes to the electrical fields at the interface. if the fixed charge and surface state densities become too great, the threshold voltage required for circuit operation becomes impractical.
An important property of high quality silicon dioxide is its ability to reduce the surface state density of silicon by tying up some of the dangling bonds. In addition, high quality silicon dioxide should provide good control over interface traps and fixed charge. Unfortunately, even the best oxide layers leave a large number of dangling bonds at the silicon-oxide interfaces. Some of these bonds can be completed by annealing the oxidized silicon wafer in hydrogen or a mixture of hydrogen and nitrogen. For example, wafers are sometimes heated in hydrogen at 450°C for approximately 15 minutes to form silicon-hydrogen (Si-H) bonds at the interface, thus reducing the density of surface states. A detailed discussion of the role hydrogen plays in failure mechanisms is provided in the review by CT. Sah, "Models and Experiments on Degradation of Oxidized Silicon", Solid-state Electronics (1990) 22:147-167, previously incorporated by reference.
Hydrogen can also be introduced unintentionally by a variety of standard fabrication processes including thermal oxidation of the wafer, post-oxidation treatments of the wafer, and ambient oxidation of the silicon surface. All of these processes result in the formation of Si-H and Si-OH bonds. A detailed discussion of the sources of hydrogen in silica films on silicon is provided in Revesz, J. Electrochem. Soc. (1979) 126: 122-130, which is incorporated herein by reference for all purposes. Some hydrogen is introduced in the form of water present in materials used to fabricate semiconductor devices. In wet thermal oxidation processes water is purposely employed to form oxides, usually isolation oxides. These processes are rapid, but result in a somewhat porous oxide film. The detailed nature of the reaction of silicon with water vapor to form silica is somewhat complex and described in S. Gandhi, VLSI Fabrication Principles, Silicon and Gallium Arsenide , John yle & Sons (1983), chpr. 7, which is incorporated herein by reference for all purposes. Higher quality gate oxides in MOS devices may be formed by a "dry" oxygen process in which water is purposely excluded. Even so, some "contaminating" water is usually present, resulting in the formation of Si-H and Si-OH bonds. For example, a commonly used process of forming gate oxide employs trichloroethane at 900°C (near the wafer surface) according to the following reaction:
8C2H3C13 + 1902 -→ 12 HC1 + 6 Cl2 + 6H20 + 16 C02
Hydrogen chloride gas reacts under comparable conditions as follows:
8 HC1 + 02 —* 4HC1 + 2C12 + 2H20.
As seen, these processes produce water as a byproduct. Hydrogen can also be introduced by deposition of polysilicon from SiH4 or another silane. Even cleaning with hydrogen-containing agents such as water, hydrochloric acid, and sulfuric acid can introduce hydrogen. Finally, oxidation of silicon surfaces by simple exposure to ambient conditions produces an oxide layer containing hydrogen.
As noted above the introduction of hydrogen has the beneficial result of tying up some dangling bonds at the silicon/silica interface. Unfortunately, the resulting Si-H bonds (as well as other compensating bonds such as Si-OH) are weaker than Si-0 bonds formed with the bulk oxide layer. During electrical stresses, the density of silicon dangling bonding is increased because Si-H and Si-OH bonds break and the resulting hydrogen species migrate away.
One source of such electrical stress is electrons having energies over 3.2eV which surmount the barrier between silicon and silicon dioxide. These "hot" electrons (or the resulting holes) can become trapped in the silica layer and break some of the silicon-hydrogen and silicon-OH bonds at the silicon and silicon dioxide interface. Hot electrons are especially prevalent during avalanche breakdown of a P-N junction, since the energy of avalanching carriers has a mean value of about 3eV. Hot electrons can also be produced in the channel region of MOS transistors, resulting in a change in the threshold voltage.
Higher quality silicon dioxide layers having reduced numbers of dangling and/or weak Si-H bonds are needed to improve the performance of many semiconductor devices. A concomitant new method of fabricating such silicon dioxide layers is likewise needed.
SUMMARY OF THE INVENTION The present invention provides a method in which a silicon wafer is contacted with a deuterium containing material to form Si-D and Si-OD bonds in a silicon dioxide layer and on a silicon surface at an interface with the silicon dioxide layer. Typical silicon dioxide layers suitable for treatment according to the present invention include isolation oxides, gate oxides, and various other oxide layers commonly used with semiconductor devices. According to the invention, deuterium or a deuterium- containing material is directed onto the device by, for example, annealing in a deuterium containing atmosphere, and/or cleaning with a deuterium compound such as D20, D2S04, and DC1. In general, any hydrogen containing material used in VLSI fabrication can be replaced with corresponding deuterium containing material. The stability of oxide layers is improved in the present invention because the bond energy of the Si-H and Si-OH bonds is increased by replacing the hydrogen atoms with deuterium atoms. The Si-D and Si-OD bonds thus formed provide completed silicon dangling bonds that are less likely to break when exposed to electrical stresses. Therefore, the deuterium containing devices of the present invention have improved stability, quality, and reliability.
In one aspect of the present invention, VLSI fabrication flows employ deuterium contained compounds in many or all of the fabrication steps that would normally employ hydrogen or a hydrogen containing compound. Thus, for example, a wet thermal oxidation step is performed with heavy water rather than normal water, an annealing step is conducted in a deuterium atmosphere rather than a hydrogen atmosphere, a polysilicon chemical vapor deposition step is performed with SiD4 rather than silane, etc. Devices of this invention will preferably have substantial numbers of Si-H and/or Si-OH bonds replaced with Si-D and/or Si-OD bonds. Deuterium atoms represent a very small fraction of the atoms in naturally occurring hydrogen. In preferred embodiments of this invention the ratio of deuterated to hydrogenated silicon bonds is substantially greater than the naturally occurring fraction of deuterium atoms. In most preferred embodiments the ratio of Si-D plus Si-OD bond to Si-H plus Si-OH bonds in the oxide and oxide- silicon interfaces will be greater than about 95:5. A further understanding of the nature and advantages of the invention herein may be realized by reference to the remaining portions of the specification and the attached drawing.
BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a representation of a silicon-silicon dioxide interface having some desirable features of the present invention.
DESCRIPTION OF THE SPECIFIC EMBODIMENTS
The present invention provides a method for producing semiconductor devices in which hydrogen-containing bonds in silicon dioxide are replaced with deuterium containing bonds. Specifically Si-H bonds are replaced with Si-D bonds and Si-OH bonds are replaced with Si-OD bonds. Because the deuterium containing bonds are less likely to break on exposure to electrical stresses, devices prepared according to this invention have various advantages over conventional devices. For example, they have more stable gate threshold voltage in MOS devices and better control over leakage currents in junction devices. The formation of Si-D and Si-OD bonds is accomplished in the present invention by contacting a silicon wafer with deuterium or a deuterium containing compound before, during, and/or after formation a device oxide layer. As used herein, the expression "deuterium" refers to materials that include deuterium in a concentration above its naturally occurring level. Thus, for example, pure gaseous D2 as well as a gaseous mixture of 50% H2 and 50% D2 qualify as "deuterium." In fact, any artificial gaseous mixture containing a ratio of D2 to H2 above the naturally occurring level constitutes "deuterium" as used herein. The naturally occurring concentration of deuterium is about one part in 6000 parts of hydrogen.
The expression "deuterium containing compound" is intended to refer to compositions containing deuterated compounds in a concentration above the naturally occurring level. Thus, a solution of 50% D20 in H20 would constitute a deuterium containing compound. Likewise, compositions containing DC1, D2S04, SiD4 are "deuterium containing compounds" so long as the deuterium containing compounds are present at a concentration greater than that of naturally occurring deuterium in hydrogen.
Referring now to Fig. 1, an interface region between a silicon layer 10 and a silicon dioxide layer 12 is schematically represented. Silicon layer 10 may be, for example, a highly doped, conductive polysilicon gate contact or a single crystal silicon semiconductor. The bulk oxide layer consists of infinitely linked Si04 tetrahedra with an occasional oxygen vacancy or other fault. Ideally, all silicon atoms at the interface are bonded to an oxygen atom associated with the oxide network. For example, at positions 8 and 22, silicon atoms on the surface of the silicon layer are bonded to oxygen atoms that are incorporated into Si0 tetrahedra. However, not all surface silicon atoms are bonded with the oxide layer. For example, at positions 6 and 16, surface silicon atoms are displayed with dangling bonds. These situations are undesired because of the extra surface states associated with uncompleted silicon bonds. At position 6, the oxide layer oxygen atom nearest to the silicon surface is incorporated into two Si04 tetrahedra, while at position 16, the nearest oxygen atom is incorporated into one Si04 tetrahedra and bonded to one deuterium atom.
Some silicon atoms at the interface have completed bonds with species other than the Si04 tetrahedra of the bulk oxide. These bonding arrangements include Si-H and Si- OH groups shown at positions 14 and 24, respectively. As noted, these bonds result from contact of hydrogen or hydrogen containing compounds during the device fabrication steps. Some of them may have even been formed intentionally by hydrogen annealing to saturate dangling silicon bonds. The bonding arrangements shown at positions 2 and 18 are favored for the present invention. At these positions, silicon atoms that would otherwise have dangling bonds are saturated by coupling with -0D and -D. These bonds are less likely than their hydrogen counterparts to break when subjected to electrical stresses. As shown below, the zero-point energy levels of deuterium containing bonds are lower than the corresponding hydrogen containing bonds and hence need a greater thermodyna ic driving force to break them.
Si-H - 71.5 Kcal/mole Si-D - 72.3 Kcal/mole, O-H - 102.2 Kcal/mole O-D - 104.3 Kcal/mole.
(See, CRC Handbook of Chemistry and Physics, 64th edition, 1983-1984; CRC Press Incorporation, Boca Raton, Florida, p F176-179. )
Further, the kinetic isotope effect in the chemical reactions requires that deuterium containing bonds break more slowly than the corresponding hydrogen containing bonds. The rate constant of chemical reactions involving important deuterium-containing molecules (Kd) is smaller than for hydrogen-containing molecules (Kh) as shown.
Kd/Kh = 0.75 - 0.85 for triphenylsilane, Kd/Kh = 0.4 for chloroform, Kd/Kh = 0.5 for chloride.
(See, L. Melander, Isotope Effects on Reaction Rates, The Ronald Press Company, N.Y., 1960, which is incorporated herein by reference for all purposes)
In addition, the ionic product of D20 (i.e. [D+][0D~]) is smaller by about an order of magnitude than the corresponding ionic product of H20. Thus, fewer reactive ions are present in heavy water than in normal water. By replacing normal water with heavy water in processing steps such as thermal oxide formation and cleaning, the potential for chemical reaction on oxide surface is decreased. The ion product constant of D20 is 1.1*10-15 while the ion product constant for H20 is 1.01*10~14. (See, Isotope Effects in Chemical Reactions, Edited by C.J. Collins and S. Barman, Van Nostrand Reinhold Company, N.Y., 1970, which is incorporated herein by reference for all purposes) . The present invention can be implemented throughout the VLSI fabrication procedure. A typical fabrication procedure will include various doping, etching, annealing, deposition, cleaning, passivation, and oxidation steps. In each instance in which hydrogen or a hydrogen containing compound is employed, deuterium or a deuterium containing compound can be used in its place. This is particularly important in those fabrication steps in which a permanent oxide layer is being formed or treated. The method of this invention can be implemented, for example, by annealing in N2 ambient with D2, by replacing HC1 and/or H20 with DC1 and/or D20 during cleaning, or by using deuterium containing compounds during chemical vapor deposition to form polysilicon layers. Preferably, deuterium or deuterium containing compounds having a mole fraction of near 1 (for the deuterated versions) are employed in fabrication steps. However, lower concentrations of deuterated compounds may also be employed, but generally require a longer reaction or contact time to ensure formation of a substantial percentage of Si-D and/or Si-OD bounds. Because deuterated bonds are more stable than their hydrogen-containing counterparts, they ultimately supplant some hydrogenated bounds during long exposure to deuterium containing compounds. Preferred annealing atmospheres of the present invention includes a deuterium mole fraction of greater than about 0.90, and more preferably greater than about 0.95. In especially preferred embodiments, the annealing atmosphere includes a deuterium mole fraction of greater than about 0.99. The deuterium containing annealing atmosphere is preferably provided at a temperature of about 500°C and a pressure of about one atmosphere. These conditions are typically maintained for approximately 10 to 20 minutes. Of course, other acceptable conditions will be apparent to those of skill in the art.
During cleaning of silicon wafers, some molecules of the cleaning agent are incorporated into the device structure. If the cleaning agent includes hydrogen in its molecular structure, some Si-H and Si-OH bonds form. To promote formation of deuterium containing bonds over hydrogen containing bonds, the semiconductor devices fabricated according to the present invention are preferably cleaned with a deuterium containing compound. Thus, preferred cleaning compounds include D20, D2S04, CDC13, and DC1. Of course, any other common hydrogen containing cleaning compound can be replaced with the corresponding deuterium containing compound. Wet thermal oxidation of the silicon wafer can be conducted using heavy water. A suitable process is conducted by bubbling a carrier gas such as oxygen, nitrogen, or argon through a heavy water bath. Some of the heavy water will be vaporized in the process and transported with the carrier gas to the silicon surface where an oxide layer is formed. In some alternative thermal oxidation methods, deuterium and oxygen gases are passed through a diffusion tube to form heavy water that is used to produce the oxide film. In either method, some of the deuterium atoms from the heavy water will bond with surface silicon atoms. Although such bonds are less preferred than Si-O bonds with the bulk oxide, they are an inevitable side product of any wet oxidation processes. Because heavy - rather than normal - water is employed, these less preferred bonds will be satisfied with deuterium or deuterium oxide groups.
The use of silanes such as SiH and Si(C6H5)3H during chemical vapor deposition steps is another source of hydrogen in normal VLSI fabrication procedures. If deuterated silanes are substituted for their hydrogen counterparts, the density of Si-H and Si-OH bonds will be further reduced. In general, any of the organosilicon compounds widely used in VLSI technology can be replaced with the corresponding deuterium analogs.
In general, electronic devices formed according to the above processes will have an increased number of Si-OD and Si-D bonds in comparison with devices formed using conventional processes. The regions where the deuterated bonds provide the greatest benefit in terms of device performance is at the interface of silicon-silicon dioxide layers. Thus, the semiconductor devices of this invention will have at this interface a ratio of Si-OD plus Si-D bonds to Si-OH plus Si-H bonds that is substantially greater than ratio of naturally occurring deuterium to hydrogen. Similar ratios will be found in the bulk oxide of the devices. Thus, the ratio will be substantially greater than 1:6000 deuterated to hydrogenated bonds at the interface and in the bulk oxide. In preferred embodiments, the ratio of deuterated to hydrogenated silicon bonds will be greater than about 95:5, and in more preferred embodiments, greater than about 99:1. Especially preferred devices of this invention are MOS transistors in which the gate oxide- silicon layer contains additional deuterium containing bonds. However, other devices such as bipolar junction transistors are also within the purview of this invention. It is to be understood that the above description is intended to be illustrative and not restrictive. Many variations of the invention will become apparent to those of skill in the art upon review of this disclosure. For example, while the invention has been illustrated with regard to specific deuterium containing compounds, it should be clear that a wide variety of deuterium containing compounds may be used herein without departing from the scope of the inventions herein. The scope of the invention should, therefore be determined not with reference to the above description, but instead should be determined with reference to the appended claims along with their full scope of equivalents.

Claims

WHAT IS CLAIMED IS:
1. A semiconductor device comprising at least one silicon dioxide layer and an interface between the silicon dioxide layer and a silicon surface, the silicon dioxide layer and the interface having Si-OD and Si-D bonds; wherein the ratio of Si-OD plus Si-D bonds to Si-OH plus Si- H bonds is substantially greater than ratio of naturally occurring deuterium to hydrogen.
2. The semiconductor device of claim 1 wherein the ratio of Si-OD plus Si-D bonds to Si-OH plus Si-H bonds is greater than about 95:5.
3. The semiconductor device of claim 2 wherein the ratio of Si-OD plus Si-D bonds to Si-OH plus Si-H bonds is greater than about 99:1.
4. The semiconductor device of claim 1 wherein the silicon surface is on a conductive polysilicon gate contact of an MOS device.
5. An MOS device comprising a gate oxide including silicon dioxide and an interface between the gate oxide and a silicon surface, the silicon dioxide and the interface having Si-OD and Si-D bonds; wherein the ratio of Si-OD plus Si-D bonds to Si-OH plus Si-H bonds is substantially greater than ratio of naturally occurring deuterium to hydrogen.
6. The MOS device of claim 5 wherein the ratio of Si-OD plus Si-D bonds to Si-OH plus Si-H bonds is greater than about 95:5.
7. The MOS device of claim 6 wherein the ratio of Si-OD plus Si-D bonds to Si-OH plus Si-H bonds is greater than about 99.1.
8. The MOS device of claim 5 wherein the silicon surface is on a conductive polysilicon gate contact.
9. The MOS device of claim 5 wherein the silicon surface is on a semiconducting silicon surface.
10. A method of fabricating a semiconductor device containing at least one silicon dioxide layer and a silicon surface having an interface with the silicon dioxide layer, the method comprising: directing a deuterium containing compound onto a silicon wafer; and forming Si-D bonds at the silicon and silicon dioxide interface.
11. The method of claim 10 wherein the step of contacting is a cleaning operation and wherein the deuterium containing compound is a cleaning agent selected from the group consisting of DC1, D2S04, CDC13, and D20.
12. The method of claim 10 further comprising a step of forming a gate oxide.
13. The method of claim 10 wherein the step of contacting the silicon wafer is a thermal oxidation step, and the deuterium containing compound is heavy water vapor, D20.
14. The method of claim 10 wherein the step of contacting the silicon wafer with a deuterium containing compound is an annealing step, and the deuterium containing compound is deuterium gas.
15. The method of claim 10 wherein the step of contacting the silicon wafer with a deuterium containing compound is a chemical vapor deposition step.
16. A method of fabricating a silicon semiconductor device, the method comprising annealing the semiconductor wafer in an annealing atmosphere including deuterium.
17. The method of claim 16 wherein the annealing atmosphere includes deuterium mole fraction of at least about 0.95.
18. The method of claim 16 wherein the annealing atmosphere includes nitrogen.
19. The method of claim 16 further comprising steps of forming a silicon dioxide layer and doping the semiconductor wafer.
20. The method of claim 16 wherein the atmosphere is substantially free of hydrogen.
21. A method of cleaning a semiconductor device, the method comprising contacting a silicon wafer containing at least one silicon dioxide layer with a deuterium containing cleaning compound.
22. The method of claim 21 further comprising the steps of doping the silicon wafer and annealing the wafer in an atmosphere including deuterium gas.
23. The method of claim 21 further comprising a step of forming a gate oxide.
24. The method of claim 21 wherein the deuterium containing cleaning compound is selected from the group consisting of D20, D2S04, CDC13, and DC1.
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