WO1993013474A1

WO1993013474A1 - Data-acquisition circuit with a central processor unit and an analogue/digital converter

Info

Publication number: WO1993013474A1
Application number: PCT/DE1992/001051
Authority: WO
Inventors: Bernhard Mattes; Hartmut Schumacher; Norbert Crispin; Werner Nitschke; Wolfgang Drobny; Otto Karl
Original assignee: Robert Bosch Gmbh
Priority date: 1991-12-20
Filing date: 1992-12-16
Publication date: 1993-07-08
Also published as: DE4242436C2; DE4242436A1

Abstract

The invention concerns an electronic control device for, in particular, motor-vehicle applications and with a single-chip circuit (2), the device comprising a resistor network (R1, R2, R3, R4) connected to digital output terminals (01, 02). This makes multiple use of at least one input terminal (A1, A8) of the circuit (2) possible.

Description

Data acquisition circuit with a central computer unit and an on digital wall! he

State of the art

A large number of analog signals are often to be recorded and processed in electronic control devices, in particular for motor vehicle applications. So-called single-chip circuits (MCU) are often used for signal processing, which usually only have a maximum of eight analog-digital input channels, which are queried internally in a multiplexed manner. The computing effort for real-time polling of the analog inputs is very high for the central processing unit (CPU) of the circuit. If more than eight independent analog signals are to be recorded and processed in connection with certain applications, the user is faced with the decision to use a further single-chip circuit or a further analog multiplexer without the larger number then available to be able to take full advantage of input connections. Such a solution also has the disadvantage that the additional components require additional space and that the additional components require additional energy. Particularly when the components are packed very densely, this can also cause problems in dissipating the power loss. Advantages of the invention

He trained according to the electronic circuit, as well as the electronic control unit equipped with this circuit, offer the particular advantage that additional input connections for analog signals are available with comparatively little circuit complexity, without the need to use additional power-consuming electronic modules. This leads to a particularly economical circuit design, which is also space-saving. In addition, the use of additional heat-generating components is unnecessary. Furthermore, the real-time load on the central processing unit when polling the analog inputs can be considerably reduced.

In a first exemplary embodiment of the invention, the electronic circuit comprises, in addition to a central processing unit and an A / D converter (Δnalog / digital converter), internal switching means 22 for controlling external switching means which influence the analog input lines.

In a first exemplary embodiment of an electronic control device equipped with this electronic circuit, an external multiplex device is provided, which is connected on the input side to a multiplicity of analog lines and on the output side to an analog input line of the electronic circuit, the multiplex device being controllable by the internal switching means.

In a second exemplary embodiment of an electronic control device, at least one analog / digital input connection Ai, i-1-8 of the circuit is connected via a resistor network to a plurality of controllable digital output connections of the switching means 22, the digital output connections being such it is controllable that a plurality of input connections can be connected in succession to the at least one input connection for analog signals. For this purpose, the resistance network has at least two branches connected to the Ai, each branch in turn consisting of a series connection of at least two resistors. One controllable digital output of the circuit is connected to one tap of each of these branches of the resistance network.

In a further advantageous exemplary embodiment of an electronic control device, a corresponding number of branches of the resistance network connected to an analog / digital input Ai, (i-1-8), the taps of which are each connected to a digitally controllable output connection of the processor, make them larger Number of input connections for analog signals provided.

drawing

Embodiments of the invention are explained in more detail with reference to the drawing. 1 shows a first exemplary embodiment of an electronic circuit with internal switching means, FIG. 2 shows a first exemplary embodiment of an electronic device equipped with this circuit, FIG. 3 and FIG. 4 shows exemplary embodiments of electronic devices with resistance networks connected on the input side.

Description of the embodiments

FIG. 2 shows a schematically illustrated electronic circuit 2 which, in addition to a conventional central processing unit 20 and an analog / digital converter (A / D converter) 21, additionally comprises switching means 22 which can be controlled by the central processing unit 20. Externally arranged circuit parts 23, 24 can be controlled via the switching means 22. For this purpose, the switching means 22 connected to the circuit part 23 via a plurality of output lines 01, 02, 03. Within the circuit 2, the switching means 22 are still connected to the central processing unit 20 and the A / D converter. In particular, the switching means 22 serves to influence input lines A1 to A8 carrying analog signals, as will be explained in more detail with reference to the following exemplary embodiments.

FIG. 2 shows a first exemplary embodiment of an electronic control unit 1 using the electronic circuit 2 explained with reference to FIG. 1, essentially in the form of a block diagram. The electronic control unit 1 initially comprises the electronic circuit 2, which in turn comprises a central processing unit 20, an A / D converter 21, and switching means

22 has. Output lines 01 to 03 of the switching means 22 of the electronic circuit 2 are connected to a multiplex device 23 arranged externally, ie outside the electronic circuit 2. The multiplex device is on the output side

23 connected via a line A1 to: an input connection of the A / D converter 21 arranged within the electronic circuit 2. On the input side, the multiplexing device 23 is connected via eight connecting lines A01 to A08 to output connections of a peripheral circuit 24 which supplies the multiplexing device 23 with analog signals via the connecting lines A01 to A08. Further output connections of the peripheral circuit 24 are connected via connecting lines A2 to A8 to corresponding input connections of the A / D converter 21 arranged in the electronic circuit 2. By means of the circuit arrangement shown in FIG. 2, in addition to the analog signals present on the connecting lines A2 to A8, further analog signals present on the connecting lines A01 to A08 can be detected, in that these analog signals are staggered in time by the multiplexing device 23 via the connection arranged on the output side. Line A1 with the corresponding input connection of the internal A / D converter 21 are connected. For this purpose, the multiplexing device 23 is controlled by corresponding signals from the switching means 22 via the connecting lines 01 to 03. Although the internally arranged A / D converter 21 has a total of only eight input channels A1 to A8, further analog signals supplied on lines A01 to A08 can be evaluated in this way. This circuit arrangement relieves the central processing unit 20 of the electronic circuit 2 in real time. If the settling times of the supplied analog signals are to be waited for after switching on the multiplexing device 23 until the actual signal conversion of the analog to a digital signal begins, this can be effected by appropriate activation of the switching means 22. Settling times can arise, for example, from the charging of capacitances provided for interference suppression or from switching processes of the multiplexing device 23. The settling time to be waited for can expediently be predetermined by the circuit structure of the control means 22 or can be flexibly changed in software via the central computing unit 20, for example by influencing a corresponding control register. The greatest advantage of such a circuit arrangement arises, for example, in the A / D conversion of a group of input signals on, for example, four successive or adjacent A / D channels, as will be shown below using an example. The central computing unit 20 merely gives the switching means 22 the command to convert, for example, a group of four analog signals into corresponding digital signals. After issuing this command, the central processing unit 20 can initially turn to other tasks and is therefore not burdened with the conversion of the analog signals into digital signals. After receipt of the conversion command issued by the central processing unit 20, the switching means 22 first switch the multiplexing device 23 to channel A01 and then wait for a first settling time T01 before the A / D converter 21 begins the conversion of the analog signal present on the output side of the multiplexing device 23 on the connecting line A01 into a corresponding digital signal. The switching means 22 then wait until the end of the signal conversion. The result of the signal conversion is saved as result 01.

In the next step, the switching means 22 control the multiplexing device 23 in such a way that it switches to channel A02 and the analog signal present at this input channel leads to the connection line A01 on the output side. Again, a necessary settling time T02 is first waited until the signal conversion is carried out by the A / D converter 21. Again, the switching means 22 wait for the signal conversion and save the result 02 of this signal conversion. The switching means 22 then control the multiplexing device 23 in such a way that the analog signal present on the input line A03 is connected to the output-side connecting line A1. Possibly. a third settling time T03 is waited until the A / D converter 21 begins the signal conversion. The switching means 22 wait for the end of the signal conversion and save the result 03 of the signal conversion. Finally, in a last step, a corresponding control signal from the switching means 22 controls the multiplexing device 23 in such a way that the analog signal present on the connection line A04 is connected to the output-side connection line AI. After waiting for a settling time T04, the signal conversion is again carried out by the A / D converter 21, while the switching means 22 wait and save the result of the signal conversion as the result 04. Subsequently, the switching means 22 pass on a "group conversion finished" signal to the central processing unit 20, which can now read the result of the signal conversion. FIG. 3 shows a schematically illustrated electronic control device 1, which comprises a single-chip circuit (MCU) 2. The circuit 2 has eight input connections A1 to A8 for analog signals and at least two digitally controllable output connections 01, 02. The input connections for analog signals A1 to A8 lead to an A / D converter (analog / digital converter) 21, which converts analog signals present at the input connections A1 to A8 into digital signals. A resistance network consisting of the resistors R1, R2, R3, R4 is connected to the input terminal A1 of the circuit 2. The resistance network consists of two branches connected in parallel, each of which comprises a series connection of two resistors R1, R4 or R2, R3. One tap of the series connection of the resistors R1, R4 or R2, R3 is connected to a digitally controllable output connection 01 or 02 of the switching means 22 of the circuit. The unconnected connections of the resistors R1, R2 are available as input connections A11 or AI2 for input voltages Uli, U12. In this exemplary embodiment, a total of nine input connections A11, AI2 and A2 to A8 are available for analog input signals. The operation of this embodiment can be described as follows. First of all, an analog input signal U11 lying at the input connection All is to be detected. For this purpose, the digitally controllable output connection 02 of the switching means 22 of the circuit 2 is to be controlled such that it is at zero potential, that is to say it is conductively connected to the ground connection. The digitally controllable output connection 01 of the switching means 22 of the circuit 2, however, remains in the tri-state, ie in a high-resistance state. As a result, the analog input signal U11 is fed to the input terminal A1 of the circuit 2 via the resistance network. The further analog input signal U11 possibly present at the input connection A12 has no influence on the input signal U11, since the output connection 02 of the circuit 2, as already mentioned above, is connected to the ground connection. Alternatively, should this be the case with the Analog input signal U12 applied to input terminal A12 is detected and evaluated, the digitally controllable output terminal 01 of the switching means 22 is switched to ground, while the output terminal 02 remains in the tristate state, that is to say in a high-resistance state. As a result, the analog input signal U12 is fed to the input terminal A1 of the circuit 2 via the resistance network. The analog input signal U11 possibly present at the input connection A1 does not impair the input signal U12, since the digitally controllable output connection 01 of the circuit 2 is connected to ground.

FIG. 4 shows a further exemplary embodiment of the invention, in which, using a simple resistance network with resistors R1 to RN, R21 to R2N, an input connection A1 for analog input signals of the circuit 2 can be used N times. This means that a total of N analog input signals U11 to U1N can be applied to this input connection A1. The resistor network R1 to R2N consists of a total of N branches connected to A1, which in turn consist of a series connection of two resistors R1 and R21, R2 and R22 to RN and R2N. Each connection point of the two resistors of each series circuit is connected to a digitally controllable output connection 0, 02 to ON of the switching means 22 of the circuit 2.

The operation of the embodiment shown in Figure 4 can be described as follows. First of all, the analog input signal U11 applied to the input connection A11 is to be detected and evaluated. For this purpose, all digitally controllable output connections 02 to ON of the switching means 22 are to be controlled in such a way that they are at zero potential, that is to say they are connected to the ground connection. The digitally controllable output connection 01, on the other hand, should remain in the tristate state, that is to say in a high-ohmic state. Thereby the analog signal Uli present at the input connection A11 is fed to the input connection A1 of the circuit 2 via the resistance network. The analog input signals U12 to U1N possibly present at the further input connections A12 to A1N do not impair the input signal U11 to be detected and evaluated, since the digitally controllable output connections 02 to ON of the circuit 2 are connected to ground. Corresponding considerations apply to the acquisition and evaluation of the analog input signals U12 to U1N.

In a particularly advantageous embodiment, the resistors R1, R2, R3, R4 forming the resistance network in FIG. 1 are dimensioned such that R1 and R2 as well as R3 and R4 receive the same resistance value. In a practical dimensioning example, the resistors R1 and R2 have a value of approximately 10 Kohm and the resistors R3 and R4 have a value of approximately 45 Kohm.

In the exemplary embodiment according to FIG. 2, the resistors R1, R2 ... RN of the resistor network can expediently also have the same resistance value, for example about 10 Kohm, while the resistors R21 to R2N also have the same value, for example 100 Kohm.

The simpler exemplary embodiment according to FIG. 3 is particularly suitable for the detection of analog input signals U11, U12 with lower demands on the resolution of the two channels leading to the input connections A11, A12. The resolution of the A / D converter 21 of the circuit 2 is reduced accordingly by the best transfer factor 0.5 when the two channels (input connections A11, A12) are treated equally. This can be greatly improved for a larger number of analog input signals to be recorded if the connection points of the resistors of the resistor network are provided by protective elements, such as, for example Zener diodes, which are arranged externally or in the circuit 2, are protected. The division factor of the resistance network according to FIG. 3 could then be selected such that the range of values to be recorded for the analog input signals U11, U12 corresponds to the entire voltage reference range of the A / D converter.

A further improvement in the accuracy of the evaluation of the detected analog input signals can be achieved by applying a calibration voltage to the corresponding input connections, for example A11, AI2 according to FIG. 3, during the course of production of the electronic control unit 1, a corresponding adjustment factor then being achieved an interface is written from the outside into an EEPROM arranged in the circuit 2.

Furthermore, the resolution of the two channels opening at A11, A12 (FIG. 3) can be greatly improved if the reference voltage of the A / D converter 21 of the circuit 2 is reduced, for example by the controllable one, for measuring U11, U12 Digital output Or. In the conductive state, this sets the resistance network of Ra, Rb in FIG. 1 on one side of Rb to zero potential (ground), as a result of which the reference voltage Uref of

Circuit from e.g. Ustab to Ustab * = Rb = -

Ra + Rb is reduced.

This increases the resolution by the reciprocal factor ^Ra * ^~ ^ ^D

Rb

For the measurements on A2 to A8, the output Or remains in the tristate, i.e. H. high-resistance state, which means that Uref = Ustab. This previously described method can also be used in the exemplary embodiment according to FIG. 4.

Claims

Expectations

1. Electronic circuit (2) with a central processing unit (20) and with an analog / digital converter (21), characterized gekenn¬ characterized in that the circuit (2) comprises switching means (22) through which the analog / digital -Converters (21) feedable analog signals are controllable.

2. Electronic control device with an electronic circuit according to claim 1, characterized in that it comprises a multiplexing device (23) which can be controlled by the switching means (22) and which, depending on the control by the switching means (22), has at least one of a plurality of analog signals applied to the input at least one Input connection of the analog / digital converter (21) feeds.

3. Electronic control device with an electronic circuit according to claim 1, characterized in that at least one input connection (A1, A2 ... A8) of the circuit (2) via a resistor network (R1 to R3 or R1 to R2N) with output connections (01 to 02 or 01 to ON) of the switching means (22) is connected, the output connections (01, 02 or 01 to 0N) being controllable in such a way that several additional input connections (A11, AI2 or Δ11 to A1N) in succession can be applied to the at least one input connection (A1 to A8) for analog input signals.

4. Electronic control device according to claim 3, characterized gekenn¬ characterized in that the resistor network (R1 to R4 or R1 to R2N) comprises several connected branches, each branch of a series circuit of resistors (R1, R4; R2, R3 and R1 , R21 to RN, R2N) and that an output connection (01, 02 or 01, 02 ... ON) of the switching means (22) is connected to one tap of the connected series circuits.

5. Electronic control device according to one of claims 3, 4, characterized in that with the input connections (A11, A12 or A11, A12 to A1) connected resistors (R1, R2 or R1, R2 to RN) of the resistor network and the Resistors (R4, R3 or R21, R22, R2N) connected to the at least one input connection (AI to A8) of the circuit (2) each have the same values.

6. Electronic control device according to one of claims 3 to 5, characterized in that the value of the resistors (Rl, R2) each about 10 Kohm and the value of the resistors (R3, R4) is each about 45 Kohm.

7. Electronic control device according to one of claims 3 to 6, characterized in that the value of the resistors (R1, R2, RN) each about 10 Kohm and the value of the resistors (R21, R22, R2N) is each about 100 Kohm.

8. Electronic control device according to one of claims 1 to 7, characterized in that the reference voltage of the A / D converter (21) of the circuit (2) via a resistance divider (Ra, Rb) (Fig. 3) with a stabilized voltage ( Ustab) is connected, the base point of the resistance divider being connected to a digital connection (Or) of the circuit (2).

9. Electronic circuit with a central processing unit, characterized in that the circuit (2) comprises switching means (22) for controlling internal or external modules that relieve the central processing unit.

10. Electronic circuit or electronic control device according to one of claims 1 to 9, characterized in that the control of the internal or external modules is time-dependent.

11. Electronic circuit or electronic control device according to one of claims 1 to 10, characterized in that the group-wise conversion of several analog signals into corresponding digital signals can be carried out in a time-controlled manner.