WO1993005617A1

WO1993005617A1 - Sample rate convertor

Info

Publication number: WO1993005617A1
Application number: PCT/GB1992/001686
Authority: WO
Inventors: Timothy Guyon Richards
Original assignee: Tekniche Limited
Priority date: 1991-09-12
Filing date: 1992-09-14
Publication date: 1993-03-18
Also published as: GB9119592D0; GB2259623A

Abstract

Conversion of a component digital video signal to a PAL composite digital video signal is achieved by increasing the sample rate of the component signal using an interpolator (12). A sample rate convertor (14) selects from the increased rate signal those samples occurring nearest to the sample time slots of a multiple of the composite signal sample rate. The selected samples are then filtered by a filter (16) to provide samples at the composite sample rate.

Description

SAMPLE RATE CONVERTOR

FIELD OF THE INVENTION

This invention relates to the conversion of video signals from one signal format to another. More specifically, but not exclusively, the invention is concerned with conversion between component digital video such as the CCIR Rec 601 4:2:2 format signal and composite frequency multiplexed video such as the PAL composite digital video signal.

BACKGROUND TO THE INVENTION

The use of digital signal processing technology is well established in standards conversion. Known techniques use a combination of look-up tables and known pixel information to convert between signals sampled at one frequency and those sampled at another. An example is shown in Figure 1 in which a sub pixel C is generated from known pixels A and B. Figure 2 shows how the values of pixels A and B are scaled using values from a look-up table (not shown) to produce sub-pixel C.

DESCRIPTION OF PRIOR ART

Such methods work well and the coefficient table remains manageable in most cases. However, when converting from component digital video to PAL composite digital video the relationship between a pixel in the component digital video domain and the corresponding pixel in the PAL composite digital video domain will vary in dependence upon the position within the PAL 8 field sequence. This would give a minimum of 2,837,516 coefficients if the new pixel was only derived from the most proximate component digital video pixels. However, in practice the new pixel is influenced by the values of many of the surrounding pixels, in some cases up to 50 other pixels. Thus the size of look-up table required becomes very large as the number of coefficients becomes large. Thus, applying the existing conversion method to component digital video (CDV) to PAL composite digital video (PCDV) requires a very large amount of memory to hold the look-up table which can be expensive, bulky and complex.

SUMMARY OF THE INVENTION

The present invention aims to overcome the need for the very large look-up table required in the prior art whilst providing a CDV/PCDV convertor and method of conversion which is accurate.

In essence the invention operates by interpolating sample values of the old signal format effectively to raise the sample rate. Samples at the new video standard are selected on a closest fit basis.

More specifically the invention provides a method of converting a digital video signal between a first standard at a first sample rate and a second standard at a second sample rate, comprising increasing the apparent sample rate of the signal at the first standard, and selecting from the increased sample rate signal those samples occuring at intervals closest to sample time slots at the second sample rate.

The invention also provides apparatus for converting a digital video signal between a first standard at a first sample rate and a second standard at a second sample rate, comprising means for increasing the apparent sample rate of the signal at the first standard, and means for selecting from the increased sample rate signal samples occuring at intervals closest to sample time slots at the second sample rate.

A sample rate convertor embodying the invention has the advantage that costly coefficient tables are not required. Preferably, the apparent sample rate is increased by an interpolator. This has the advantage that in determining intermediate sample values between any two sample points, account can be taken of a number of other sample values on either side of the samples in question.

Preferably, samples are selected from the increased sample rate first standard signal at a rate a multiple of the second standard sample rate. The selected samples are then filtered to provide the second standard signal at the second sample rate.

Clearly, the higher the apparent sampling rate, the smaller any errors at the second sample rate. However, selecting samples at a multiple, eg. twice, the second sample rate and filtering further reduces the errors.

A system in which errors are too small to be noticeable to the eye when converting between 4:2:2 component digital video and PAL composite digital video can be achieved by increasing the apparent sample rate by a factor of four to 54 MHz and selecting samples, at twice the PAL sample rate ie. at 35.5 MHz.

BRIEF DESCRIPTION OF DRAWINGS

Embodiments of the invention will now be described, by way of example, and with reference to the accompanying drawings, in which:

Figure 1 is a time/amplitude plot showing the relative position of an interpolated pixel C with respect to two real pixel A and B according to the prior art;

Figure 2 is a block diagram according to the prior art showing how pixel C of Figure 1 may be generated using look-up tables, multiplexers and an adder;

Figure 3 shows the luminance component of a 4:2:2 signal; Figure 4 shows the sample points of the signal of Figure 3;

Figure 5 shows the sample points interpolated by a factor four;

Figure 6 shows how the samples of Figure 5 may be selected as the basis of a composite video signal;

Figure 7 shows how the samples of Figure 6 may be interpolated to double the sample rater

Figure 8 is a block diagram of a converter embodying the invention;

Figure 9 is a more detailed block diagram of the sample rate convertor of Figure 8.

Figure 10 is a more detailed block diagram of the safe area clock of Figure 8.

DESCRIPTION OF BEST MODE

Figures 3 and 4 show a conventional luminance component signal in 4:2:2 component format which is laid down by CCIR Rec. 601 and has a sampling frequency of 13.5 MHz. Thus, samples occur every 74nS as shown in Figure 4.

The PAL signal has a sample rate of 17.7 MHz. Thus, samples occur every 56nS. Instead of generating the pixel value at 56nS directly from a known position within the PAL 8 field sequence and the values of the pixels at OnS and 74nS the old pixel values are interpolated to generate new pixels. As shown in Figure 5, the interpolation effectively quadruples the sample rate. Of course, the degree of interpolation can be any multiple of the 4:2:2 sample rate. Thus, in Figure 5 the sample rate is increased to 54 MHz. The intermediate pixel points are predicted by interpolating filters. At present, hardware costs and complexity dictate that a 54 MHz rate is the highest practicable rate. However, future advances in technology and falls in component costs will increase this rate. Further increases in time resolution can be achieved by a second channel (or more channels) which operate at the same limited frequency but which produce samples intermediate those of the first channel. In such a case the output logic chooses the signal channel that has the nearest time sample available to that required at the 17.7 MHz PAL rate.

Referring again to Figures 5 and 6 the PAL composite digital video domain takes the pixels from the component digital video domain that are closest to the required time slot. Thus, in Figure 5 samples occur every 18.5nS. The sample taken for the 56nS time slot will therefore be that at the 55.5nS time slot in the Figure 5 signal. Similarly the next sample slot at 112nS will be filled by the sample at lllnS.

Clearly, the higher the apparent sample rate of the component digital video, the smaller the errors that will occur in the PAL composite digital video domain.

Errors may be reduced further by writing the PAL composite digital video domain at a rate higher than the basic sampling frequency 4Fsc. In Figure 7, the domain is written at 8 Fsc giving samples every 28nS. A more accurate signal at 4 Fsc is then obtained by filtering.

Figure 8 shows an outline of a system embodying the invention. A 4:2:2 component digital video signal is decoded by a decoder 10 and the luminance (Y) signal at 13.5 MHz separated. A suitable decoder is an Altera EPM 5128 programmable logic device. An interpolator 12 increases the apparent sample rate of the luminance signal as described previously. In this case the output of the interpolator is a luminance signal with a sample rate of 54 MHz although this rate is variable. However, the sample rate output by the interpolator is preferably between 1 and 10 times the input rate. All interpolation and filtering may be performed using a TMC 2242 half-band interpolating/decimating digital filter supplied by TRW LSI Products Inc.

The 54MHz signal from the interpolator (Figure 5) is passed to a sample rate convertor 14 which will be described in more detail later. In the Figure 8 embodiment the convertor 14 produces samples according to Figure 8_r i.e. at 35.5 MHz. A filter 16 filters the signal to produce a PAL composite digital video signal at 17.7 MHz as the output.

Referring now to Figure 9, the sample rate convertor is shown in greater detail. The convertor clocks at the frequencies of both the interpolated input signal (54 MHz) and the multiple of the PAL composite output 35.5 MHz (as shown in Figure 7).

The 54 MHz input signal is input to a 54 MHz luminance latch 18 and clocked to a rate transfer latch 20. The latch is clocked by a safe area clock 24 and on each clock pulse output data to a 35.5 MHz latch 22 which produces the PAL samples for filtering. The safe area clock 24 prevents the 35.5 MHz system taking data from the 54 MHz system shortly after a positive going edge, as the data would be unstable during this period due to the effects of data skew.

Figure 10 shows the operation of the safe area clock 24. The 54MHz clock is inverted at 30 and delayed at 32, this signal is used as one input of a nand gate 34. The 54MHz is used as the other input to the nand gate. The output of the nand gate is a low going pulse the duration of which is determined by the length of the delay in the input to the nand gate. The delay 36 before the 54MHz input and node 25 is used to position the clock pulse of the input data latch 18 in the middle of the pulse generated by the and gate. The pulse generated by the nand gate is applied to a latch 38 gating the 35.5MHz clock, this will prevent the 35.5MHz "clock from changing state during this period. This in turn prevents the latching of data into the 35.5MHz system when data could be subject to skew. This circuit may be fabricated using ECL components and EPLDs in the colour difference channels.

The system has been described in terms of transfer between 4:2:2 component digital video and PAL composite digital video. However, it is suitable for conversion between other video standards, for example, between 4:2:2 and NTSC composite. Although the invention operates in the digital domain it can be used with analogue signals with suitable A/D and D/A conversion at the beginning and end of the process.

In its simplest form, the interpolator derives the values of the intermediate points from the two adjacent pixel values. However, more sophisticated embodiments utilise interpolators which take into account many adjacent pixels in to determine intermediate values, whereby the interpolation may be non-linear.

The embodiments described have the advantage of providing a simple and cost effective method and apparatus for sample rate conversion which avoids the need for large coefficient tables and complex control logic. Although the system necessarily introduces some small errors as interpolated pixel values at one standard are not always at identical time slots to those of the other standard the effect of this in the final output is too small to be noticeable at an interpolation rate of 4 x base rate. Interpolation at higher multiples of input samples frequency will minimise such errors still further.

Claims

1. A method of converting a digital video signal between a first standard at a first sample rate and a second standard at a second sample rate, comprising increasing the apparent sample rate of the signal at the first standard, and selecting from the increased sample rate signal those samples occuring at intervals closest to sample time slots at the second sample rate.

2. A method according to Claim 1, wherein the sample rate at the^' first standard is increased by interpolating samples at the first sample rate.

3. A method according to Claim 2, wherein the increased sample rate is an integral multiple of the first sample rate.

4. A method according to Claim 3, wherein the increased sample rate is between two and ten times the first sample rate.

5. A method according to Claim 1, wherein samples are selected from the increased sample rate first standard signal at a rate of multiple of the second standard sample rate and wherein said selected samples are filtered to provide the second standard signal at the second sample rate.

6. A method according to Claim 1, wherein the selection of samples comprises clocking a latch with a safe area clock having clock inputs at the increased sample rate and the selection rate.

7. A method according to Claim 1, wherein the first standard signal is a component digital video signal and the second standard signal is a composite digital video signal.

8. A method according to Claim 7, wherein the composite digital video signal is a PAL or NTSC signal.

9. Apparatus for converting a digital video signal between a first standard at a first sample rate and a second standard at a second sample rate, comprising means for increasing the apparent sample rate of the signal. at the first standard, and means for selecting from the increased sample rate signal samples occuring at intervals closest to sample time slots at the second sample rate.

10. Apparatus according to Claim 9, wherein the means for increasing the apparent sample rate comprises an interpolator for providing additional sample values from existing sample value.

11. Apparatus according to Claim 10,^' wherein the interpolator provides an output having samples at an integral multiple of the first sample rate.

12. Apparatus according to Claim 9, wherein the selection means comprises means for selecting samples at a rate a multiple of the second sample rate and a filter for filtering the samples at the said multiple rate to produce samples at the second sample rate.

13. Apparatus according to Claim 9, wherein the selection means comprises a latch having an input at the increased sample rate and a safe area clock for clocking the latch, the safe area clock having a first clock input at the increased sample rate and a second input at the sample selection rate.