WO1992000575A1 - Imprimante a del a compensation de temperature amelioree - Google Patents

Imprimante a del a compensation de temperature amelioree Download PDF

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Publication number
WO1992000575A1
WO1992000575A1 PCT/US1991/004487 US9104487W WO9200575A1 WO 1992000575 A1 WO1992000575 A1 WO 1992000575A1 US 9104487 W US9104487 W US 9104487W WO 9200575 A1 WO9200575 A1 WO 9200575A1
Authority
WO
WIPO (PCT)
Prior art keywords
current
led
light
digitally addressable
driving
Prior art date
Application number
PCT/US1991/004487
Other languages
English (en)
Inventor
Jeffrey A. Small
Original Assignee
Eastman Kodak Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Eastman Kodak Company filed Critical Eastman Kodak Company
Publication of WO1992000575A1 publication Critical patent/WO1992000575A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K15/00—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
    • G06K15/02—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
    • G06K15/12—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by photographic printing, e.g. by laser printers
    • G06K15/1238—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by photographic printing, e.g. by laser printers simultaneously exposing more than one point
    • G06K15/1242—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by photographic printing, e.g. by laser printers simultaneously exposing more than one point on one main scanning line
    • G06K15/1247—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by photographic printing, e.g. by laser printers simultaneously exposing more than one point on one main scanning line using an array of light sources, e.g. a linear array

Definitions

  • the present invention relates to a non-impact recording apparatus such as that using LED's for recording and specifically to such printheads and driver chip therefor which control uniformity of light output automatically even though subjected to temperature gradients along the printhead.
  • printer apparatus which comprises a multiplicity of individually addressable and energizable point-like radiation sources, such as LED's, arranged in a row for exposing points upon a photoreceptor during movement thereof relative to and in a direction normal to the row.
  • Driver circuits are provided for simultaneously energizing the radiation sources responsive to respective data bit input signals applied to the driver circuits during an information line period.
  • the print or recording head includes a support upon which are mounted chips placed end to end and upon each of which are located a group of LED's.
  • the driver circuits are formed as integrated circuits and are incorporated in chips that are located to each side of the linear array of LED chips.
  • the driver circuits in this apparatus each include a shift register for serially reading- in data-bit signals and for driving respective LED's in accordance with the data signals.
  • each driver chip Associated with each driver chip is a
  • the controller comprises a current mirror having a master control circuit whose current is mirrored in slave circuits to which the LED's are connected.
  • system bias voltage which is adjustable to compensate for loss in intensity of light output from the LED's due to aging, i.e., hours of use. Since aging will affect most LED's on a printhead to about the same extent, the loss in intensity due to aging may be overcome by changing the system bias voltage which causes
  • This change in system bias voltage may be characterized as a "global" change since the change in system bias voltage affects all driver chips on the printhead.
  • a new digital word is sent to a digital current mirror control that is separate from the driver chips.
  • a new level of system bias may be provided to each driver chip.
  • Incorporated within each driver chip is an additional current mirror that is also subject to digital regulation and can be used to provide "local" regulation or control for such localized effects as temperature and chip to chip nonuniformity.
  • a temperature sensor such as a thermistor is located on the printhead at a position or positions that are reasonably representative of the temperature of the LED's.
  • bias voltage may be adjusted by the logic and control unit of the printer apparatus.
  • a problem with the above prior art is that it would be desirable to have each driver chip be self-regulating for temperature compensation.
  • a second problem is that variations in voltage
  • driving means including a current mirror having a master current driver means and a plurality of slave current driver means for selectively energizing with respective slave driving currents respective elements for recording; an additional element of similar
  • temperature responsiveness to a light-emitting element and including means for precluding light for recording from being emitted therefrom; sensing means responsive to said additional element when it is energized for generating an electrical signal which varies with a temperature of the additional element; adjustment means responsive to said electrical signal for adjusting said respective slave driving currents and characterized by a constant current source means providing a current independent of the levels of currents of said respective slave driving currents for energizing said additional element with said constant current.
  • a non-impact printer apparatus for recording comprising a plurality of groups of light-emitting elements, a plurality of integrated circuit driver chips, each including means for driving respective groups of light-emitting elements; each driver chip including digitally addressable current-conducting transistor means for selectively establishing a reference current and a voltage bias related to a digital addressing of said digitally addressable current-conducting means;
  • current mirror driver means responsive to said voltage bias for generating a plurality of slave currents that are slaved to said reference current; means coupling said slave currents to respective light-emitting elements; and characterized by
  • temperature sensing means wholly on said driver chip for sensing a temperature related electrical signal generated on said driver chip and in response thereto adjusting said reference current to adjust the slave currents to said light-emitting elements.
  • a driver chip for use on a non-impact printer apparatus for driving a
  • the driver chip comprising current mirror means for generating a reference current and respective slave driving currents for driving respective
  • sensing means responsive to an electrical parameter of a non-light emitting diode when said constant current is driven therethrough for generating an electrical signal which varies with a temperature of the non-light emitting diode; and adjustment means responsive to said electrical signal for adjusting said respective slave driving currents.
  • FIG. 1 is a schematic of a printer apparatus made in accordance with the invention
  • FIG. 2 is a block diagram of circuitry used in forming the printhead shown in FIG. 1 in accordance with the invention
  • FIG. 3 is a block diagram of a driver circuit with data-handling logic for use in one embodiment of the printhead of FIG. 2;
  • FIGS. 4A, B and C are a schematic of a current driving circuit for the driver circuit of FIG. 3 that includes temperature compensation means in accordance with the invention.
  • FIG. 5 is a schematic of an LED chip array in accordance with the invention. DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • electrophotographic recording member The invention, however, is not limited to apparatus for creating images on such a member, as other media such as photographic film etc. may also be used with the invention.
  • roller 12 is coupled to a driver motor M in a conventional
  • Motor M is connected to a source of
  • roller 12 is driven by motor M and moves web 11 in a clockwise direction as indicated by arrow "A" . This movement causes successive image area of web 11 to sequentially pass a series of
  • a charging station 17 is provided at which the photoconductive surface 16 of the web 11 is sensitized by applying to such surface a uniform electrostatic primary charge of a predetermined voltage.
  • the output of the charger may be controlled by a grid connected to a programmable power supply
  • the supply is in turn controlled by the LCU 15 to adjust the voltage level Vo applied onto the surface 16 by the charger 17.
  • an electrostatic image is formed by modulating the primary charge on an image area of the surface 16 with selective
  • point-like radiation sources in accordance with signals provided by a data source 19.
  • the point-like radiation sources are supported in a printhead 20 to be described in more detail below.
  • a development station 21 includes developer which may consist of iron carrier particles and
  • toner particles with an electrostatic charge opposite to that of the latent electrostatic image.
  • Developer is brushed over the photoconductive surface 16 of the web 11 and toner particles adhere to the latent electrostatic image to form a visible toner particle, transferable image.
  • the development station may be of the magnetic brush type with one or two rollers.
  • the toner particles may have a charge of the same polarity as that of the latent electrostatic image and develop the image in accordance with known reversal development
  • the apparatus 10 also includes a transfer
  • a copy sheet S is fed from a supply 23 to driver rollers 24, which then urge the sheet to move forward onto the web 11 in alignment with a toner image at the transfer station 25.
  • the web has a plurality of indicia such as perforations along one of its edges. These perforations generally are spaced equidistantly along the edge of the web 11.
  • suitable means 26 for sensing web perforations. This sensing produces input signals into the LCU 15 which has a digital computer, preferably a microprocessor.
  • microprocessor has a stored program responsive to the input signals for sequentially actuating, then de-actuating the work stations as well as for
  • Additional encoding means may be provided as known in the art for providing more precise timing signals for control of the various functions of the apparatus 10.
  • the printhead 20 is provided with a multiplicity of energizable point- like
  • Optical means 29 may be provided for focusing light from each of the LED's onto the photoconductive surface.
  • preferably comprises an array of optical fibers such as sold under the name Selfoc, a trademark for a gradient index lens array sold by Nippon Sheet Glass, Limited. Due to the focusing power of the optical means 29, a row of emitters will be imaged on a respective transverse line on the recording medium.
  • Selfoc a trademark for a gradient index lens array sold by Nippon Sheet Glass, Limited. Due to the focusing power of the optical means 29, a row of emitters will be imaged on a respective transverse line on the recording medium.
  • the printhead 20 comprises a suitable support with a series of LED chips 31 mounted thereon.
  • Each of the chips 31 includes in this example 128 LED's arranged in a single row. Chips 31 are also arranged end-to-end in a row and where twenty-eight LED chips are so
  • the printhead will extend across the width of the web 11 and include 3584 LED's arranged in a single row.
  • Each of these driver chips include circuitry for addressing the logic associated with each of 64 LED's to control whether or not each of the LED's should be energized as well as to determine the level of current to each of the LED's controlled by that driver chip 40. Two driver chips 40 are thus
  • Each of the two driver chips will be coupled for driving of alternate LED's. Thus, one driver chip will drive the odd numbered LED's of the 128 LED's and the other will drive the even numbered LED's of these 128
  • the driver chips 40 are electrically
  • a series of lines 36 (indicated by a single line in this Fig.) provide clock signals and other pulses for
  • a pair of data lines 33a, 33b are also provided for providing data signals in the form of either a high or low logic level.
  • the driver chips each include a data in and data out port so that they serially pass data between them.
  • Each driver chip 40 includes a 64-bit bidirectional shift register 41.
  • a logic signal carried over line R/LB determines the direction data will flow down this register. Assume that this chip is enabled to cause data to flow down the register from left to right as shown in FIG. 3.
  • Data thus enters shift register 41 over line 33a through the driver chip's data-in port at the left from say the data-out port of a driver chip immediately to the left or from the LCU if the driver chip 40 is the first chip for data to enter.
  • Data exits from this chip at the data-out port to be input to the next adjacent driver chip to the right of driver chip 40.
  • registers may be provided by providing additional lines for distributing data simultaneously.
  • a latch signal is provided over line 36b to latch this data into latch registers 42 so that the shift registers 41 may commence filling with data signals for the next line of exposure.
  • Sixty-four latch registers 42 are provided in each driver chip to receive the data shifted out in parallel fashion from the shift register 41.
  • Each latch register is associated with a particular LED and adjacent latch registers are associated with every other LED.
  • a logic AND gate 43 is associated with each latch register and has one input coupled to the output of its respective latch register and its other input coupled to a line 36c for accepting a strobe or timing pulse from the LCU.
  • This strobe pulse determines when to trigger the LED's to turn on in relation to the position of the recording medium and the duration for which the LED's are turned on.
  • All the AND gates have one of their inputs connected to this strobe line.
  • a plurality of strobe lines may be provided with enabling times of different durations; see in this regard U.S. Patent 4,750,010 to Ayers et al, the contents of which are incorporated herein by this reference.
  • the output of each of the AND gates is coupled to a logic circuit that is part of a constant current driver circuit.
  • the printhead may be of the so-called grey level type wherein multiple data bits per pixel are used to establish the pulsewidth duration of an LED.
  • each driver chip 40 is shown.
  • the respective outputs of the LATCH registers 42 are fed over respective lines 45 1 , 45 3 , and the following lines not shown
  • each of these lines is actually a double line one of which carries an enable signal to turn the respective LED on and the other carries a complement of this
  • the lines 45 1 are input to respective control electrodes of transistors Q 426 , Q 427 .
  • transistors act as switches and form a part of a current mirror driving circuit that includes a master circuit formed by transistors Q 424 , Q 425 and a series of digitally controlled transistors. More details concerning the digitally controlled transistors will be found below with reference to the discussion of FIGS. 4A and 4B. Briefly, these digitally controlled transistors may be selectively turned on to establish a signal I (CHIP BIAS) to thereby regulate a desired current level for the LED's driven by this driver chip. As may be noted in Figure 4C, circuitry for driving two LED's, i.e., LED 1 and LED 3 are illustrated; it being
  • Transistor Q 428 is biased to be always
  • transistor Q 429 is switched on and off and thus is the transistor controlling whether or not current is driven to LED 1 .
  • the gate or control electrode of transistor Q 429 is coupled to the drain-source connection of transistors Q 426 ,
  • transistor Q 427 is made conductive and when LED 1 is to be turned off, transistor Q 426 is made conductive.
  • the gate of transistor Q 426 receives a logic signal that is the inverse of that to gate Q 427 from a data driven enabling means indicated as 116 but is actually the circuitry of FIG. 3 which controls whether or not an LED is to be turned on and for how long. As noted above in a grey level printhead, the LED is to be turned on for a duration determined by the grey level data signals input to the printhead.
  • an additional current mirror that includes two slave circuits.
  • One slave circuit comprises transistors Q 420 , Q 421 and Q 430 .
  • the other slave circuit comprises transistors Q 420 , Q 421 and Q 430 .
  • slave circuit comprises transistors Q 422 , Q 423 and Q 431 .
  • Transistors Q 430 , Q 431 are N-channel
  • MOSFETS while the other transistors noted above are P-channel MOSFETS.
  • the two additional slave circuits associated with LED 1 are on continuously and
  • the current through transistor Q 421 might be 1/80 I LE D 1 and the current through
  • transistor Q 423 might be 1/800 ⁇ I LED1 .
  • transistor Q 426 In operation with transistor Q 429 turned off, transistor Q 426 is on and impresses approximately the voltage V c c at the gate of transistor Q 429 .
  • transistor Q 427 turns on the charge on the gate terminal of transistor Q 429 discharges through transistors
  • This path for discharge of the gate capacitive load at transistor Q 429 thereby provides a turn-on time not affected by the number of LED's that are sought to be simultaneously
  • each control transistor corresponding to transistor Q 429 has its own respective path for discharge of its respective capacitive load.
  • Q 431 is proportional to, i.e. mirrors , that through the master circuit because of the identical gate to source terminal biasing (V G S 1 ) of transistors
  • Transistor Q 429 acting as a cascode transistor and having its source terminal connected to the drain terminal of transistor Q 428 , thereby establishes the drain potential of the transistor Q 428 as varying with changes in V c c .
  • the potential difference V G S 1 is constant even though V c c itself varies.
  • the voltage relationships between the various terminals of transistor Q 428 are not affected by variations in V c c and the current to LED 1 during a period for recording a pixel stays constant.
  • transistor Q 429 conducts current to LED 1 for a time period controlled by the strobe signal or in the case of a grey level printer, for a period controlled by the data bits for recording an appropriate pixel.
  • the level of current for recording this pixel is controlled by the current mirror which is responsive to the current level I(CHIP BIAS).
  • the circuit for generating I(CHIP BIAS) will now be described.
  • this current, I(CHIP BIAS) is controlled by three factors comprising a variable current source 172, a first group of eight digitally controlled NMOSFET transistors Q 2 5 ,
  • transistor Q 3 3 Similarly associated with the second group is non-digitally controlled NMOSFET transistor Q 13 . As may be noted in FIGS. 4A and 4B, not all of the transistors are shown and the number of digitally controlled transistors provided in each group determines the level of control.
  • Transistors Q 25 , ... , Q 32 are parallel connected transistors whose respective gate width to gate length ratios are scaled so that their respective currents are scaled or weighted in powers of two. For example, where eight digitally controlled transistors are provided for this first group (Q 25 -Q 32 ) , respective gate width to gate length ratios may be
  • NMOSFET transistors Q 250 and Q 251 cause current to flow through transistor Q 25 when a high level logic signal is applied to the gate of transistor Q 250 and a complementary low logic signal is
  • the logic signals for controlling which of the current-carrying transistors are to be turned on are controlled by a register R 2 which stores an 8-bit digital word and its 8-bit complement representing a desired current control signal to turn on respective ones of the eight current conducting transistors Q 25 ,...Q 32 .
  • this group of transistors is used for "localized" control of LED current.
  • the digital word stored in register R 2 is specific for this driver chip and will be
  • This digital word may be input to the register R2 from memory in the LCU or from a separate memory such as a ROM provided on the printhead. This digital word thus compensates for chip- to-chip nonuniformity.
  • the LCU may be programmed to maintain a count of prior activations of each LED and adjust a control voltage according to a program based on the aging characteristics of the printhead.
  • printhead ages through repeated use, both temperature and age factors operate to degrade light output.
  • the affects due to aging will generally be similar to all LED's and are corrected for by adjustment of an 8-bit digital word and its 8-bit complement stored in register R 1 .
  • This digital word controls 8 current-carrying NMOSFET transistors Q 5 , ... , Q 12 . Associated with this group of transistors is a continuously
  • the 8-bit word and its 8-bit complement stored in register R 1 is the same as that stored in identical registers R 2 on the other driver chips. As the printhead ages, a new 8-bit digital word and its 8-bit complement is calculated by the LCU and input into the registers R 1 . The calculation of this 8-bit word for aging correction may be based on empirical determinations made using similar
  • printheads or based upon a calibration of this printhead using an optical sensor that senses the output from each or selected LED's or by sensing patches recorded on the photoconductor.
  • variable current source 172 providing an adjustable current I o that is adjusted to compensate for temperature nonuniformities on the printhead.
  • V A is a calculated voltage representing the voltage necessary to increase I o so that increased current is provided to the LED's driven by the driver chip to offset loss of light output due to a rise in temperature on the respective LED chip array 31.
  • Circuits for providing a variable current in response to a reference voltage and a variable voltage are well known.
  • an extra LED, LED M is provided on each LED chip array 31 carrying the 128 LED's that are arranged in a row.
  • the extra LED includes a mask 80 formed of say metal to block any light from emanating from LED M .
  • a constant current source 82 on the driver chip provides a fixed current, say 100 micro amperes, over the lead connecting the current source 82 with the masked LED, LED M .
  • LED M is mounted on the LED chip array it is at a temperature that is approximately the same as that of he other LED's on the same chip array.
  • the low driver current to the extra LED is significantly lower than the nominal driving current, about 10 ma. , to the other LED's so as not to alter the temperature of the extra LED.
  • the forward voltage drop of the LED's are related to the temperature thereof.
  • the anode voltage V ⁇ of LED M is sensed by a sample and hold circuit 84 in response to a signal from the LCU.
  • the voltage V ⁇ is converted to a digital signal by A/D converter 86 and the digitized value for V ⁇ provides an address to
  • look-up table memory 88 This memory may be a ROM or periodically updated RAM that relates the adjusted voltage V A to input voltage V ⁇ .
  • the relationship between V A and V ⁇ may be empirically determined particularly where there is a nonlinear relationship between these variables.
  • the digital output of V A is converted by D/A converter 90 to an analog signal V A that will increase I o to maintain the light intensity output of the LED's. It should be
  • LED's For example, purely analog circuits providing a correct transfer function between V ⁇ and V A may also be used.
  • the operation of the circuit of FIGS. 4A, B and C will now be described.
  • the temperature of the driver chips will heat up differently in accordance with respective current carrying demands and abilities to dissipate heat caused by such demands through the heat conducting structure to which the chips are mounted.
  • the temperature adjusted current I o is conducted to ground via NMOSFET transistor Q 33 and some or all of the transistors Q 32 , Q 31 , . . . and Q 25
  • transistor Q 25 is controlled by switching
  • transistors Q 250 and Q 251 in response to a signal causing Q 250 to conduct and Q 251 to turn off. The others are controlled similarly. This voltage level, V T C , is also applied to the gate of transistor
  • transistor Q 13 is the non-digitally controlled transistor associated with the digitally controlled transistor group
  • bias current level I (CHIP BIAS) through PMOSFET transistor Q 425 .
  • the bias current through PMOSFET transistor Q 425 controls the current conducted through transistor Q 424 , which current is replicated or scaled by current mirrors of PMOSFET slave transistors Q 429 , Q 429 ' , ..etc., i.e., the current controlling
  • Transistor Q 429 is caused to conduct when its respective logic transistors Q 4 2 6 , Q 427 are appropriately signaled by data signals indicating a pixel to be printed.
  • transistor Q 42 7 when a logic low signal is applied to line 45 1 (AN), transistor Q 42 7 turns on and biases the gate of transistor Q 429 to the level V G 2 . Since transistors Q 424 and Q 428 have identical biasing, the current through transistor Q 429 will mirror or be scaled to that of transistor Q 424 for the time period for exposing a pixel as controlled by the duration of the logic low signal on line 45 1 (AN). As is noted in FIG. 4C, the current through Q 429 is fed to LED 1 , for the recording of a pixel.
  • An improved circuit for a current driver chip used in an LED printhead has been described.
  • the circuit retains the desirable feature of two-way addressability described in the prior art. That is, provision is made for digitally addressing each chip to correct for differences in light output by LED's driven by one chip versus those driven by another chip on the same printhead. These differences can arise due to processing condition differences arising during manufacture of the driver chips and for their respective driven LED's.
  • a second provision for digital addressability is retained to provide for global changes due to aging. By providing both addressable portions on each driver chip problems associated with noise are minimized.
  • the provision of an extra LED on each chip array that can be monitored for temperature in accordance with the circuit described herein enables current to be varied to the LED's of that chip array by its respective driver chip without necessitating transfer of temperature compensation data of the printhead to the LCU and then back from the LCU to the driver chip. Control is completely provided on each driver chip. The presence of the extra diode on the array ensures that the temperature related parameters that are sensed are in response to the temperature of the LED chip array and not
  • a recording LED that is not masked or other temperature sensors where the driver chip is used for temperature compensation without the need for the LCU to require data of this type to be transferred to it or in other words temperature compensation is wholly provided for on the driver chip itself with merely certain reference and timing signals being provided to the printhead along with data to be printed.
  • a constant known current may be driven through a recording element and its anode voltage sensed and an
  • the extra LED is shown associated with one driver chip this extra LED may also be associated with a second driver chip that is used to drive the even numbered LED's of the same LED chip array.
  • a second extra LED may be located on the same chip array and associated with the other driver chip.
  • the invention is described with respect to printheads comprised of LED's used as the
  • the invention is also related to other recording elements such as those used for thermal printing, laser etc.
  • Still further modifications include the feeding of the digitized signal representing V T to the LCU to allow the LCU to monitor the temperature of the LED chip array. This allows flexibility by allowing adjustments to R 2 to provide two controls for
  • bipolar transistors are used,
  • emitter-collector-geometry or doping levels to respective transistors may be modified to provide the current scaling characteristics described herein.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Optics & Photonics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)
  • Dot-Matrix Printers And Others (AREA)

Abstract

Une tête d'impression sans impact (20) comprend des éléments d'enregistrement tels que des diodes électroluminescentes d'enregistrement (DEL). Une DEL supplémentaire est comprise dans chaque groupe de DEL. Cette DEL supplémentaire est masquée (80) afin d'empêcher l'exposition du support d'enregistrement à la lumière. Un faible courant continu (82) alimente la DEL supplémentaire et la tension de l'anode est détectée. La tension de l'anode est rapportée à la température du réseau de puces (31) portant les autres DEL. En réponse à la tension de l'anode, un courant réglé est généré dans un miroir de courant réglant une polarisation de tension sur un transistor (Q425) régulant le courant alimentant les DEL d'enregistrement. On a prévu une compensation globale de température à l'intérieur d'une puce de pilotage comprenant le circuit d'attaque des DEL sans que les données de compensation n'aient à passer à l'extérieur de la puce de pilotage.
PCT/US1991/004487 1990-06-26 1991-06-25 Imprimante a del a compensation de temperature amelioree WO1992000575A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US54389190A 1990-06-26 1990-06-26
US543,891 1990-06-26

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WO1992000575A1 true WO1992000575A1 (fr) 1992-01-09

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JP (1) JPH05501685A (fr)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001076881A1 (fr) * 2000-04-07 2001-10-18 Array Ab Systeme imageur, controleur, procede, et produit logiciel d'ordinateur ainsi produit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4736089A (en) * 1980-05-05 1988-04-05 Texas Instruments Incorporated Switching regulator for terminal printhead
US4885597A (en) * 1988-12-27 1989-12-05 Eastman Kodak Company Non-impact printer apparatus with improved current mirror driver and method of printing
EP0379303A1 (fr) * 1989-01-19 1990-07-25 Hewlett-Packard Company Alimentation en courant pour rangée de diodes à électroluminescence
US4952949A (en) * 1989-11-28 1990-08-28 Hewlett-Packard Company LED printhead temperature compensation

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4736089A (en) * 1980-05-05 1988-04-05 Texas Instruments Incorporated Switching regulator for terminal printhead
US4885597A (en) * 1988-12-27 1989-12-05 Eastman Kodak Company Non-impact printer apparatus with improved current mirror driver and method of printing
EP0379303A1 (fr) * 1989-01-19 1990-07-25 Hewlett-Packard Company Alimentation en courant pour rangée de diodes à électroluminescence
US4952949A (en) * 1989-11-28 1990-08-28 Hewlett-Packard Company LED printhead temperature compensation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001076881A1 (fr) * 2000-04-07 2001-10-18 Array Ab Systeme imageur, controleur, procede, et produit logiciel d'ordinateur ainsi produit

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JPH05501685A (ja) 1993-04-02
EP0489148A1 (fr) 1992-06-10

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