WO1991010145A2

WO1991010145A2 - Analogue linearizing circuit

Info

Publication number: WO1991010145A2
Application number: PCT/FR1990/000963
Authority: WO
Inventors: Alfred Permuy
Original assignee: Vectavib
Priority date: 1989-12-29
Filing date: 1990-12-28
Publication date: 1991-07-11
Also published as: FR2656699A1; WO1991010145A3; FR2656699B1

Abstract

An electrical signal is linearized. The linearizing circuit comprises : n differential units (U1...Un) having thresholds, each of which receives, at the input, the signal to be linearized and a reference voltage (Vr), and outputs a current (I1...In) of which the law of variation comprises a zero-conductance part (N) connected to a fixed-conductance part (P) via a sharp-angled point defined by the reference voltage; and n devices (38) for combining currents from the differential units in order to obtain a signal (I) having multiple sharp-angled points which, when combined with the signal to be linearized, allows the latter to be linearized.

Description

ANALOG LINEARIZATION CIRCUIT

TECHNICAL AREA :

The present invention relates to the general technical field of analog circuits suitable for linearizing an electrical signal.

The invention finds a particularly advantageous application for enabling the linearity defect of a capacitive sensor and, possibly, of the measurement device associated with the sensor to be corrected. This lack of linearity thus occurs, for example. During the implementation of a capacitive sensor constituted in the form of a cantilever beam, comprising a sensitive element forming a movable frame, placed in relation of distance from a fixed frame presented by a support of fixing of the sensitive element. A linearity fault also appears in the device for measuring the variations in capacitance of the sensor, constituted, for example, by a detection bridge incorporating diodes with variable capacitances. Such a sensor and the associated measuring device therefore have, in their field of use, deviations from the linearity making it impossible to consider the sensitivity as constant, in relation to the precision required of the measurements.

PRIOR TECHNIQUE:

The state of the art knows a first type of circuits for linearization of an electrical signal using digital linearization techniques. These circuits require the use of an analog digital converter, a memory assigning a stored value to each value of the electrical signal used as address of the memory and a digital to analog converter. Simple and quick to implement, these linearization circuits are not very economical because the precision is directly linked to the capacity of the memory. A second type of linearization circuit uses analog techniques using diodes. The use of such circuits is in practice limited to the linearization of a sig ^electrical nal which the present variation curve a predetermined turning direction and unique.

The object of the invention is to remedy the drawbacks stated above by proposing a circuit suitable for correcting the defect in the linearity of an electrical signal, the law of variation of which has inflections of various meanings. The present invention also aims to propose a circuit suitable for linearizing an electrical signal and offering a large possibility of adjustment or linearization, while presenting a limited cost.

PRESENTATION OF THE INVENTION:

To achieve the aim stated above, the circuit according to the invention, for linearization of an electrical signal, comprises:

- _n differential threshold units each receiving, at the input, the signal to be linearized and a reference voltage and each delivering, at the output, a current whose variation law includes a part with zero slope connected to a part with determined slope, by The intermediary of an angular point defined by The reference voltage,

- And r ^ means for combining the currents from the differential units, so as to obtain a resulting signal with multiple angular points which, combined with the signal to be linearized, allows the linearization of the latter. Various other characteristics will emerge from the description given below with reference to the appended drawings which show, by way of nonlimiting examples, embodiments of the subject of the invention. BRIEF DESCRIPTION OF THE DRAWINGS:

Fig. 1 illustrates an exemplary embodiment of a circuit

* f linearization according to the invention. 05 fig. 2 illustrates a curve of an example of an electrical signal to be linearized by the circuit according to the invention.

Figs. 3A to 3E are curves illustrating the operation of the linearization circuit according to the invention. Fig. 4 illustrates an electrical diagram of a detail characteristic of the invention.

BEST WAY TO IMPLEMENT THE INVENTION:

Fig. 1 shows an example of a circuit

15 adapted to linearize an electrical signal Ve, as illustrated in FIG. 2. For example, the Linearity fault of this signal comes from a capacitive type sensor and / or from the associated measurement device constituted, for example, by a detection bridge provided with diodes with variable capacitances. The Linearization circuit

20 according to the invention comprises at least one and, in the example illustrated, four units U ..- U, differential with threshold, each comprising a first input 22 receiving the signal to linearize Ve and a second input 23 having a voltage of reference, respectively Vr .. to Vr ,. Each unit U ..- U, delivers,

25 respectively, an output current I _η -I # whose law of variation comprises a part with zero slope, connected to a part with determined slope, via an angular point defined for the corresponding reference voltage.

As shown more precisely in Figs. 3A and 3B,

30 at least one and, for example, two differential units U_., U ₂ each deliver an output current I _* , I _{2 of} which the law of variation comprises a part _N with zero slope for a value of the signal to be linearized Ve, lower to that of the reference voltage Vr .., Vr-, corresponding, and a part P_ with slope

35 determined, for a value of the signal Ve greater than that of the voltage Vr .., Vr _? which corresponds to the angular point of the curve.

Advantageously, the linearization circuit may also include at least one and, in the example illustrated, two differential units U ,, U, delivering, in accordance with FIGS. 3C, 3D, an output signal I ,, I, the variation law of which includes a part with zero slope N, for a value of the imbalance signal greater than that of the reference voltage Vr ,, Vr ,, and a part with determined slope P_, for a value of the imbalance signal lower than that of the corresponding reference voltage. It should be noted that the flat part V of the curve, extending the part with a slope P, is not used for the object of the invention.

Fig. 1 illustrates an exemplary embodiment of differential threshold units U ..- U, capable of delivering an output signal affecting the characteristics set out above. Each differential unit U .., U _? includes a transistor T_. of the NPN type, the base of which receives the signal to linearize Ve. The emitter of transistor T .. of the differential units U .., U-, is connected, via a resistor 25 .., 25- ,, to the emitter of a transistor T _? NPN type. The emitter of transistor T _? is connected, via a resistor 26, to ground, while the collector of this transistor T _? is connected to a bias voltage. The base of the transistor T-, of each unit U- ,, U-, receives the corresponding reference signal Vr .., Vr- which is delivered, for example, by a voltage divider bridge formed by resistors 27, 28 , 29.

The operation of each differential unit follows directly from the description established above. If the signal Ve has a voltage value lower than a reference voltage Vr .., Vr _? , the corresponding transistor T .. is blocked, so that the current I., I- ,, leaving the collector of the transistor, is zero. If the voltage Ve has a value greater than a reference voltage Vr .., Vr _? , the collector of transistor T .. outputs a current such that: = (Fr - Vr.,) / R25

and

i = (ve - Vr ₂ ) / R25-,

It should be noted that the slope of the current variation curve I .., I_ (fig. 3A, 3B) is determined by the value R25 .., R25 of the corresponding resistance 25-, 25 ₂ - In addition, the angular point of this curve is directly defined for the reference voltage Vr., Vr- ,.

As shown more precisely in FIG. 1, each differential unit U ,, U, comprises a transistor T-, the base of which receives the corresponding reference signal Vr ,, Vr which is delivered, for example, by a divider bridge 30, 31, 32. The transmitter of the transistor T, of the units U ,, U, is connected to the emitter of a transistor T, via a resistor 33 ,, 33 ,. The emitter of transistor T is connected to a resistor 35 connected to ground, while the collector of transistor T is connected to a bias voltage. The base of transistor T receives the signal to linearize Ve.

If the signal Ve has a voltage value greater than the reference voltage Vr ,, Vr ,, The transistor T, is blocked, so that the current I ,, I ,, leaving the collector of the transistor T ,, is zero ( fig. 3C, 3D). If the voltage Ve has a value lower than that of the reference voltage Vr ,, Vr ,, the transistor T, is conductive and outputs a current:

I-. = (Vr, - Ve) / R33-

and

^I 4 = ^<Vr 4 ~ ^{Ve) R33} 4 The slope of the law of variation of the currents I ,, I, ⁽ fig. 3C, 3D) can therefore be adapted as a function of the choice of the value R33 ,, R33, of the resistors 33 ,, 33 ,. Likewise. The angular point of this law is directly determined by the reference voltages Vr ,, Vr ,.

As shown more precisely in fig. 1, each differential unit U-, U, is associated with a means 38 for combining the currents I ₁ , I, coming from the differential units, so as to obtain a resultant current ï_, image of all the currents delivered by the differential units. In the example illustrated, the combination means 38 each consist of a current mirror and are associated together to add the currents I. to I, and obtain a resulting current I

1 - whose law of variation is illustrated in fig. 3E. By way of example, each current mirror 38 comprises a transistor T .. of PNP type, the collector of which is connected to its base and to the collector of the transistor T-. The emitter of transistor T ₅ is provided with a bias resistor 41, while the base of transistor T _ς is connected to the base of a transistor T, the emitter of which is connected to a bias resistor 42. The collector of transistor T, is connected to a collector line 43 connected to the collectors of transistors T, of other current mirrors 38. It should be noted that the choice of resistors 41, 42 makes it possible to adjust the slope of the law of variation of currents ll ₄ .

The resulting current ^ can then pass through a resistor Rs, so as to obtain, in combination with the signal Ve, a linearized output signal Vs, such as:

Vs = Ve + Rs.I

The linearization circuit according to the invention thus makes it possible to ensure a Linearization of an electrical signal whose law of variation has inflections of opposite direction, as this clearly appears in FIG. 2. Of course, the linearization circuit according to the invention may generally comprise ji differential units with threshold U, each associated with a combining means 38. The number of differential units is chosen as a function of the precision of linearization to obtain. In addition, the type of differential units used, individually or in combination, is determined according to the signal to be linearized. The linearization performed by the circuit can be adjusted by choosing suitable values for Resistors 25., 25 _? , ³³ 3- 33 ,, 41 and 42, as well as for the reference voltages Vr. The linearization circuit according to the invention obviously has a limited cost while presenting the possibility of analog signal adjustment.

It must be considered, moreover, that the sign of the slope of the resulting current J. can be modified, if the combination means 38 ensure, not an addition, but a subtraction of the currents delivered by the differential differential units. To this end, as it appears more clearly in FIG. 4, The collector of transistor T, is connected to the collector of a transistor 1, the emitter of which is connected to ground via a resistor 44. The base of transistor T, which is connected to its collector, is connected at the base of a transistor T _R , the emitter of which is connected to ground by means of a resistor 45. The collector of the transistor Tg is connected to the collector line 43 from which the currents I _η ~ I / are subtracted. It should be noted that the slope of the law of variation of the currents can be adapted as a function of the resistances 44, 45.

POSSIBILITY OF INDUSTRIAL APPLICATION:

The invention finds an advantageous application for the correction of a linearity defect of a capacitive sensor.

Claims

CLAIMS:

1 - Linearization circuit of an electrical signal (Ve), characterized in that it comprises:

- n threshold differential units (U- U)

- i n receiving each, as input. The signal to linearize and a reference voltage (Vr) and each outputting a current (I _, ... I)

1 n whose variation law includes a part (_N) with zero slope connected to a part (_P) with determined slope, by means of an angular point defined by the reference voltage,

- And _n means (38) for combining the currents from the differential units, so as to obtain a resulting signal (I) with multiple angular points which, combined with the signal to be linearized, allows the linearization of the latter.

2 - Circuit according to claim 1, characterized in that at least one differential unit delivers an output current * - * - _* • - I? ---) whose law of variation comprises a part with zero slope (N ) for a value of the signal to be linearized (Ve) lower than that of the reference voltage (Vr) and a part with a determined slope (_P) for a value of the signal to be linearized greater than that of the reference voltage. 3 - Circuit according to claim 1 or 2, characterized in that at least one differential unit delivers an output current (I. ,, I., ...) whose law of variation comprises a part with zero slope (N ) for a value of the signal to be linearized (Ve) greater than that of the reference voltage (Vr) and a part with a determined slope (P) for a value of the signal to be linearized (Ve), less than that of the reference voltage (Vr).

4 - Circuit according to claim 2, characterized in that each differential unit is constituted by a first transistor (T.) comprising a base connected to the reference voltage (Vr) and a connected transmitter, through a resistance (25-, 25p ...), to the emitter of a second transistor (T) * whose base receives the signal to be linearized (Ve), while the collector delivers the output current (I-, I _? ).

- 5 - Circuit according to claim 3, characterized in that

05 that each differential unit is constituted by a first transistor (T,) comprising a base receiving the signal to be linearized and an emitter connected, via a resistor (33 ,, 33, ...), to the emitter of a second transistor (T,) whose base is connected to the reference voltage, while

10 The collector delivers the output current (I ,, I, ...).

6 - Circuit according to claim 4 or 5, characterized in that the emitter resistors (25-, 25-,, 33 ,, 33, ...,

41, 42) determine the slope (P) of the Law of variation of the output current of the analog units.

7 - Circuit according to claim 1, characterized in that each combination means (38) is formed by a current mirror.

8 - Circuit according to claim 7, characterized in that the current mirrors (38) provide a subtraction of

20 output currents delivered by analog units.

9 - Circuit according to claim 7, characterized in that the current mirrors (38) provide an addition of the output currents delivered by the analog units.

10 - Circuit according to claim 1, characterized in that the capacitor (6) is of variable nature to ensure differential detection of capacities.

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