WO1991005427A1 - Compensation de decalage cc par signal de compensation cc transmis - Google Patents

Compensation de decalage cc par signal de compensation cc transmis Download PDF

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Publication number
WO1991005427A1
WO1991005427A1 PCT/US1990/005358 US9005358W WO9105427A1 WO 1991005427 A1 WO1991005427 A1 WO 1991005427A1 US 9005358 W US9005358 W US 9005358W WO 9105427 A1 WO9105427 A1 WO 9105427A1
Authority
WO
WIPO (PCT)
Prior art keywords
compensation
average value
dsp
data packet
signal
Prior art date
Application number
PCT/US1990/005358
Other languages
English (en)
Inventor
Leo George Dehner, Jr.
Original Assignee
Motorola, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola, Inc. filed Critical Motorola, Inc.
Publication of WO1991005427A1 publication Critical patent/WO1991005427A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/065—Binary decisions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/062—Setting decision thresholds using feedforward techniques only

Definitions

  • This invention relates generally to DC offset compensation of received data signals.
  • data refers to binary or multilevel signalling, as versus analog signal waveforms.
  • data When receiving such a signal, it is not uncommon for a varying DC component to become combined therewith and possibly distort data recovery.
  • DSP digital signal processor
  • Such implementations require a relatively significant portion of the processing capacity of the DSP. This, in turn, increases current drain requirements for the DSP and/or limits availability of the DSP for support of other desired functions. Accordingly, a need exists for a method of DC offset compensation that will substantially reliably compensate for DC offset in a received data signal, and that may be implemented, if desired, in a DSP without over burdening the processing capacity of the DSP.
  • Fig. 1 comprises a timing diagram of a communication resource format implemented in accordance with the invention
  • Fig. 2 comprises a depiction of a sync word waveform in accordance with the invention
  • Fig. 3 comprises a block diagram of a receiver constructed in accordance with the invention.
  • Fig. 4 comprises a depiction of a received sync word
  • Fig. 5 comprises a block diagram depiction of a part of the DSP operation when programmed in accordance with the invention.
  • the frequency is subdivided into time frames, wherein each time frame is further subdivided into four time slots (101 ) (Fig. 1 ).
  • time slots (102) are used for the transmission of binary signalling information relevant to the allocation of the voice time slots (103) and other system control information.
  • Each control slot (102) in turn includes space for four commands (104), a slot designation (106), and a sync word (107).
  • the sync word (107) is comprised of the hex word zero nine D seven (09D7) (see Fig. 2). In binary form, as represented in Fig. 2, this equates with the sequential transmission of: 0000100111010111. Since this ' particular sync word, when represented in binary form, includes eight zeroes and eight ones, the average value of the sync word equals zero.
  • the constituent elements of the sync word will be transmitted in a predetermined order, as set forth above, with each broadcast. In a particular- application, however, such a requirement may not be necessary. Also, in this particular embodiment, the average value of the sync word elements equals zero, and the mportance of this will be made more clear below. (Other elements could perhaps be used in an appropriate application, wherein the average value would not equal zero. What would be important in such an application, however, is that both the average value of the constituent elements of the sync word be predetermined and known to the receiver, and that the system gain also be known to the receiver, since this gain would scale the non-zero average value.)
  • a receiver (300) (Fig. 3) suitable for practicing the method of the invention will now be described.
  • This receiver (300) includes an antenna (301 ) for receiving the signalling information (302) transmitted to it, including the data sync words (107). These signals (302) are processed in an appropriate RF unit (303) and reduced to baseband.
  • An analog to digital convertor (304) then digitizes this representation, and provides the digitized representation to a DSP (306) (such as a 56000 family device as manufactured and sold by
  • the receiver (300) further includes a processing unit (309) to control the operation of the RF unit (303) and of the DSP (306).
  • the processing unit (309) can receive and process recovered signalling information from the DSP (306).
  • an appropriate clock (311 ) provides necessary clock signals to the DSP (306) and processing unit (309), as may be appropriate to the particular application. So configured, signals (302) received by the receiver can be processed in various programmable ways in the DSP (306).
  • the DSP (306) processes samples (401) of the received sync word (107) (see Fig. 4) at various times.
  • the anticipated time of arrival of the sync word (107), and the constituent elements and order thereof, are of course known to the receiver (300). Therefore, by comparing an average of the sampled values with the value that the receiver (300) would expect to find, the DSP (306) can calculate the difference. These differences can then be used to calculate a DC compensation value suitable for use with subsequently received data.
  • the offset values calculated for this sync word, and also for previously received sync words can effectively be averaged over time (501 and 502) (see Fig. 5) in the DSP to provide an estimated DC compensation value.
  • this DC compensation value can then be used by the DSP to compensate for DC offset in subsequently received data information.
  • the DSP (306) is spared the necessity of constantly monitoring the received signal in support of an ongoing DC offset compensation calculation. Instead, by providing for reception of a sync word that effectively also operates as a DC compensation signal, having a substantially known average value, the DSP need only occasionally calculate a substantially reliable DC compensation value that can be used for DC compensation purposes. What is claimed is:

Abstract

Méthode de compensation de décalage du courant continu qui utilise un signal de compensation du courant continu de réception (107) ayant une valeur moyenne connue, comme zéro. On utilise les differences entre la valeur moyenne connue et la valeur moyenne réellement reçue pour calculer une valeur de compensation du courant continu adaptée pour compenser ultérieurement l'information des données reçues.
PCT/US1990/005358 1989-09-29 1990-09-24 Compensation de decalage cc par signal de compensation cc transmis WO1991005427A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US41450489A 1989-09-29 1989-09-29
US414,504 1989-09-29

Publications (1)

Publication Number Publication Date
WO1991005427A1 true WO1991005427A1 (fr) 1991-04-18

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1990/005358 WO1991005427A1 (fr) 1989-09-29 1990-09-24 Compensation de decalage cc par signal de compensation cc transmis

Country Status (1)

Country Link
WO (1) WO1991005427A1 (fr)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0540359A2 (fr) * 1991-11-01 1993-05-05 Nokia Mobile Phones Ltd. Détecteur de niveau adaptatif
EP0659000A2 (fr) * 1993-11-30 1995-06-21 Nec Corporation Circuit de réglage de seuil et de décision
EP0789448A1 (fr) * 1996-02-08 1997-08-13 Nokia Mobile Phones Ltd. Appareil pour compenser un courant continu
US5663988A (en) * 1992-01-18 1997-09-02 Alcatel Sel Aktiengesellschaft Method and circuit arrangement for offset correction in a TDMA radio receiver
WO1997044898A1 (fr) * 1996-05-24 1997-11-27 International Business Machines Corporation Dispositif, procede et article servant a corriger les frequences de porteuse dans une radio a modulation de frequence
WO1998001981A1 (fr) * 1996-07-08 1998-01-15 Telefonaktiebolaget Lm Ericsson (Publ) Procede et appareil permettant de compenser une variation dans le decalage du niveau continu dans un signal echantillonne
WO1999018700A1 (fr) * 1997-10-07 1999-04-15 Ramar Technology Limited Systemes radio a faible densite de puissance
DE10128236A1 (de) * 2001-06-11 2002-08-01 Infineon Technologies Ag Verfahren zur Kompensation einer stufenförmigen DC-Störung in einem digitalen Basisbandsignal eines Homodyn-Funkempfängers

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4387364A (en) * 1979-07-23 1983-06-07 Sony Corporation Method and apparatus for reducing DC components in a digital information signal
US4873702A (en) * 1988-10-20 1989-10-10 Chiu Ran Fun Method and apparatus for DC restoration in digital receivers

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4387364A (en) * 1979-07-23 1983-06-07 Sony Corporation Method and apparatus for reducing DC components in a digital information signal
US4873702A (en) * 1988-10-20 1989-10-10 Chiu Ran Fun Method and apparatus for DC restoration in digital receivers

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0540359A3 (en) * 1991-11-01 1993-06-30 Nokia Mobile Phones Ltd. Adaptive threshold detector
US5287540A (en) * 1991-11-01 1994-02-15 Nokia Mobile Phones Ltd. Digital detector
EP0540359A2 (fr) * 1991-11-01 1993-05-05 Nokia Mobile Phones Ltd. Détecteur de niveau adaptatif
US5663988A (en) * 1992-01-18 1997-09-02 Alcatel Sel Aktiengesellschaft Method and circuit arrangement for offset correction in a TDMA radio receiver
EP0659000A2 (fr) * 1993-11-30 1995-06-21 Nec Corporation Circuit de réglage de seuil et de décision
EP0659000A3 (fr) * 1993-11-30 1995-11-22 Nec Corp Circuit de réglage de seuil et de décision.
US5917867A (en) * 1996-02-08 1999-06-29 Nokia Mobile Phones Limited Method and apparatus for DC compensation
EP0789448A1 (fr) * 1996-02-08 1997-08-13 Nokia Mobile Phones Ltd. Appareil pour compenser un courant continu
WO1997044898A1 (fr) * 1996-05-24 1997-11-27 International Business Machines Corporation Dispositif, procede et article servant a corriger les frequences de porteuse dans une radio a modulation de frequence
US5761259A (en) * 1996-05-24 1998-06-02 International Business Machines Corporation Apparatus, method and article of manufacture for carrier frequency compensation in a FM radio
WO1998001981A1 (fr) * 1996-07-08 1998-01-15 Telefonaktiebolaget Lm Ericsson (Publ) Procede et appareil permettant de compenser une variation dans le decalage du niveau continu dans un signal echantillonne
US5838735A (en) * 1996-07-08 1998-11-17 Telefonaktiebolaget Lm Ericsson Method and apparatus for compensating for a varying d.c. offset in a sampled signal
AU723089B2 (en) * 1996-07-08 2000-08-17 Telefonaktiebolaget Lm Ericsson (Publ) Method and apparatus for compensating for a varying D.C. offset in a sampled signal
WO1999018700A1 (fr) * 1997-10-07 1999-04-15 Ramar Technology Limited Systemes radio a faible densite de puissance
US6208696B1 (en) 1997-10-07 2001-03-27 Ramar Technology Limited Low power density radio system
DE10128236A1 (de) * 2001-06-11 2002-08-01 Infineon Technologies Ag Verfahren zur Kompensation einer stufenförmigen DC-Störung in einem digitalen Basisbandsignal eines Homodyn-Funkempfängers
US7280617B2 (en) 2001-06-11 2007-10-09 Infineon Technologies Ag Method to compensate for a step DC disturbance in a digital baseband signal in a homodyne radio receiver

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