WO1989012317A1 - Process and device for crystallization of thin semiconductor layers on a substrate material - Google Patents

Process and device for crystallization of thin semiconductor layers on a substrate material Download PDF

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Publication number
WO1989012317A1
WO1989012317A1 PCT/DE1989/000342 DE8900342W WO8912317A1 WO 1989012317 A1 WO1989012317 A1 WO 1989012317A1 DE 8900342 W DE8900342 W DE 8900342W WO 8912317 A1 WO8912317 A1 WO 8912317A1
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Prior art keywords
substrate material
melt
layer
laser
crystallization
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PCT/DE1989/000342
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German (de)
French (fr)
Inventor
Hermann Sigmund
Christian Stumpff
Original Assignee
Fraunhofer-Gesellschaft Zur Förderung Der Angewand
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Publication of WO1989012317A1 publication Critical patent/WO1989012317A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683—Continuous wave laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B13/00—Single-crystal growth by zone-melting; Refining by zone-melting
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B13/00—Single-crystal growth by zone-melting; Refining by zone-melting
    • C30B13/16—Heating of the molten zone
    • C30B13/22—Heating of the molten zone by irradiation or electric discharge
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691—Scanning of a beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation

Definitions

  • the invention relates to a method for the crystallization of thin semiconductor layers on a substrate material, in particular for the targeted crystallization of silicon films without the need for germs by means of laser radiation in so-called SOI structures (SOI: silicon insulator / silicon on insulation). gate), as well as a device for carrying out this method.
  • SOI structures silicon insulator / silicon on insulation. gate
  • SOI structures are of technical importance for a number of electronic components, in particular in integrated circuits (hereinafter referred to as "IC").
  • IC integrated circuits
  • a cross section through a substrate material with an SOI structure is shown schematically in the attached FIG. 1.
  • an insulator layer I here for example a 0.5 ⁇ m thick SiO 2 layer, is on a silicon base layer (bulk Si), and a polycrystalline silicon layer, here for example also 0.5 ⁇ m thick, is on this insulator layer I.
  • Surface layer S is formed.
  • SOI-IC integrated circuits
  • three-dimensional ICs in particular can also be produced if IC substrates which are provided with a suitable insulator layer are used as substrates for the Si layer to be crystallized.
  • SOI technology The formation of three-dimensional IC structures using SOI technology is described in the articles by Y. Akasaka et al. "Trends In Three-Dimensional Integration” (Solid State Technology, February 1988, pp. 81 to 89) and "Three-Dimensional IC Trends (Proc. Of the I ⁇ E, vol. 74, No. 12, Dec. 86, p. 1703-1714).
  • the object of the present invention is to provide a process with which a targeted crystallization of thin semiconductor layers, in particular of single-crystalline silicon films on an SOI structure, can take place by producing a melt with a predetermined temperature
  • a growth nucleus is reproducibly selected in a semiconductor surface layer solely by means of the radiated energy, and a stable single-crystal layer growth is subsequently achieved.
  • a device is also to be specified with which this method can be carried out.
  • the surface layer of a semiconductor structure is then melted locally, a temperature profile being generated in the melt which has a "supercooled" area running symmetrically to the center, the lateral dimensions of which are of the same order of magnitude as the thickness of the melt .
  • An SOI structure is used in particular as the semiconductor substrate material, so that the melt is produced in the polycrystalline silicon surface layer, from which the crystallization of a single-crystalline silicon layer then takes place.
  • energy is preferably irradiated onto the substrate by means of a laser which is operated in a TEM n - or TEM "- * vibration mode.
  • TEM nn modes can also be used to generate the required temperature profile of a laser, which are superimposed so that an intensity profile comparable to the TEM - ⁇ mode results.
  • the intensity profiles of a laser beam in the EM n1 oscillation mode or when two TEM Q modes are superimposed are shown in FIG.
  • An essential feature of the intensity distribution that arises is that two intensity maxima occur symmetrically to a central intensity minimum.
  • the temperature profile in the melt that follows the intensity profile of the laser beam in a targeted manner, ie to specify the lateral dimensions of the “supercooled” area of the melt as a function of the distance a intensity minimum - intensity maximum.
  • the intensity distribution of the laser beam is selected such that the supercooled region of the melt which is formed symmetrically to the beam scanning direction is comparable in its lateral dimensions to the thickness of the melt. This results in an "automatic" seed selection with subsequent stable single-crystal layer growth. If the surface layer of the semiconductor substrate is made of silicon, the crystallized layer shows a (100) orientation, the layer growth taking place in a ⁇ 100> direction which is identical to the scanning or scanning direction.
  • the lateral extent of the area of critical subcooling in the melt should be three to five times the layer thickness.
  • the scanning speed of the intensity-modulated laser beam is preferably 10 to 500 mm / sec, the beam diameter (at 1 / e intensity) on the substrate surface
  • the crystallization can take place in a chamber filled with doping gas, so that the crystallized layer can be specifically doped during the growth process.
  • doping silicon preference is given to using phosphine (PH.) Or arsine (AsH to produce n-type layers, diborane (B_H g ) or boron trichloride (BC1_.) To produce p-type layers.
  • single-crystalline semiconductor layers on a substrate material can be crystallized in a targeted manner - also computer-controlled - in any direction and without doping, without an additional covering layer to stabilize the substrate provide molten surface.
  • This is particularly interesting for reasons of economy, if one takes into account that only a small part of the surface of an IC chip (about 15%) is covered with active components and must therefore be single-crystal.
  • FIG. 1 shows a schematic cross section through an SOI structure (S_ilicon-on-insulator);
  • FIG. 2 intensity profiles of a laser beam in TEM n - oscillation mode and when two TEM __ oscillation modes are superimposed;
  • FIG. 3 shows the schematic structure of a device with an Ar laser for selective crystallization according to the method according to the invention.
  • FIGS. 4a and 4b scanning electron microscope images of recrystallized polysilicon regions on an SOI structure, which were achieved with laser beams in the TEM vibration mode (a) or in the TEM vibration mode (b).
  • FIG. 1 The structure of a device for carrying out the method according to the invention is shown schematically in FIG. According to this arrangement, a prism 1, a laser tube 2 for generating the laser beam (here an Ar laser), an adjustable aperture diaphragm 3, a coupling-out mirror 4, an electro-optical modulation device with an ADP crystal 5 are arranged one behind the other in the beam path of a laser beam and a dielectric polarizer 6, a ⁇ / 4 plate 7, an objective 8 and the wafer 9 to be irradiated.
  • a prism 1 a laser tube 2 for generating the laser beam (here an Ar laser), an adjustable aperture diaphragm 3, a coupling-out mirror 4, an electro-optical modulation device with an ADP crystal 5 are arranged one behind the other in the beam path of a laser beam and a dielectric polarizer 6, a ⁇ / 4 plate 7, an objective 8 and the wafer 9 to be irradiated.
  • a prism 1 a laser tube 2 for
  • Vibration modes or the TEM nn vibration modes of the laser posed.
  • TEM oscillation modes are selected, they are superimposed in such a way that an intensity profile of the laser beam comparable to the TEM n mode results.
  • the ⁇ j4 plate 7 is arranged in the beam path in order to maintain a constant, i.e. to achieve non-oscillating absorption of the laser radiation in the melted or to be melted material layer.
  • the portion of the beam reflected from the surface of the wafer 9 is suppressed by the ⁇ / 4 plate 7, since this reflected, circularly polarized portion of the beam is linearly polarized again as it passes through the ⁇ / 4 plate 7, but the direction of polarization is perpendicular to the direction of polarization of the incident laser beam.
  • the reflected beam portion can therefore not pass the dielectric polarizer 6 and therefore does not get back into the laser resonator.
  • the desired beam diameter on the surface of the wafer 9 is set via the focal length of the lens 8.
  • the beam movement on the substrate 9 can take place, for example, by means of mechanically moved mirrors or electro-optical deflection elements or also by the mechanical adjustment of an x-y table on which the wafer 9 is arranged. These elements for deflecting the beam on the substrate surface are not shown in FIG. 3.
  • the control of the beam movement or the control of the x-y table and the modulation of the light intensity is carried out by a computer.
  • FIG. 4 shows a selectively crystallized Si layer after structural etching has taken place, as has been achieved by the method according to the invention with the device explained above with reference to FIG. 3.
  • the substrate surface was scanned from top to bottom with a laser beam using a TEM.
  • Profile in the structure according to FIG. 4b, scanned from bottom to top with a laser beam with a TEM Q1 profile.
  • the 1 / e diameter in the laser focus was 10 ⁇ m with a laser line of 2 watts and a light wavelength of 488 nm.
  • a 0.5 ⁇ m thick polycrystalline Si layer was crystallized, which by means of chemical layer deposition (CVD) on an amorphous SiO ? -Sub ⁇ trat had been produced.
  • CVD chemical layer deposition

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Abstract

In a process for crystallization of thin semiconductor layers on a substrate material, a melt with a temperature profile is produced in the surface layer of the substrate. The temperature profile has an ''undercooled'' region essentially symmetrical in relation to its centre with a lateral dimension equal to the thickness of the melt. The melt in the surface layer of the substrate material is preferably produced by irradiation with a laser beam in the TEM01? or TEM01?* oscillating mode. The process is particularly suitable for crystallization of single crystal silicon regions on silicon-on-insulator (SOI) substrates.

Description

VERFAHREN UND VORRICHTUNG FÜR DIE KRISTALLISATION DÜNNER HALBLEITERSCHICHTEN AUF EINEM SUBSTRATMATERIAL METHOD AND DEVICE FOR THE CRYSTALLIZATION OF THIN SEMICONDUCTOR LAYERS ON A SUBSTRATE MATERIAL
Beschreibungdescription
Die Erfindung betrifft ein Verfahren für die Kristallisa¬ tion dünner Halbleiterschichten auf einem Substratmaterial, insbesondere für die gezielte Kristallisation von Silizium¬ filmen ohne Keimvorgabe mittels Laserstrahlung in sogenannten SOI-Strukturen (SOI: _Silicon-£n-Insulator/Silizium-auf-Isola- tor) , sowie eine Vorrichtung zur Durchführung dieses Verfah¬ rens .The invention relates to a method for the crystallization of thin semiconductor layers on a substrate material, in particular for the targeted crystallization of silicon films without the need for germs by means of laser radiation in so-called SOI structures (SOI: silicon insulator / silicon on insulation). gate), as well as a device for carrying out this method.
SOI-Strukturen sind für eine Reihe von elektronischen Bauelementen, insbesondere in integrierten Schaltungen (im folgenden kurz als "IC" bezeichnet) , von technischer Bedeu¬ tung. Ein Querschnitt durch ein Substratmaterial mit einer SOI-Struktur ist schematisch in der anliegenden Figur 1 darge¬ stellt. Dabei ist auf einer Silizium-Basisschicht (Bulk-Si) eine Isolatorschicht I, hier beispielsweise eine 0,5 um dicke Si02-Schicht, und auf dieser Isolatorschicht I eine, hier beispielsweise ebenfalls 0,5 μm dicke, polykristalline Sili¬ zium-Oberflächenschicht S ausgebildet.SOI structures are of technical importance for a number of electronic components, in particular in integrated circuits (hereinafter referred to as "IC"). A cross section through a substrate material with an SOI structure is shown schematically in the attached FIG. 1. In this case, an insulator layer I, here for example a 0.5 μm thick SiO 2 layer, is on a silicon base layer (bulk Si), and a polycrystalline silicon layer, here for example also 0.5 μm thick, is on this insulator layer I. Surface layer S is formed.
Die unter Verwendung von SOI-Substraten hergestellten in¬ tegrierten Schaltungen (SOI-IC) zeigen gegenüber konventio¬ nellen ICs, d.h. auf monokristallinen Si-Substraten herge¬ stellten ICs, wegen geringerer parasitärer Kapazitäten höhere Signalgeschwindigkeiten und eine geringere Strahlungsempfind- lichkeit. Bei CMOS-ICs kann bei erhöhter Integrationsdichte der sogenannte Latch-Up-Effekt vermieden werden.The integrated circuits (SOI-IC) produced using SOI substrates show compared to conventional ICs, i.e. ICs manufactured on monocrystalline Si substrates, due to lower parasitic capacitances, higher signal speeds and a lower sensitivity to radiation. In the case of CMOS ICs, the so-called latch-up effect can be avoided with an increased integration density.
Unter Anwendung der SOI-Technik können insbesondere auch dreidimensionale ICs (3D-ICs) gefertigt werden, wenn als Sub¬ strat für die zu kristallisierende Si-Schicht afer mit IC- Strukturen verwendet werden, die mit einer geeigneten Isola¬ torschicht versehen sind. Die Ausbildung von dreidimensionalen IC-Strukturen unter Anwendung der SOI-Technologie ist in den Artikeln von Y. Akasaka et al. "Trends In Three-Dimensional Integration" (Solid State Technology, Februar 1988, S. 81 bis 89) und "Three-Dimensional IC Trends (Proc. of the IΞΣE, vol. 74, No. 12, Dez. 86, S. 1703-1714) beschrieben.Using SOI technology, three-dimensional ICs (3D ICs) in particular can also be produced if IC substrates which are provided with a suitable insulator layer are used as substrates for the Si layer to be crystallized. The formation of three-dimensional IC structures using SOI technology is described in the articles by Y. Akasaka et al. "Trends In Three-Dimensional Integration" (Solid State Technology, February 1988, pp. 81 to 89) and "Three-Dimensional IC Trends (Proc. Of the IΞΣE, vol. 74, No. 12, Dec. 86, p. 1703-1714).
Es ist bekannt, einkristalline SOI-Schichten durch loka¬ les Aufschmelzen von feinkristallinem Silizium-Material herzu- stellen. Dieser Schmelzvorgang erfolgt durch geeignete Ener¬ gieeinkopplung, z.B. durch Laserstrahlung (Ar, Nd:YAG) , aber auch durch Strahlung inkohärenter Strahlungsquellen (Lampen¬ heizer, Graphitεtreifenheizer) sowie durch Elektronenstrahlen. Für die Ausbildung einer einkristallinen Materialschicht muß beim Kristallisationsbeginn ein geeigneter Kristallisations- keim vorhanden sein. Weiterhin ist für das einkristalline Schichtwachstum ein entsprechender Temperaturgradient in der Schmelze erforderlich. Um zu verhindern, daß der durch die Strahlung erzeugte dünne schmelzflüssige Film aufgrund seiner Oberflächenspannung von der Unterlage abreißt, wird bei den bekannten Verfahren die feinkristalline Si-Schicht vor der Kristallisation mit einer transparenten dünnen Abdeckschicht, z.B. aus SiO_r versehen.It is known to produce single-crystalline SOI layers by locally melting fine-crystalline silicon material. put. This melting process takes place by means of suitable energy coupling, for example by laser radiation (Ar, Nd: YAG), but also by radiation from incoherent radiation sources (lamp heaters, graphite strip heaters) and by electron beams. For the formation of a single-crystalline material layer, a suitable crystallization seed must be available at the start of crystallization. A corresponding temperature gradient in the melt is also required for the single-crystalline layer growth. In order to prevent the thin molten film produced by the radiation from tearing off the surface due to its surface tension, in the known processes the fine-crystalline Si layer is provided with a transparent thin covering layer, for example made of SiO_ r , before crystallization.
Grundsätzlich sind drei Arten bekannt, den durch die Strahlung zu erzeugenden, für das Schichtwachstum in der Sili- ziumschicht einer SOI-Struktur erforderlichen Temperaturgra¬ dienten einzustellen:Basically, three types are known for setting the temperature gradient to be generated by the radiation and required for the layer growth in the silicon layer of an SOI structure:
(1) Einstellung einer geeigneten lateralen Intensitäts- verteilung bei dem auf das Substrat auftreffenden Photonen¬ oder Elektronenstrahl ("Beam-Shaping" ) ;(1) Setting a suitable lateral intensity distribution in the case of the photon beam or electron beam hitting the substrate (“beam shaping”);
(2) Erzeugung eines thermischen Profils, indem die Ener- gie-Absorptionεcharakteristika des Oberflächenfilms des Sub¬ strats durch strukturierte Antireflexions-Dünnfilme oder Ab¬ sorptionsschichten auf der Polysiliziumschicht verändert wer¬ den; und(2) Generation of a thermal profile by changing the energy absorption characteristics of the surface film of the substrate by means of structured antireflection thin films or absorption layers on the polysilicon layer; and
(3) gezielte Vorgabe der Wärmeableitungscharakteristika zum Substrat.(3) targeted specification of the heat dissipation characteristics to the substrate.
Bei den bisher bekannten Verfahren, bei denen die Erzeu¬ gung einer Schmelze in der Silizium-Schicht einer SOI-Struktur durch Laser- bzw. Elektronenstrahl erfolgt, wird die erforder¬ liche Keimvorgabe zum Kristallisationsbeginn durch Kontakt- lδcher in der Isolatorschicht erzielt, wenn einkristallines Silizium als Baεismaterial verwendet wird. In ähnlicher Weise wie in der Graphoepitaxie kann man bei der Verwendung von in¬ tegrierten Reflektoren dabei eine laterale Keimvorgabe erhal¬ ten. Da jedoch bei diesem Verfahren die Strahlabtastung in Richtung der streifenförmigen Reflektoren erfolgt, ist die Keimvorgabe lokal nicht definiert, und es tritt eine spontane Keimausbildung auf.In the previously known methods, in which a melt is generated in the silicon layer of an SOI structure by laser or electron beam, the necessary seed specification at the start of crystallization is achieved through contact holes in the insulator layer, if single-crystalline Silicon is used as base material. In a manner similar to that in graphoepitaxy, a lateral seed specification can be obtained when using integrated reflectors. However, since in this method the beam is scanned in the direction of the strip-shaped reflectors, Germ specification not defined locally, and spontaneous germ formation occurs.
Angesichts der bekannten Kristallisationεverfahren liegt die Aufgabe der vorliegenden Erfindung darin, ein Verfahren anzugeben, mit dem eine gezielte Kristallisation von dünnen Halbleiterschichten, insbesondere von einkristallinen Sili¬ ziumfilmen auf einer SOI-Struktur, erfolgen kann, indem durch Erzeugung einer Schmelze mit einem vorgegebenen Temperatur¬ profil in einer Halbleiter-Oberflächenεchicht allein mittels der eingestrahlten Energie reproduzierbar ein Wachstumskeim selektiert und anschließend ein stabiles einkriεtallines Schichtwachstum erzielt wird. Weiterhin soll auch eine Vor¬ richtung angegeben werden, mit der dieses Verfahren durchge¬ führt werden kann.In view of the known crystallization processes, the object of the present invention is to provide a process with which a targeted crystallization of thin semiconductor layers, in particular of single-crystalline silicon films on an SOI structure, can take place by producing a melt with a predetermined temperature A growth nucleus is reproducibly selected in a semiconductor surface layer solely by means of the radiated energy, and a stable single-crystal layer growth is subsequently achieved. Furthermore, a device is also to be specified with which this method can be carried out.
Die Lösung dieser Aufgabe erfolgt mit einem Verfahren, wie es im Hauptanspruch angegeben ist. Danach wird die Ober¬ flächenschicht einer Halbleiterstruktur lokal aufgeschmolzen, wobei in der Schmelze ein Temperaturprofil erzeugt wird, das einen symmetrisch zum Zentrum verlaufenden "unterkühlten" Be¬ reich aufweist, der in seinen lateralen Abmeεεungen die glei¬ che Größenordnung wie die Dicke der Schmelze hat. Als Halb¬ leiter-Substratmaterial findet insbesondere eine SOI-Struktur Anwendung, so daß die Schmelze in der polykristallinen Sili¬ zium-Oberflächenschicht erzeugt wird, aus der dann die Kri¬ stallisation einer einkristallinen Siliziumεchicht erfolgt.This problem is solved with a method as specified in the main claim. The surface layer of a semiconductor structure is then melted locally, a temperature profile being generated in the melt which has a "supercooled" area running symmetrically to the center, the lateral dimensions of which are of the same order of magnitude as the thickness of the melt . An SOI structure is used in particular as the semiconductor substrate material, so that the melt is produced in the polycrystalline silicon surface layer, from which the crystallization of a single-crystalline silicon layer then takes place.
Für die Erzielung des erfindungsgemäß erforderlichen Tem¬ peraturprofils in der Schmelze wird vorzugsweise Energie mit¬ tels eines Lasers auf das Substrat aufgeεtrahlt, der in einem TEMnι- oder TEM„- *-Schwingungsmode betrieben wird. Es kön¬ nen zur Erzeugung deε erforderlichen Temperaturprofilε einem Laεer auch TEMnn-Moden verwendet werden, die εo überlagert werden, daß εich ein dem TEM-^-Mode vergleichbares Intensi¬ tätsprofil ergibt. Die Intensitätsprofile eines Laserεtrahlε im EMn1 -Schwingungsmode bzw. bei Überlagerung von zwei TEM Q-Moden sind in Figur 2 dargestellt. Ein wesentlicheε Merkmal der sich einstellenden Intensitätsverteilung besteht darin, daß symmetrisch zu einem zentralen Intensitätsminimum zwei Intensitätsmaxima auftreten. Durch diese definierten In- tensitätsunterschiede ist es möglich, das Temperaturprofil in der Schmelze, das dem Iπtensitätsprofil des Laserεtrahls folgt, gezielt einzustellen, d.h. die lateralen Abmessungen des "unterkühlten" Bereichs der Schmelze in Abhängigkeit vom Abstand a Intenεitätsminimum - Intensitätsmaximum vorzugeben. Erfindungsgemäß wird die Intenεitätεverteilung deε La¬ serstrahlε so gewählt, daß der sich symmetrisch zur Strahl- Abtastrichtung ausbildende unterkühlte Bereich der Schmelze in seinen lateralen Abmessungen vergleichbar mit der Dicke der Schmelze ist. Dadurch erfolgt eine "automatische" Keimse¬ lektion mit einem anschließenden stabilen einkristallinen Schichtwachstum. Ist die Oberflächenschicht des Halbleiter- substrats aus Silizium,, zeigt die kriεtallisierte Schicht eine (100) -Orientierung, wobei das Schichtwachstum in einer <100>- Richtung erfolgt, die mit der Abtast- bzw. Scanrichtung iden¬ tisch ist.To achieve the temperature profile required according to the invention in the melt, energy is preferably irradiated onto the substrate by means of a laser which is operated in a TEM n - or TEM "- * vibration mode. TEM nn modes can also be used to generate the required temperature profile of a laser, which are superimposed so that an intensity profile comparable to the TEM - ^ mode results. The intensity profiles of a laser beam in the EM n1 oscillation mode or when two TEM Q modes are superimposed are shown in FIG. An essential feature of the intensity distribution that arises is that two intensity maxima occur symmetrically to a central intensity minimum. Through these defined in- Differences in intensity, it is possible to set the temperature profile in the melt that follows the intensity profile of the laser beam in a targeted manner, ie to specify the lateral dimensions of the “supercooled” area of the melt as a function of the distance a intensity minimum - intensity maximum. According to the invention, the intensity distribution of the laser beam is selected such that the supercooled region of the melt which is formed symmetrically to the beam scanning direction is comparable in its lateral dimensions to the thickness of the melt. This results in an "automatic" seed selection with subsequent stable single-crystal layer growth. If the surface layer of the semiconductor substrate is made of silicon, the crystallized layer shows a (100) orientation, the layer growth taking place in a <100> direction which is identical to the scanning or scanning direction.
Bei der Kristalliεation einer Silizium-Oberflächenschicht sollte die laterale Ausdehnung des Bereichs der kritiεchen Un¬ terkühlung in der Schmelze das Drei- bis Fünffache der Schichtdicke betragen.In the crystallization of a silicon surface layer, the lateral extent of the area of critical subcooling in the melt should be three to five times the layer thickness.
Die Scangeschwindigkeit des intensitätεmodulierten Laser¬ strahls beträgt vorzugsweise 10 bis 500 mm/sek, der Strahl¬ durchmesser (bei 1/e-Intensität) auf der Subεtratoberflache
Figure imgf000006_0001
The scanning speed of the intensity-modulated laser beam is preferably 10 to 500 mm / sec, the beam diameter (at 1 / e intensity) on the substrate surface
Figure imgf000006_0001
Die Kriεtalliεation kann erfindungεgemäß in einer mit Do¬ tiergas gefüllten Kammer erfolgen, so daß die kristalliεierte Schicht während deε Aufwachsvorgangε gezielt dotiert werden kann. Bei der Dotierung von Silizium wird vorzugεweiεe Phos- phin (PH.,) oder Arsin (AsH zur Herstellung n-leitender Schichten, Diboran (B_Hg) oder Bortrichlorid (BC1_.) zur Herstellung p-leitender Schichten verwendet.According to the invention, the crystallization can take place in a chamber filled with doping gas, so that the crystallized layer can be specifically doped during the growth process. When doping silicon, preference is given to using phosphine (PH.) Or arsine (AsH to produce n-type layers, diborane (B_H g ) or boron trichloride (BC1_.) To produce p-type layers.
Damit können nach vorliegender Erfindung einkristalline Halbleiterschichten auf einem Substratmaterial entsprechend den jeweiligen Erfordernissen des elektronischen Bauelements bzw. der elektronischen Schaltung (Layout) gezielt - auch rechnergesteuert - ohne Keimvorgabe in beliebiger Richtung kristallisiert und in definierter Weise dotiert werden, ohne eine zusätzliche Abdeckungsschicht zur Stabilisierung der εchmelzflüssigen Oberfläche vorzusehen. Das ist insbesondere aus Wirtschaftlichkeitsgründen interessant, wenn man berück- , sichtigt, daß nur ein geringer Teil der Oberfläche eines IC- Chip (etwa 15%) mit aktiven Bauelementen belegt ist und daher einkristallin sein muß.Thus, according to the present invention, single-crystalline semiconductor layers on a substrate material can be crystallized in a targeted manner - also computer-controlled - in any direction and without doping, without an additional covering layer to stabilize the substrate provide molten surface. This is particularly interesting for reasons of economy, if one takes into account that only a small part of the surface of an IC chip (about 15%) is covered with active components and must therefore be single-crystal.
Mit diesem Kristallisationsverfahren können neue techni¬ sche Bauelemente auf dem Gebiet der Displaytechnik realisiert werden. Von Bedeutung ist dieses Verfahren weiterhin in der Optoelektronik, in der integrierten Optik sowie bei der Her¬ stellung von integrierten Solarzellen.With this crystallization process, new technical components in the field of display technology can be realized. This method is also of importance in optoelectronics, in integrated optics and in the production of integrated solar cells.
Bevorzugte Auεführungεbeispiele der Erfindung werden unter Bezugnahme auf die anliegenden Zeichnungen im einzelnen erläutert. In den Zeichnungen zeigenPreferred exemplary embodiments of the invention are explained in detail with reference to the attached drawings. Show in the drawings
Figur 1 einen schematischen Querschnitt durch eine SOI- Struktur (S_ilicon-On-Insulator) ;1 shows a schematic cross section through an SOI structure (S_ilicon-on-insulator);
Figur 2 Intensitätsprofile eines Laserstrahls im TEMn- -Schwingungsmode und bei Überlagerung von zwei TEM__- Schwingungsgmoden;FIG. 2 intensity profiles of a laser beam in TEM n - oscillation mode and when two TEM __ oscillation modes are superimposed;
Figur 3 den schematiεchen Aufbau einer Vorrichtung mit einem Ar-Laεer zur εelektiven Kriεtallisation nach dem erfin¬ dungsgemäßen Verfahren; und3 shows the schematic structure of a device with an Ar laser for selective crystallization according to the method according to the invention; and
Figuren 4a und 4b Rastεrelektronenmikroεkop-Aufnahmen von rekristallisierten Polysilizium-Bereichen auf einer SOI- Struktur, die mit Laserstrahlen im TEMπι -Schwingungsmode (a) bzw. im TEMnι -Schwingungsmode (b) erzielt wurden.FIGS. 4a and 4b scanning electron microscope images of recrystallized polysilicon regions on an SOI structure, which were achieved with laser beams in the TEM vibration mode (a) or in the TEM vibration mode (b).
Der Aufbau einer Vorrichtung zur Durchführung des erfin¬ dungsgemäßen Verfahrens ist schematisch in Figur 3 darge¬ stellt. Entsprechend dieser Anordnung sind im Strahlengang ei¬ nes Laserεtrahlε hintereinander ein Prisma 1, eine Laserröhre 2 zur Erzeugung des Laserstrahls (hier ein Ar-Laser) , eine verstellbare Aperturblende 3, ein Auskoppelspiegel 4, eine elektro-optische Modulationεeinrichtung mit einem ADP-Kristall 5 und einem dielektrischen Polarisator 6, ein Λ/4-Plättchen 7, ein Objektiv 8 sowie der zu bestrahlende Wafer 9 angeordnet.The structure of a device for carrying out the method according to the invention is shown schematically in FIG. According to this arrangement, a prism 1, a laser tube 2 for generating the laser beam (here an Ar laser), an adjustable aperture diaphragm 3, a coupling-out mirror 4, an electro-optical modulation device with an ADP crystal 5 are arranged one behind the other in the beam path of a laser beam and a dielectric polarizer 6, a Λ / 4 plate 7, an objective 8 and the wafer 9 to be irradiated.
Durch Verstellen der - gewöhnlich innerhalb des Laser- Resonators angeordneten - Aperturblende 3 werden die erfin-By adjusting the aperture diaphragm 3, which is usually arranged within the laser resonator, the invented
* dungsgemäß gewünεchten TEM-,- oder TE Q. -Schwingungs¬ moden bzw. die TEMnn-Schwingungsmoden des Lasers stabil ein- gestellt. Bei Auswahl von TEM -Schwingungsmoden werden die¬ se so überlagert, daß sich ein dem TEMn--Mode vergleichbares Intensitätsprofil des Laserstrahls ergibt.* according to the desired TEM -, - or TE Q. Vibration modes or the TEM nn vibration modes of the laser posed. When TEM oscillation modes are selected, they are superimposed in such a way that an intensity profile of the laser beam comparable to the TEM n mode results.
Das Λj4-Plättchen 7 ist im Strahlengang angeordnet, um eine zeitlich konstante, d.h. nicht oszillierende Absorption der Laserεtrahlung in der geschmolzenen bzw. zu schmelzenden Materialschicht zu erzielen. Der von der Oberfläche des Wafers 9 reflektierte Strahlanteil wird durch das λ/4-Plättchen 7 un¬ terdrückt, da dieser reflektierte, zirkulär polarisierte Strahlanteil beim Durchlaufen des Λ/4-Plättchens 7 wieder linear polarisiert wird, wobei jedoch die Polarisationsrich¬ tung senkrecht zur Polarisationsrichtung des einfallenden Laserstrahls ist. Der reflektierte Strahlanteil kann somit den dielektrischen Polarisator 6 nicht paεsieren und gelangt daher nicht zurück in den Laser-Resonator.The Λj4 plate 7 is arranged in the beam path in order to maintain a constant, i.e. to achieve non-oscillating absorption of the laser radiation in the melted or to be melted material layer. The portion of the beam reflected from the surface of the wafer 9 is suppressed by the λ / 4 plate 7, since this reflected, circularly polarized portion of the beam is linearly polarized again as it passes through the Λ / 4 plate 7, but the direction of polarization is perpendicular to the direction of polarization of the incident laser beam. The reflected beam portion can therefore not pass the dielectric polarizer 6 and therefore does not get back into the laser resonator.
Der gewünschte Strahldurchmesser auf der Oberfläche des Wafers 9 wird über die Brennweite des Objektivs 8 eingestellt. In der in Figur 3 dargestellten Anordnung findet beispiels- weiεe ein Objektiv mit einer Brennweite f = 25mm Anwendung, mit dem ein Strahldurchmeεεer von 10 μm auf der Wafer-Ober- flache eingeεtellt wird.The desired beam diameter on the surface of the wafer 9 is set via the focal length of the lens 8. In the arrangement shown in FIG. 3, for example, an objective with a focal length f = 25 mm is used, with which a beam diameter of 10 μm is set on the wafer surface.
Die Strahlbewegung auf dem Subεtrat 9 kann beispielsweise durch mechanisch bewegte Spiegel bzw. elektro-optische Ab¬ lenkelemente oder auch durch die mechanische Verstellung eines x-y-Tisches erfolgen, auf dem der Wafer 9 angeordnet ist. Die¬ se Elemente für die Ablenkung des Strahls auf der Substrat¬ oberfläche εind in Figur 3 nicht dargeεtellt. Die Steuerung der Strahlbewegung bzw. die Anεteuerung deε x-y-Tisches sowie die Modulation der Lichtintensität erfolgt über einen Rechner.The beam movement on the substrate 9 can take place, for example, by means of mechanically moved mirrors or electro-optical deflection elements or also by the mechanical adjustment of an x-y table on which the wafer 9 is arranged. These elements for deflecting the beam on the substrate surface are not shown in FIG. 3. The control of the beam movement or the control of the x-y table and the modulation of the light intensity is carried out by a computer.
In Figur 4 ist eine selektiv kristallisierte Si-Schicht nach erfolgter Strukturätzung gezeigt, wie sie nach dem er¬ findungsgemäßen Verfahren mit der oben unter Bezugnahme auf Figur 3 erläuterten Vorrichtung erzielt wurde. Bei der Struk¬ tur nach Figur 4a wurde die Substratoberfläche von oben nach unten mit einem Laserstrahl mit einem TEM». -Profil, bei der Struktur nach Figur 4b von unten nach oben mit einem Laser- strahl mit einem TEMQ1 -Profil abgetastet. Der 1/e-Durch- meεεer im Laser-Fokus betrug 10 μm bei einer Laserleiεtung von 2 Watt und einer Lichtwellenlänge von 488 nm. Kristallisiert wurde eine 0,5 μm dicke polykristalline Si-Schicht, die mit¬ tels chemischer Schichtabεcheidung (CVD) auf einem amorphen SiO?-Subεtrat hergestellt worden war.FIG. 4 shows a selectively crystallized Si layer after structural etching has taken place, as has been achieved by the method according to the invention with the device explained above with reference to FIG. 3. In the structure according to FIG. 4a, the substrate surface was scanned from top to bottom with a laser beam using a TEM. Profile, in the structure according to FIG. 4b, scanned from bottom to top with a laser beam with a TEM Q1 profile. The 1 / e diameter in the laser focus was 10 μm with a laser line of 2 watts and a light wavelength of 488 nm. A 0.5 μm thick polycrystalline Si layer was crystallized, which by means of chemical layer deposition (CVD) on an amorphous SiO ? -Subεtrat had been produced.
In beiden Figuren 4a und 4b sind deutlich drei Phasen von verschiedenen Kristallstrukturen zu unterscheiden, die auf un¬ terschiedliche Temperaturbereiche in der Schmelze bei der Kri¬ stallisation zurückzuführen sind. Im Hintergrund erkennt man die typische feinkörnige Struktur des unmodifizierten CVD- Polyεiliziumε. In dieεen Bereichen wurde beim Kriεtalliεa- tionεvorgang die Schmelztemperatur nicht erreicht. In den äu¬ ßeren Bereichen der Schmelzspur nimmt die Korngröße zu, und es entsteht eine scharfe Abgrenzung zum CVD-Polysiliziu . Die geometrische Form dieser Grenzflächenlinien zeigt exakt die Temperaturverteilung auf der Oberfläche im Bereich der abfal¬ lenden Flanke des profilierten Laserstrahls. Der Innenbereich der Schmelzspur hat eine einkristalline Struktur und ist von Außenbereichen mit langen filigranen Kristalliten eingeschlos¬ sen, die dem Temperaturgradienten in der Schmelze von der Au¬ ßenseite zur Innenseite folgen. In both FIGS. 4a and 4b, three phases can be clearly distinguished from different crystal structures, which can be attributed to different temperature ranges in the melt during crystallization. The typical fine-grained structure of the unmodified CVD polysilicon can be seen in the background. In these areas, the melting temperature was not reached during the crystallization process. The grain size increases in the outer regions of the melt trace, and there is a sharp demarcation from the CVD polysilicon. The geometrical shape of these interface lines shows exactly the temperature distribution on the surface in the area of the falling flank of the profiled laser beam. The inner region of the melt trace has a single-crystalline structure and is enclosed by outer regions with long filigree crystallites which follow the temperature gradient in the melt from the outside to the inside.

Claims

Patentansprüche Claims
1. Verfahren für die Kristalliεation dünner Halbleiter¬ schichten auf einem Subεtratmaterial, bei dem ein Energie- Strahl auf die Oberfiächenschicht des Substrat ateriaiε aufge¬ strahlt und dadurch in dieser Schicht eine Schmelze mit einem bestimmten Temperaturprofil erzeugt wird, dadurch gekennzeichnet, daß das erzeugte Temperaturprofil in der Schmelze einen unterkühlten Bereich im wesentlichen symmetriεch zu εeinem Zentrum aufweiεt, der in εeinen lateralen Abmessungen die gleiche Größenordnung wie die Dicke der Schmelze hat.1. A method for the crystallization of thin semiconductor layers on a substrate material, in which an energy beam is radiated onto the surface layer of the substrate and thereby a melt is produced in this layer with a certain temperature profile, characterized in that the temperature profile generated has a supercooled area in the melt, essentially symmetrical to its center, which in its lateral dimensions has the same order of magnitude as the thickness of the melt.
2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß als Subεtratmaterial eine SOI (_Silicon-On-Insulator) - Struktur verwendet wird, und daß die Schmelze in der polykristallinen Silizium-Ober¬ flächenschicht der SOI-Struktur erzeugt, und daraus eine ein- kriεtalline Siliziumschicht kristallisiert wird. 2. The method according to claim 1, characterized in that an SOI (_Silicon-On-Insulator) structure is used as the substrate material, and that the melt in the polycrystalline silicon surface layer of the SOI structure is produced, and a one crystalline silicon layer is crystallized.
3. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß die Bestrahlung des Subεtratmaterialε mit einem Laser-3. The method according to claim 1 or 2, characterized in that the irradiation of the Subεtratmaterialε with a laser
* strahl im TEM-..- oder TEMQ, -Schwingungsmode erfolgt.* Beam is in TEM -..- or TEM Q , vibration mode.
4. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß die Bestrahlung des Substratmaterialε mit einem Laser¬ strahl erfolgt, bei dem TEMQ0-Schwingungsmoden so überlagert werden, daß ein dem TEM... -Schwingungsmode vergleichbares In¬ tensitätsprofil entsteht.4. The method according to claim 1 or 2, characterized in that the substrate material is irradiated with a laser beam in which TEM Q0 vibration modes are superimposed in such a way that a TEM ... vibration mode comparable intensity profile is produced.
5. Verfahren nach einem der Ansprüche 1 bis 4, dadurch ge¬ kennzeichnet, daß der Durchmesser des Strahls auf der Ober¬ fläche des Subεtratmaterials 5 biε 20μm beträgt.5. The method according to any one of claims 1 to 4, characterized in that the diameter of the beam on the surface of the substrate material is 5 to 20 μm.
6. Verfahren nach einem der Ansprüche 1 biε 5, dadurch ge¬ kennzeichnet, daß die Scangeschwindigkeit des Strahls 10 bis 500 mm/sek. beträgt.6. The method according to any one of claims 1 biε 5, characterized ge indicates that the scanning speed of the beam 10 to 500 mm / sec. is.
7. Verfahren nach einem der Ansprüche 1 bis 6, dadurch ge¬ kennzeichnet, daß die lateralen Abmessungen des in der Schmel¬ ze erzeugten unterkühlten Bereichs das Drei- bis Fünffache der Dicke der aufgeschmolzenen Schicht betragen.7. The method according to any one of claims 1 to 6, characterized ge indicates that the lateral dimensions of the supercooled area produced in the melt are three to five times the thickness of the melted layer.
8. Verfahren nach einem der Ansprüche 1 bis 7, dadurch ge¬ kennzeichnet, daß die Kristallisation in einer mit Dotiergas gefüllten Kammer erfolgt. 8. The method according to any one of claims 1 to 7, characterized ge indicates that the crystallization takes place in a chamber filled with doping gas.
9. Verfahren nach Anspruch 8, dadurch gekennzeichnet, daß eine Siliziumschicht kristalliεiert wird, und daß alε Dotier- εtoffe Phoεphin (PH,) , Arsin (AεH,) , Diboran (B-Hg) oder Bortrichlorid (BC1,) verwendet werden.9. The method according to claim 8, characterized in that a silicon layer is crystallized, and that alε dopant εtoffe Phoεphin (PH,), arsine (AεH,), diborane (B-Hg) or boron trichloride (BC1,) are used.
10. Vorrichtung zur Kriεtalliεation dünner Halbleiterschich¬ ten auf einem Substratmaterial, gekennzeichnet durch folgende Elemente, die hintereinander im Strahlengang eines von einer Laεer-Strahlungsquelle (2) erzeugten Strahls angeordnet sind: eine einstellbare Aperturblende (3) , eine Modulationsein¬ richtung mit einem ADP-Kristall (5) und einem dielektrischen Polarisator (6) , ein Λ/4-Plättchen (7) und ein Objektiv (8) , wobei durch das Objektiv (8) der Laserstrahl mit einem vorgegebenen Strahldurchmesεer auf die Oberfläche des Sub- εtratmaterialε (9) fokuεεiert wird, und durch daε Λ/4-Plätt- chen der vom Subεtratmaterial (9) reflektierte Strahlanteil senkrecht zur Polariεationsrichtung des dielektrischen Pola¬ risators (6) linear polarisiert wird.10. Device for crystallizing thin semiconductor layers on a substrate material, characterized by the following elements, which are arranged one after the other in the beam path of a beam generated by a laser radiation source (2): an adjustable aperture diaphragm (3), a modulation device with an ADP Crystal (5) and a dielectric polarizer (6), a Λ / 4 plate (7) and a lens (8), the lens (8) passing the laser beam with a predetermined beam diameter onto the surface of the substrate material ( 9) is focused, and by means of the Λ / 4 plate, the beam component reflected by the substrate material (9) is linearly polarized perpendicular to the direction of polarization of the dielectric polarizer (6).
11. Vorrichtung nach Anspruch 10, dadurch gekennzeichnet, daß die Laser-Strahlungεguelle (2) ein Ar-Laser iεt.11. The device according to claim 10, characterized in that the laser radiation source (2) is an Ar laser iεt.
12. Vorrichtung nach Anεpruch 10 oder 11, dadurch gekenn¬ zeichnet, daß daε Subεtratmaterial (9) auf einem anεteuerbaren x-y-Tisch angeordnet iεt. 12. Device according to claim 10 or 11, characterized in that the substrate material (9) is arranged on a controllable x-y table.
PCT/DE1989/000342 1988-05-31 1989-05-30 Process and device for crystallization of thin semiconductor layers on a substrate material WO1989012317A1 (en)

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EP1047119A3 (en) * 1999-04-19 2001-10-10 Sony Corporation Process of crystallizing semiconductor thin film and laser irradiation system
JP2006080511A (en) * 2004-09-01 2006-03-23 Japan Steel Works Ltd:The Method and apparatus for reforming amorphous semiconductor by laser radiation
WO2007031209A1 (en) * 2005-09-12 2007-03-22 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Method for recrystallising layer structures of by zone melting, device for carrying out said mehtod and the use thereof
US7713848B2 (en) 2005-09-12 2010-05-11 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Method for re-crystallization of layer structures by means of zone melting, a device for this purpose and use thereof

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