WO1989010037A1 - Procede et appareil compensant le courant d'obscurite et la tension offset provenant d'une unite ccd - Google Patents
Procede et appareil compensant le courant d'obscurite et la tension offset provenant d'une unite ccd Download PDFInfo
- Publication number
- WO1989010037A1 WO1989010037A1 PCT/DK1989/000076 DK8900076W WO8910037A1 WO 1989010037 A1 WO1989010037 A1 WO 1989010037A1 DK 8900076 W DK8900076 W DK 8900076W WO 8910037 A1 WO8910037 A1 WO 8910037A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- dark current
- ccd
- unit
- integrator
- amplifier
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 9
- 230000001419 dependent effect Effects 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000000875 corresponding effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/63—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
Definitions
- the invention relates to a circuit for compensating for the dark current and thermal drift in the output voltage from a CCD-unit.
- This compensation is usually effected either by compensating directly in the analog signal from the CCD-unit or by converting the analog signal into digital representations which are processed in a digital processing unit for that purpose.
- the purpose of the present invention is to provide a method and an apparatus by which it is possible to effect the desired dark current and offset voltage compensation in such a way that the A/D-converter is included in the compensation loop without basing the compensation on computations in a digital processing unit and without using a high resolution A/D-converter.
- This purpose is achieved by the method specified in the characterizing portion of claim 1.
- the use of this method allows for compensating for dark current variations in the CCD-unit and for compensating for all the temperature dependent variations of the output voltages and conditions of all elements in the circuit.
- a quick tracking of the compensation circuit is obtained upon its activation.
- Claims 4 and 5 indicate preferred embodiments of the invention, claim 5 particularly specifying how it is possible to use an A/D-converter for conversion and dark current compensation for line pulses from a CCD-unit with two outputs.
- Claim 3 defines a particularly advantageous embodiment of the circuit, and it will be seen that only one single A/D-converter with a resolution corres-ponding to the wanted grey tone resolution is necessary.
- FIG. 1 shows a circuit in accordance with the invention
- Fig. 2 shows a preferred embodiment of the invention.
- Fig. 1 shows a circuit according to the invention.
- the purpose of the circuit is to convert analog signals from a CCD-unit 1 into digital representations.
- the output signal from the CCD-unit 1 is fed to a first amplifier 2, from the output of which the signal is fed to another amplifier 3, the output signals of which is fed to an A/D-converter 4.
- the A/D-converter is connected to a control logic circuit 5 and a digital comparator 6.
- Control circuit 5 serves to control A/D-converter 4 and the comparator 6 and to supply, in dependence on the output 7 from comparator 6, control signals to an amplifier 8 and a switch 9 via lines 10 and 11.
- CCD-unit 1 is of the type comprising a plurality of masked cells and the output voltage from these cells is used as a measure of the dark current in all of the cells of the CCD-unit.
- the voltage level from the masked cells in CCD-unit 1 is read out, the signal voltage is amplified in amplifiers 2 and 3 and converted into digital representations in A/D-converter 2.
- the comparator compares said digital representations to a predetermined digital number and supplies the result of the comparison to the control logic.
- the working point of amplifier 2 is shifted in a negative direction by supplying a positively moving signal from amplifier 8 to its negative input, said amplifier 8 constituting together with the resistors 12, 13, 14 and capacitors 15 and 16 an integrator whose time constant can be changed by switch 9.
- This integrator is arranged so that the direction of the voltage changes at the output is determined by the voltage level on line 10. If the output signal from the A/D-converter is far from the optimum, switch 9 is closed, thereby materially reducing the time constant of the integrator.
- the time of activating switch 9 is controlled by control logic 5 controlling the switch via line 11. When the output signal from the A/D-converter approaches the optimum, switch 9 is reopened and the integrator operates at a high time constant. This provides for obtaining a faster tracking.
- control logic 5 Inverting the voltage on line 10, following which the direction of the change of the output voltage from the integrator changes.
- A/D-converter 4 Under this control the output voltage of A/D-converter 4 always oscillates around the optimum value.
- the characteristic feature of the described control is that it includes almost all parts of the circuit whose drift may influence the output signal from A/D-converter 4.
- the control loop thus includes amplifiers 2 and 3, A/D-converter 4 and integrator 8. This makes it possible to compensate for changes in the output voltages of said components, said changes being mainly due to thermal variations.
- Fig. 2 shows a preferred embodiment of the invention making use of a CCD-unit with two outputs.
- the circuit associated with said CCD-unit is structured as shown in Fig. 2.
- the parts illustrated in Fig. 2 having the same function as in Fig. 1 are indicated by the same reference numerals.
- the circuit illustrated in Fig. 2 consists substantially of two sets of circuit elements identical with those shown in Fig. 1.
- An amplifier 2 or 2', an integrator 8 or 8' and a switch 9 or 9' are associated with each output from the CCD-unit.
- the output signals from amplifiers 2 and 2' are fed to switches 17 and 18. These switches provide for multiplexing the signal from amplifiers 2 and 2' to the input of amplifier 3.
- the control loop is in this case composed of the same components as shown in Fig. 1 , use being made, however, of a common A/D-converter 4 and a common comparator 6 for both outputs of the CCD-unit.
- An optimum utilization of the most expensive components of the control loop is attained by the above structure of the control loop, i.e. A/D-converter 4 and comparator 6.
- the CCD-unit is of the linear type, i.e. composed of a plurality of light-sensitive elements positioned along a straight line. In this way each read-put from the CCD-unit yields a representation of a line in the image to be scanned.
- the integrators according to the invention are constructed to work at two time constants controlled by switches 9 and 91. In a first position of the switches the integrators work at a low time constant used for tracking the control loop when is is far from the optimum dark current compensation, that is for instance the situation upon the starting-up of the apparatus or in case of big fluctations in the surrounding temperatures. In the second position of the switches the integrators work at a high time constant, thereby attaining the desired stable regulation around the optimum dark current compensation.
- the above specified structure of the integrator actually provides for obtaining a quick tracking to the optimum compensation and a stable regulation around this optimum compensation, thereby preventing the dark current compensation from changing during the read-out of one single line.
- Control logic 5 is not discussed in detail here, this being a circuit of conventional type.
- the control logic is constructed by means of a programmable logic network since it is then possible to implement the control logic in one single circuit.
- the CCD-unit is regarded to be a separate unit capable of reading out its own signals.
- this is incidentally not the fact and in a practical embodiment of the invention it is necessary to provide the control signals necessary for the CCD-unit.
- a programmable logic network for the implementation of the control logic it is possible to implement the generation og said control signals in the control logic in a simple and economic manner.
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DK185188A DK159235C (da) | 1988-04-06 | 1988-04-06 | Moerkestroemskompensering for ccd-enhed |
DK1851/88 | 1988-04-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1989010037A1 true WO1989010037A1 (fr) | 1989-10-19 |
Family
ID=8108537
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DK1989/000076 WO1989010037A1 (fr) | 1988-04-06 | 1989-04-06 | Procede et appareil compensant le courant d'obscurite et la tension offset provenant d'une unite ccd |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0400092A1 (fr) |
JP (1) | JPH03503703A (fr) |
DK (1) | DK159235C (fr) |
WO (1) | WO1989010037A1 (fr) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2682779A1 (fr) * | 1990-11-30 | 1993-04-23 | Lcia Insar | Dispositif de prise d'images lineaires d'une surface. |
DE4309724A1 (de) * | 1993-03-25 | 1994-09-29 | Kodak Ag | Verfahren zur temperaturabhängigen Dunkelstromkompensation bei CCD-Bildsensoren |
US5471244A (en) * | 1994-05-31 | 1995-11-28 | 3M Company | Automatic dark level zeroing for an analog video signal |
USH1616H (en) * | 1994-05-31 | 1996-12-03 | Minnesota Mining And Manufacturing Company | Web inspection system having enhanced video signal preprocessing |
WO1999008440A1 (fr) * | 1997-08-11 | 1999-02-18 | Sirona Dental Systems Gmbh | Procede pour la compensation du courant d'obscurite d'un detecteur electronique presentant plusieurs pixels |
WO2000040009A2 (fr) * | 1998-12-30 | 2000-07-06 | Intel Corporation | Circuit de compensation du courant d'obscurite |
US6977364B2 (en) | 2003-07-28 | 2005-12-20 | Asml Holding N.V. | System and method for compensating for dark current in photosensitive devices |
EP1803400A1 (fr) * | 2003-11-21 | 2007-07-04 | Eastman Kodak Company | Appareil de radiologie dentaire et procédé de traitement de signal utilisé correspondant |
US9407843B2 (en) | 2013-10-23 | 2016-08-02 | General Electric Company | Detector system and module for compensating dark current |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4473839A (en) * | 1981-11-13 | 1984-09-25 | Hitachi, Ltd. | Signal processing circuit for video camera |
US4580168A (en) * | 1982-05-27 | 1986-04-01 | Rca Corporation | Charge-storage-well dark current accumulator with CCD circuitry |
US4589025A (en) * | 1984-11-30 | 1986-05-13 | Rca Corporation | Dark current measurement and correction for video from field-transfer imagers |
US4652927A (en) * | 1982-11-30 | 1987-03-24 | Canon Kabushiki Kaisha | Image sensing device |
DD245047A1 (de) * | 1985-12-13 | 1987-04-22 | Univ Schiller Jena | Anordnung und verfahren zur korrektur der ausgangssignale einer halbleiterbildsensor-kamera |
-
1988
- 1988-04-06 DK DK185188A patent/DK159235C/da not_active IP Right Cessation
-
1989
- 1989-04-06 EP EP19890904532 patent/EP0400092A1/fr not_active Ceased
- 1989-04-06 WO PCT/DK1989/000076 patent/WO1989010037A1/fr not_active Application Discontinuation
- 1989-04-06 JP JP1504085A patent/JPH03503703A/ja active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4473839A (en) * | 1981-11-13 | 1984-09-25 | Hitachi, Ltd. | Signal processing circuit for video camera |
US4580168A (en) * | 1982-05-27 | 1986-04-01 | Rca Corporation | Charge-storage-well dark current accumulator with CCD circuitry |
US4652927A (en) * | 1982-11-30 | 1987-03-24 | Canon Kabushiki Kaisha | Image sensing device |
US4589025A (en) * | 1984-11-30 | 1986-05-13 | Rca Corporation | Dark current measurement and correction for video from field-transfer imagers |
DD245047A1 (de) * | 1985-12-13 | 1987-04-22 | Univ Schiller Jena | Anordnung und verfahren zur korrektur der ausgangssignale einer halbleiterbildsensor-kamera |
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2682779A1 (fr) * | 1990-11-30 | 1993-04-23 | Lcia Insar | Dispositif de prise d'images lineaires d'une surface. |
DE4309724A1 (de) * | 1993-03-25 | 1994-09-29 | Kodak Ag | Verfahren zur temperaturabhängigen Dunkelstromkompensation bei CCD-Bildsensoren |
US5471244A (en) * | 1994-05-31 | 1995-11-28 | 3M Company | Automatic dark level zeroing for an analog video signal |
USH1616H (en) * | 1994-05-31 | 1996-12-03 | Minnesota Mining And Manufacturing Company | Web inspection system having enhanced video signal preprocessing |
US6351519B1 (en) | 1997-08-11 | 2002-02-26 | Sirona Dental Systems Gmbh | Method for compensating the dark current of an electronic sensor having several pixels |
WO1999008440A1 (fr) * | 1997-08-11 | 1999-02-18 | Sirona Dental Systems Gmbh | Procede pour la compensation du courant d'obscurite d'un detecteur electronique presentant plusieurs pixels |
US6525769B1 (en) | 1998-12-30 | 2003-02-25 | Intel Corporation | Method and apparatus to compensate for dark current in an imaging device |
WO2000040009A3 (fr) * | 1998-12-30 | 2000-10-12 | Intel Corp | Circuit de compensation du courant d'obscurite |
WO2000040009A2 (fr) * | 1998-12-30 | 2000-07-06 | Intel Corporation | Circuit de compensation du courant d'obscurite |
US6977364B2 (en) | 2003-07-28 | 2005-12-20 | Asml Holding N.V. | System and method for compensating for dark current in photosensitive devices |
US7081610B2 (en) | 2003-07-28 | 2006-07-25 | Asml Holding N.V. | System for compensating for dark current in sensors |
EP1803400A1 (fr) * | 2003-11-21 | 2007-07-04 | Eastman Kodak Company | Appareil de radiologie dentaire et procédé de traitement de signal utilisé correspondant |
US8008628B2 (en) | 2003-11-21 | 2011-08-30 | Carestream Health, Inc. | Dental radiology apparatus and signal processing method used therewith |
US8319190B2 (en) | 2003-11-21 | 2012-11-27 | Carestream Health, Inc. | Dental radiology apparatus and signal processing method used therewith |
US8481956B2 (en) | 2003-11-21 | 2013-07-09 | Carestream Health, Inc. | Dental radiology apparatus and signal processing method used therewith |
US8481955B2 (en) | 2003-11-21 | 2013-07-09 | Carestream Health, Inc. | Dental radiology apparatus and signal processing method used therewith |
US8481954B2 (en) | 2003-11-21 | 2013-07-09 | Carestream Health, Inc. | Dental radiology apparatus and signal processing method used therewith |
US9407843B2 (en) | 2013-10-23 | 2016-08-02 | General Electric Company | Detector system and module for compensating dark current |
Also Published As
Publication number | Publication date |
---|---|
DK159235C (da) | 1991-03-04 |
DK185188A (da) | 1989-10-07 |
DK159235B (da) | 1990-09-17 |
DK185188D0 (da) | 1988-04-06 |
JPH03503703A (ja) | 1991-08-15 |
EP0400092A1 (fr) | 1990-12-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5376966A (en) | Image reading apparatus having a function for correcting dark signals generated in a photoelectric conversion element | |
US4523229A (en) | Shading correction device | |
CA2160960C (fr) | Methode et dispositif de commande de puissance pour amplificateur de puissance | |
US5267053A (en) | Automatic reference control for image scanners | |
US5266952A (en) | Feed forward predictive analog-to-digital converter | |
EP0150329B1 (fr) | Système de correction et de convertion numérique des signaux d'image | |
US5502578A (en) | Optical scanner having a variable resolution | |
US4342983A (en) | Dynamically calibrated successive ranging A/D conversion system and D/A converter for use therein | |
WO1989010037A1 (fr) | Procede et appareil compensant le courant d'obscurite et la tension offset provenant d'une unite ccd | |
EP0498882A1 (fr) | Dispositif et procede ameliores de remise a zero automatique pour systeme informatise d'acquisition de donnees tomographiques | |
KR890005235B1 (ko) | A/d변환장치 | |
US5455622A (en) | Signal processing apparatus and method for offset compensation of CCD signals | |
KR900019341A (ko) | 서어보(servo)증폭기 회로 | |
US5191445A (en) | Image reader | |
US5036186A (en) | Shading correction system for use with an optical scanner | |
JP2930100B2 (ja) | 赤外線センサのレベル調整回路 | |
US4481477A (en) | Method and apparatus for the real-time measurement of the small signal gain of an amplifier | |
US5517192A (en) | High resolution gain response correction circuit | |
JPH0996651A (ja) | 増幅回路 | |
JPS6376570A (ja) | 画像読取り装置 | |
KR940008796B1 (ko) | 화상신호처리 방법 및 회로 | |
JPH0570134B2 (fr) | ||
US4511855A (en) | Compensation for differences in gain among amplifiers | |
US6259087B1 (en) | Calibration apparatus for multi-element sensor | |
EP0160557A2 (fr) | Convertisseur AN à pliage |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): JP US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): AT BE CH DE FR GB IT LU NL SE |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1989904532 Country of ref document: EP |
|
WWP | Wipo information: published in national office |
Ref document number: 1989904532 Country of ref document: EP |
|
WWR | Wipo information: refused in national office |
Ref document number: 1989904532 Country of ref document: EP |
|
WWW | Wipo information: withdrawn in national office |
Ref document number: 1989904532 Country of ref document: EP |