WO1989004060A1

WO1989004060A1 - Transistor

Info

Publication number: WO1989004060A1
Application number: PCT/SE1988/000537
Authority: WO
Inventors: Staffan Gustafsson
Original assignee: Linköpings Silicon Construction Ab
Priority date: 1987-10-23
Filing date: 1988-10-14
Publication date: 1989-05-05
Also published as: SE8704121D0; EP0382775A1

Abstract

The present invention relates to a transistor, the emitter of which consists of a highly-doped semiconductor, and the gate electrode (5) of which is positioned in a semiconducting layer (6) between the emitter (4) and the collector (7) of the transistor. The gate electrode has a mesh, grid or finger structure made of a metal or a metal-semiconducting compound. The invention is characterized in that the minimum distance (a) between adjacent components of the metallic structure of the gate electrode (5) and the doping level in the semiconducting layer (6) are selected so that the area between the aforementioned components is depleted of charge carriers for all positive voltages between the gate electrode (5) and the emitter (4), and in that the distance (a) is greater than 0.5 mum.

Description

Trans stor

The present invention relates to a transistor, the emitter of which consists of a highly-doped semiconductor, and the gate electrode of which, which has a mesh, grid or finger structure made of a etal or a metal—semiconducting compound, is positioned in a semi— —conducting layer between the emitter and the collector of the transistor.

Background to the invention

The execution of the gate or the base of a transistor in metal offers distinct advantages over the execution of the gate as a semiconductor. The first metal—base transistor was proposed as early as 1960 by C. A. Mead (C. A. Mead, Proc. IRE 48, 359 (1960)). The intention in this case was that the electrons should pass straight through the metal with the help of so—called hot electrons. Other variants of early metal—base transistors include the tunnel transistor, in which the electrons tunnel through the metalLic base, proposed by Attala and Rose (US—A—3,121,809 and US—A—3,250,966). A number of variants of this transistor have also been proposed in more recent years (S. M. Sze, "Physics of Semiconductor Devices, Chapter 11, John Wiley 8 Sons).

An entirely novel design of metal—base transistors was proposed in 1979 by Bozler et al. (C. Bozler and G. D. Alley, IEEE Trans. Electron Dev, ED-27, pp. 1128-1141, (1980)). Bozler's transistor, known as the Permeable Base Transistor (PBT), consists of an embedded network of metal situated between the emitter and the collector of the transistor (US-A-4,378,629). The metal-^Jto-metal distance, which must be crossed by the current, is very small, being of the order of 200-1500 S (0.02 - 0.15 ym) (US-A- ,495,511>, which makes the transistor difficult to manufacture. The active area between the components of the metal structure is relatively highly-doped (n—doped). In Bozler's transistor the current passing through the transistor is controlled simply by means of the applied voltage between the gate electrode (base) and the emitter, i.e. the value of the input current at the base is of little significance to the amplification of the transistor.

Vertical Schottky barrier field effect transistors, so-called MESFET transistors, represent a group of transistors with a structure similar to that of the PBT transistor, and were proposed by Frensley et al. (W. Frensley et al. IEEE Trans, on Electron Dev. ED-32, pp. 952-356), and by Goronkin et al. (US-A-3,999,281), amongst others. The transistor exhibits a distance between the gate metals of more than 0.5 μ , which is considerably greater than in the PBT transistor, and relatively high doping 10^^—10^° atoms/cm^), in order to prevent depletion of the charge carrier between the gate metals, which is a condition for the active function of field effect transistors. This condition also means that a field effect transistor must always be subjected to an inverse voltage in order to function; that is to say a negative voltage must be applied to the gate electrode (base) in order for the transistor to be capable of functioning. Baliga et al. (US—A—4,343,015) propose another, trapeze—like structure in the area of the gate for a field effect transistor, in which the distance between the gate metals is also considerably greater than 0.5 ym.

Vertical field effect transistors also exist with gate electrodes made of semiconductors, in which the gate electrode is executed as a finger structure; examples of these are provided by the so—called "Multichannel Vertical JFET" proposed by Zuleeg in 1963 (R. Zuleeg, Solid-State Electron. 10, pp. 559-576, .1967), and the so-called Gridistor proposed by Teszner (1962, 1972) (S. Teszner and R. Gicquel, Proc. IEEE 52, pp. 1502-1513, 1964), (US-A-3,274,461 and US-A-3,497,777).

Another transistor of a previously disclosed kind is the so-called bipolar Static Induction Transistor (BSIT), which is a vertical current—controlled transistor, proposed by Nishizawa. If the gate electrode or base of this transistor is subjected to a forward voltage, i.e. if a positive voltage is applied to the base, the current through the transistor will be controlled by the current entering the base (J. Nishizawa, T. Terasaki and J. Shibata, IEEE Trans. Electron. Dev. ED-22, pp. 185 (1975) (EP,A1,243 684 and EP,A1,121 068) ); by subjecting the gate electrode to an inverse voltage, a transistor with triode—like characteristics will be obtained. This transistor has a base consisting of a doped semiconductor. There are also a number of other transistors with similar structures, i.e.^" vertical transistors with an inlaid gate between the emitter and the collector. A common feature of these, however, is the fact that they have a current—voltage characteristic or are not controlled by the current from the gate (base). Examples of other such transistors are the so—called "space charge limited dielectric triode" proposed by Wright 1962 (G. T. Wright, Solid-St. Electron. 5, 17 1962) and the so-called "Space Charge Limited Triode" proposed by Zuleeg (R. Zuleeg, Solid—State Electron. 10, pp. 449-460 1967).

Semiconductor components with finger structures and with etched cavities (trenches) may be assumed to become an increasingly common method of manufacturing components. This is concerned, on the one hand, with the continuous improvements to the manufacturing processes (plasma etching) and, on the other hand, with the advances in the development of semiconductor materials (110—silicon). This is associated with the ability to manufacture new classes of components and to make improvements to existing components. Examples of this are vertical field effect transistors, SIT transistors, memory elements, and bipolar transistors (heterojunction transistors) (DE,A1,3 108491, EP,A2,0 106724).

With the exception of the BSIT type of transistor, the transistors referred to above may be regarded as field—controlled transistors. There is thus no current injection from the gate electrode which is of any consequence to the amplif cation characteristics of the transistor. In the case of such transistors of a previously disclosed kind, there are a number of major differences between these transistors and the present invention: a) the metal—to—metal distance across which the current is to flow is very small, being of the order of 200-1500 S CO.04-0.15 ym), and has a relatively highly-doped gate area (the area between the gate electrodes), giving a complicated manufacturing process and presenting difficulties with regard to reproducibility; or b) the current from the emitter to the collector passes via voltage—controlled "tunneling" straight through the metal, i.e. the voltage on the metal electrode controls the ability of an electron to pass through the metal (in this case there is no mesh, grid or finger structure); or c) the transistors are f eld—controlled CFET), i.e. the distance between adjacent components in the gate electrode are not entirely depleted when the transistor is in its active range and when the Schottky diode of the transistor between the gate electrode and the emitter is subjected to an inverse voltage (negative voltage on the gate electrode); or d) the gate electrodes are executed as a highly-doped semiconductor.

Object of the invention

A primary object of the present invention is to make available a current—controlled vertical transistor with a metal gate, with the aim of achieving a lower base resistance than in conventional transistors in which the gate consists of semi onductors. This is achieved in accordance with the invention by selecting the minimum distance between adjacent components in the metal structure of the gate electrode and the doping level in the semiconductor layer in such a way that the area between the aforementioned components is depleted on the charge carrier at all positive voltages between the gate electrode and the emitter, and in such a way that the distance is greater than 0.5 ym. The achievement of a low base resistance is of critical significance to bipolar transistors Ccurrent—controlled transistors). Any increase in the base resistance, i.e. the resistance to scatter in the base, will reduce the capacity of the transistor to amplify at high frequencies, and is in principle the only quantity which can prevent the transistor from working at the frequencies determined by the transient time of the electrons Cthe current) from the emitter to the collector in the transistor. The resistance to scatter also reduces the current capacity and the current density (the effect capacity) of the transistor, when amplification will be reduced radically at higher currents due to the fact that the base resistance distributes the current unevenly over the active surface.

Description of the drawings

The invention is explained below with reference to the accompanying drawings, of which Fig. 1 illustrates schematically a structure of the kind most commonly encountered from the point of view of production engineering. Figs. 2—5 illustrate different variants of the invention, and Fig. 6 is a partially sectioned perspective view of the transistor in accordance with Fig. 1.

Description of the invention

In Fig. 1 the designation 5 is used in respect of the transistor's gate electrode, which is situated in cavities 11 etched into a semiconducting layer 6. The transistor has three connections. An emitter wire 1, in which the current Ig flows, is connected to the transistor via a metal layer 3, so that so-called oh ic contact is made to the emitter 4 of the transistor. A control current Iβ flows in a base wire 2. The base wire 2 is connected to the gate electrode 5. The control area of the transistor has the width a and consists of a semiconducting layer 6, which is in contact with the transistor's collector 7, which has an ohmic metal connection 8 to a collector terminal 9.

The transistor can be executed in principle in two different ways, n—channel and p—channel, in which the semi onducting layer 6 and the emitter 4 and the collector are executed in n—doped and in p—doped material respectively. The following argument is applicable to n—channel, but is also applicable to p—channel if electrons are replaced by holes and holes are replaced by electrons.

If a positive voltage is applied between the gate metal 5 and the emitter 4 (the Schottky diode is subjected to a forward voltage), current control can be obtained under certain conditions in a structure such as that proposed here. The metal forms a so—called Schottky barrier, which essentially conducts a current of electrons, i.e. the current consists essentially of electrons which move from the semiconducting layer 6 to the metal gate 5. On the assumption that the semiconductor is to all intents and purposes undoped, or is low-doped, a so—called double injection will occur, which means that a significant current will also flow from the metal gate 5 to the semiconducting layer 6. This current is a so-called hole current, i.e. the current is conducted by holes, which is of an order of magnitude not exceeding one half of the electron current (in practice 5—30%), although this depends to a very high degree on the semiconductor material), and will provide the controlling function in the transistor. The area between adjacent components of the metal structure 5 of the gate electrode must also be totally depleted of charge in order for a controlling function to arise. The injected holes form a surplus of holes, a hole plasma, between the aforementioned components of the gate electrode 5, which functions as a virtual base. The size of this surplus of holes (hole plasma) is determined by the current injection from the metal gate 5, which in turn controls the main current Ig from the emitter 4 through the semiconductor Layer 6 to the collector 7. This control is achieved through the requirement for neutrality of charge in the semiconductor, i.e. every hole must have a counterpart in an electron, and as a result of the fact that a voltage applied between the emitter and the collector will draw a current of electrons to the collector. The condition requiring the controlling area (the virtual base) to be depleted is determined by the depletion area of the Schottky barrier, and can be expressed as follows:

where a is the distance between the gate electrodes, ςj is the electrode concentration in the semiconductor, εεg is the dielectric constant for the semiconductor, and Φg is the integral potential formed in the Schottky barrier when the applied voltage is 0 V.

The requirement for the semiconductor to be low-doped or undoped is determined by the relationship:

N_D/n-j < 10000

where ND is the donor concentration (doping concentration) in the semiconducting layer, and n - is the intrinsic concentration of charge carriers for the semiconductor in the layer. In the case of silicon this gives a maximum value for p of approximately 10¹ /cm3.

According to one particular characteristic of the invention, the metal structure 5 is connected directly to the semiconducting layer 6, thus enabling manufacture of the transistor to take place without etched cavities. In this case the undesired electron current from the emitter 4 to the gate electrode 5 must be avoided as far as possible; see Fig. 2. This is achieved by depositing an oxide layer 10 on the metal structure of the gate electrode 5.

The efficiency of the transistor also increases if a thin layer of oxide 12 is introduced between the metal structure and the semiconducting layer (H. C. Card et al., Solid—St. Electron. 16, pp. 365-374, 1973); see Fig. 3 and Fig. 4. The thickness of the oxide in this case should only be about 10 Sngstrόm, 10 10~'^u. This is considerably less than the protective oxide 10 which is deposited on the metal and which must be of the order of magnitude of 0.1 ym. If the collector 7 has opposite doping 13, indicated in Fig. 5 by a pattern of squares, to that of the semiconducting layer 6, the efficiency of the current can be further increased when a thyristor structure is produced; see Fig. 5. The thyristor structure consists of an emitter ⁽n⁺), the virtual base (p—plasma), the semiconductor (ri^"~) and the collector (p⁺).

The metal electrode 5 may consist of metals or metal silicides which possess a high so—called Schottky barrier (approximately 0.7 — 0.8 V). Suitable metals'are palladium (Pd), platinum (Pt> or gold (Au).

Claims

Patent Claims

1. Transistor, the emitter of which consists of a highly-doped semiconductor, and the gate electrode (5) of which, which has a mesh, grid or finger structure made of a metal or a metal— —semiconducting compound, is positioned in a semiconducting layer (6) between the emitter (4) and the collector (7) of the transistor, c h a r a c t e r i z e d in that the minimum distance (a) between adjacent components of the metal structure of the gate electrode (5) and the doping level in the semiconducting layer (6) are selected so that the area between the aforementioned components is depleted of charge carriers for all positive voltages between the gate electrode (5) and the emitter (4), and in that the distance (a) is greater than 0.5 ym.

2. Transistor according to Patent Claim 1, c h a r a c t e r i z e d in that the doping level is less than four to the power ten times greater than the intrinsic doping level of the material.

3. Transistor according to Patent Claim 1, c h a r a c t e r i z e d in that the metal structure (5) is connected to the semiconducting layer (6) and exhibits a layer (10) of oxide affording protection against the emitter (4).

4. Transistor according to Patent Claim 1, c h a r a c t e r i z e d in that the metal structure (5) exhibits a layer (10, 12) of oxide affording protection against the semiconducting layer (6) and against the emitter (4), in conjunction with which the oxide layer affording protection against the emitter is thick, and the oxide layer affording protection against the metal structure (5) is of the order of 10 Sngstrδm.

5. Transistor according to Patent Claim 1, c h a r a c t e r i z ed in that the structure of the gate electrode (5) is arranged in a cavity (11) etched into the emitter material (4) and the semiconducting layer (6).

6. Transistor according to Patent Claim 4, c h a r a ct e r i zed in that the walls of the aforementioned cavity (11) are covered by a thin oxide Layer (12).

7. Transistor according to any of the preceding Patent Claims, c h a r a c t e r i z e d in that the collector (7) is made of a metal or a metal—semiconducting compound.

8. Transistor according to any of the preceding Patent Claims, c h a r a c t e r i z e d in that the collector (7) has opposite doping to the semiconducting layer (6).

9. Transistor according to any of the preceding Patent Claims, c h a r a c t e r i zed in that the metal structure (5) consists of the metal palladium (Pd) or the metal—silicon compound palladium silicide.

10. Transistor according to any of the preceding Patent Claims, c h a r a c t e r i zed in that the metal structure (5) consists of the metal platinum (Pt) or the metal—silicon compound platinum silicide.