WO1989003087A3 - System integrated fault-tree analysis methods (siftan) - Google Patents

System integrated fault-tree analysis methods (siftan) Download PDF

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Publication number
WO1989003087A3
WO1989003087A3 PCT/US1988/003282 US8803282W WO8903087A3 WO 1989003087 A3 WO1989003087 A3 WO 1989003087A3 US 8803282 W US8803282 W US 8803282W WO 8903087 A3 WO8903087 A3 WO 8903087A3
Authority
WO
WIPO (PCT)
Prior art keywords
software
fault
hardware
siftan
tree analysis
Prior art date
Application number
PCT/US1988/003282
Other languages
French (fr)
Other versions
WO1989003087A2 (en
Inventor
Mark R Rutenberg
Original Assignee
Int Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Standard Electric Corp filed Critical Int Standard Electric Corp
Publication of WO1989003087A2 publication Critical patent/WO1989003087A2/en
Publication of WO1989003087A3 publication Critical patent/WO1989003087A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2117/00Details relating to the type or aim of the circuit design
    • G06F2117/02Fault tolerance, e.g. for transient fault suppression

Abstract

The subject invention employs a system integrated fault-tree analysis (SIFTAN) which has the unique ability to detect all latent hardware and software design defects that could cause unanticipated critical failure of a complex software controlled electronic system. This new approach modifies and then integrates two existing system analysis techniques-namely, hardware fault-tree analysis (HFTA) and software fault-tree analysis (SFTA). The resultant integrated technique is identified as SIFTAN for system integrated fault-tree analysis. Through its integrated hardware/software scope and its critical failure focus, SIFTAN has unique potential to solve the essential analytical limitation behind the software reliability problem. The system exceeds the scope of all current system analysis techniques by providing a system free from all potential critical specification hardware or software design errors. The system accomplishes the above-noted objects by performing fault-tree analysis with respect to the contents of a dynamic ''stack of contradiction parameters'' and then superimposing the modified hardware and software fault-trees onto each other. The superposition is accomplished by automatically branching from the software to a specified fault-tree hardware whenever hardware could result in a critical system output. It is important to indicate that the SIFTAN system is applied with great advantages to early conceptual levels of system design in addition to its certification of the final design implementation.
PCT/US1988/003282 1987-10-01 1988-09-23 System integrated fault-tree analysis methods (siftan) WO1989003087A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10362687A 1987-10-01 1987-10-01
US103,626 1987-10-01

Publications (2)

Publication Number Publication Date
WO1989003087A2 WO1989003087A2 (en) 1989-04-06
WO1989003087A3 true WO1989003087A3 (en) 1989-05-05

Family

ID=22296167

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1988/003282 WO1989003087A2 (en) 1987-10-01 1988-09-23 System integrated fault-tree analysis methods (siftan)

Country Status (4)

Country Link
AU (1) AU2788589A (en)
CA (1) CA1305797C (en)
IL (1) IL87695A (en)
WO (1) WO1989003087A2 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2321118B (en) * 1997-01-14 2002-03-27 Integral Design Res Ltd Development of integrated circuits
DE50001644D1 (en) * 1999-07-28 2003-05-08 Siemens Ag DIAGNOSTIC METHOD AND DIAGNOSTIC SYSTEM FOR A TECHNICAL SYSTEM
CN103198212A (en) * 2013-03-15 2013-07-10 哈尔滨工程大学 Fault tree analysis based method for predicting reliability of erbium-doped fiber drive circuit for light source
CN105224782B (en) * 2014-10-16 2018-02-13 华北电力大学 A kind of transformer probability of malfunction computational methods based on fault mode
CN105718321B (en) * 2016-01-22 2018-11-20 辽宁工程技术大学 A kind of method of determining system probabilistic compct and structure importance
CN112463642B (en) * 2020-12-16 2021-08-03 北京京航计算通讯研究所 Software design defect checking method and system based on fault mode
CN114925466B (en) * 2022-05-05 2024-04-19 中国北方车辆研究所 Four-class five-dimensional FMECA method for comprehensive transmission device

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
1980 Proceedings Annual Reliability and Maintainability Symposium, IEEE (US) F. Tuma: "Software/Hardware integrated critical path analysis (ICPA) pages 384-7 *
IEEE Transactions on Software Engineering, vol. SE-11, no. 1, January 1985 IEEE (US) M.O. Fryer: "Risk assessment of computer controlled systems", pages 125-9 *
The Journal of Systems and Software, vol. 3, no. 1, March 1983 Elsevier North Holland Inc. (NL) N.G. Leveson et al.: "Software fault tree analysis", pages 173-181 *

Also Published As

Publication number Publication date
CA1305797C (en) 1992-07-28
IL87695A0 (en) 1989-02-28
IL87695A (en) 1992-06-21
AU2788589A (en) 1989-04-18
WO1989003087A2 (en) 1989-04-06

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