GB2321118B - Development of integrated circuits - Google Patents

Development of integrated circuits

Info

Publication number
GB2321118B
GB2321118B GB9700599A GB9700599A GB2321118B GB 2321118 B GB2321118 B GB 2321118B GB 9700599 A GB9700599 A GB 9700599A GB 9700599 A GB9700599 A GB 9700599A GB 2321118 B GB2321118 B GB 2321118B
Authority
GB
United Kingdom
Prior art keywords
development
integrated circuits
circuits
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9700599A
Other versions
GB2321118A (en
GB9700599D0 (en
Inventor
Joseph Knox
Lionel Barker
Michael Buckley
Martina Finnerty
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
INTEGRAL DESIGN RES Ltd
Original Assignee
INTEGRAL DESIGN RES Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by INTEGRAL DESIGN RES Ltd filed Critical INTEGRAL DESIGN RES Ltd
Priority to GB9700599A priority Critical patent/GB2321118B/en
Publication of GB9700599D0 publication Critical patent/GB9700599D0/en
Publication of GB2321118A publication Critical patent/GB2321118A/en
Application granted granted Critical
Publication of GB2321118B publication Critical patent/GB2321118B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
GB9700599A 1997-01-14 1997-01-14 Development of integrated circuits Expired - Fee Related GB2321118B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9700599A GB2321118B (en) 1997-01-14 1997-01-14 Development of integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9700599A GB2321118B (en) 1997-01-14 1997-01-14 Development of integrated circuits

Publications (3)

Publication Number Publication Date
GB9700599D0 GB9700599D0 (en) 1997-03-05
GB2321118A GB2321118A (en) 1998-07-15
GB2321118B true GB2321118B (en) 2002-03-27

Family

ID=10805905

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9700599A Expired - Fee Related GB2321118B (en) 1997-01-14 1997-01-14 Development of integrated circuits

Country Status (1)

Country Link
GB (1) GB2321118B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2371640B (en) 2001-01-26 2004-09-01 Advanced Risc Mach Ltd Validating integrated circuits
US7526745B2 (en) 2004-12-08 2009-04-28 Telefonaktiebolaget L M Ericsson (Publ) Method for specification and integration of reusable IP constraints
DE112005003449A5 (en) * 2005-03-04 2008-01-10 Qimonda Ag Test method and method for a semiconductor circuit composed of subcircuits

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0296812A2 (en) * 1987-06-22 1988-12-28 Cadence Design Systems, Inc. Block diagram simulator
WO1989003087A2 (en) * 1987-10-01 1989-04-06 International Standard Electric Corporation System integrated fault-tree analysis methods (siftan)
US4870575A (en) * 1987-10-01 1989-09-26 Itt Corporation System integrated fault-tree analysis methods (SIFTAN)
EP0442277A2 (en) * 1990-02-16 1991-08-21 International Business Machines Corporation A logic simulation using a hardware accelerator together with an automated error event isolation and trace facility
US5437037A (en) * 1992-06-05 1995-07-25 Mega Chips Corporation Simulation using compiled function description language
US5574893A (en) * 1992-10-29 1996-11-12 Altera Corporation Computer logic simulation with dynamic modeling

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0296812A2 (en) * 1987-06-22 1988-12-28 Cadence Design Systems, Inc. Block diagram simulator
WO1989003087A2 (en) * 1987-10-01 1989-04-06 International Standard Electric Corporation System integrated fault-tree analysis methods (siftan)
US4870575A (en) * 1987-10-01 1989-09-26 Itt Corporation System integrated fault-tree analysis methods (SIFTAN)
EP0442277A2 (en) * 1990-02-16 1991-08-21 International Business Machines Corporation A logic simulation using a hardware accelerator together with an automated error event isolation and trace facility
US5437037A (en) * 1992-06-05 1995-07-25 Mega Chips Corporation Simulation using compiled function description language
US5574893A (en) * 1992-10-29 1996-11-12 Altera Corporation Computer logic simulation with dynamic modeling

Also Published As

Publication number Publication date
GB2321118A (en) 1998-07-15
GB9700599D0 (en) 1997-03-05

Similar Documents

Publication Publication Date Title
GB9929084D0 (en) Modification of integrated circuits
EP1043774A4 (en) Semiconductor integrated circuit
GB2348992B (en) Logic circuit
AU3793099A (en) Functional verification of integrated circuit designs
IL119960A0 (en) Integrated circuit chip
GB2323228B (en) Mixer circuits
GB9708786D0 (en) Elecrochemical sensing circuits
AU9806998A (en) Integrated circuit layout methods and layout structures
GB9607528D0 (en) Integrated circuit processor
EP0735583A3 (en) Semi-conductor integrated circuits
GB9721082D0 (en) Integrated circuit
GB9406263D0 (en) Integrated circuit
HK1016383A1 (en) Telephone-system interface circuit
GB2327162B (en) Cmos integrated circuit
GB2321118B (en) Development of integrated circuits
GB2296587B (en) Integrated circuit
GB2330878B (en) Ignition circuits
GB9818895D0 (en) Integrated circuits
HUP9800724A3 (en) Integrated circuit
GB2338573B (en) Modeling integrated circuits
GB2341937B (en) Determining timing of integrated circuits
GB2296585B (en) Integrated circuit
GB2337616B (en) Integrated circuit
GB9714573D0 (en) Integrated circuits
GB9725173D0 (en) Manufacture of interface circuits

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee