WO1981001079A1 - Thin film structure for ceramic substrates - Google Patents

Thin film structure for ceramic substrates Download PDF

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Publication number
WO1981001079A1
WO1981001079A1 PCT/US1980/001202 US8001202W WO8101079A1 WO 1981001079 A1 WO1981001079 A1 WO 1981001079A1 US 8001202 W US8001202 W US 8001202W WO 8101079 A1 WO8101079 A1 WO 8101079A1
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WO
WIPO (PCT)
Prior art keywords
layer
conductive
photo
metal
sensitive material
Prior art date
Application number
PCT/US1980/001202
Other languages
French (fr)
Inventor
G Geller
B Bedard
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Priority to DE8080902196T priority Critical patent/DE3068442D1/en
Publication of WO1981001079A1 publication Critical patent/WO1981001079A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P11/00—Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H01L27/016—Thin-film circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H01P1/201—Filters for transverse electromagnetic waves
    • H01P1/205—Comb or interdigital filters; Cascaded coaxial cavities
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H05K1/0293—Individual printed conductors which are adapted for modification, e.g. fusable or breakable conductors, printed switches
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/171—Tuning, e.g. by trimming of printed components or high frequency circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49004—Electrical device making including measuring or testing of device or component part

Definitions

  • the present invention relates to the field of metallized substrates for communications applications and, more particularly, to a means of tuning thin film structures such as stripline filters, using automated low-power laser trimming.
  • Metallization on non-conductive substrates such as ceramics is well known in the art for such circuit compo ⁇ nents as stripline filters.
  • Such filters typically include a configuration or pattern of conductive elements on one surface of the ceramic plate, these elements interacting with a relatively large area of ground plane on the opposing substrate surface.
  • the ground plane is required to be a very low conductivity layer, typically including a heavy (one mil) layer of plated copper. Filters or other such components may require removal of a portion of the conductive ground plane for tuning or other adjustment. Such adjustments have been made by abrasion; i.e. , mechanically removing small portions of the ground plane in the appropriate areas, using a diamond grinding wheel or sand trimmer.
  • Thick film resistors on substrates can be trimmed precise ly by low-power ( 1. 8 kw input power) laser beams , but that power is not suff icient to trim a heavily plated ground plane.
  • one or more conductive circuit components are formed on a first surface.
  • a conductive layer or ground plane is formed on a substantial portion of the second surface of the wafer opposite at least one element of a circuit component which requires a fine tuning or trimming adjustment.
  • the ground plane will consist of a thin conductive layer, such- as copper evaporated over titanium, a heavy conductive layer such as plated copper, and a thin protective layer of a noble metal such as gold.
  • the heavy copper layer will have an aperture opposite at least a portion of the component to be adjusted. Therefore, tuning or trimming can be accom ⁇ plished by removing discrete areas of the thinner layers within the aperture in the heavy layer, using a relative ⁇ ly low-power laser beam, such as those used to trim thick film resistors.
  • Fig. 1 is a bottom view of a stripline filter sub ⁇ strate.
  • Fig. 2 is a cut-away, perspective view of a portion of the substrate of Fig. 1, along the line 2-2.
  • Fig. 3 shows the successive steps in one preferred embodiment of the invention.
  • Fig. 4 shows the successive steps in another embodi ⁇ ment, which provides for areas of bare substrate.
  • a very thin layer of titanium is deposited first to provide adhesion for the subsequent layers of metal.
  • a thin layer of copper is evaporated over the titanium.
  • a photo-resist is applied and exposed to ultraviolet light through a mask, the unexposed areas resulting eventually in conductive areas.
  • the resist is developed, the unhardened portions are stripped off and a thick layer of copper is plated on the areas of bare copper.
  • a thin layer of gold is plated on over all, then the hardened resist is stripped from the substrate. Etching subsequently removes all thin layers down to the bare substrate in the desired areas.
  • the invention is used for the fine tuning (trimming) of a stripline filter on a substrate 10 (see Figs. 2-4) such as a ceramic wafer.
  • a substrate 10 such as a ceramic wafer.
  • the visible surface of the substrate is covered by a ground plane 12 having three apertures or "trim windows" 14.
  • the other surface of the substrate 10 has on it (as indicated by dashed lines in Fig. 1) ele- ments 16A, 16B and 16C of the filter circuit.
  • Stripline filters are well known in the art, and have previously been constructed using a layer of heavy copper throughout the ground plane. Tuning or other fine adjustment has been accomplished by use of an abrasion technique using a diamond grinding wheel. No further description of the circuit aspects of the filter will be given here, since the present invention is only concerned with the capability of fine tuning by the removal of discrete areas of the ground plane with a low-power laser beam.
  • FIG. 2 In the cut-away, perspective view of Fig. 2, the filter of Fig. 1 is shown cut along the line 2-2 with the edges of circuit elements 16A, B and C visible on the lower surface (normally considered the top side of the filter) .
  • the ground plane 12 and windows 14 are on the upper side of the ceramic wafer 10 in this view and it is apparent that the copper layer within the window 14 is thinner than it is in the adjacent areas. It is to be noted that no attempt has been made to scale any of the drawing figures; instead, typical dimensions are given as appropriate in the text.
  • Fig. 3 shows a series of progressive steps in producing the ground plane only of one embodiment of the invention.
  • Fig. 3A shows the bare substrate 10 and
  • Fig. 3B shows a very thin (500 A) added layer 18 of deposited titanium.
  • Fig. 3C a thin (10,000 A) layer 20 of cop ⁇ per has been evaporated over the titanium layer 18.
  • a film 22 of a photo-resist (such as that sold commercially as RistonTM 218R) has been added, and a mask 24 is shown in position to expose the area 14' of the photo-resist film 22 for providing one window 14 (Figs. 1 and 2) .
  • a thin (5000 A) layer 26 of gold is plated over all exposed copper, both thick and thin layers.
  • a low-powered laser beam can be manually or automatically controlled to remove as much of the thin layers of gold and copper in any of the windows 14 as is required; e.g., for tuning a stripline filter.
  • Fig. 4 is seen the series of progressive steps in an alternate embodiment which can provide both the trim windows 14 as shown in Fig. 3 and areas of bare substrate which may be desired for other purposes than tuning.
  • Figs. 4A-4D are the same as Figs. 3A-3D except that the mask 24-1 has an area 14' for providing the window or aperture 14 and another area 28' for providing an area 28 (see Fig. 4M) of bare substrate.
  • the unhardened resist is removed as in Fig. 4E, leaving areas 22-1 and 22-2.
  • the heavy copper layer 25 is then plated on (Fig. 4F) follow ⁇ ed by the thin layer 26 of gold (Fig. 4G) .
  • the hardened areas of photo-resist 22 are then stripped off as shown in Fig. 4H, and another layer 30 of the photo-resist is applied over all (Fig. 41).

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Electromagnetism (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Laser Beam Processing (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

A thin film structure is provided with the capability of low-power laser tuning and trimming. Trim windows (14) in a plated ground plane (12) are incorporated to allow automated tuning procedures using relatively low-power lasers. The trim windows are conductive, but the heavier layer (25) of plated copper is omitted from those areas, leaving only the titanium/evaporated copper/gold layers (18, 20, 26). The method can also provide for areas (28) of bare substrate if desired.

Description

THIN FILM STRUCTURE FOR CERAMIC SUBSTRATES
Background of the Invention
The present invention relates to the field of metallized substrates for communications applications and, more particularly, to a means of tuning thin film structures such as stripline filters, using automated low-power laser trimming.
Metallization on non-conductive substrates such as ceramics is well known in the art for such circuit compo¬ nents as stripline filters. Such filters typically include a configuration or pattern of conductive elements on one surface of the ceramic plate, these elements interacting with a relatively large area of ground plane on the opposing substrate surface. For electrical reasons, the ground plane is required to be a very low conductivity layer, typically including a heavy (one mil) layer of plated copper. Filters or other such components may require removal of a portion of the conductive ground plane for tuning or other adjustment. Such adjustments have been made by abrasion; i.e. , mechanically removing small portions of the ground plane in the appropriate areas, using a diamond grinding wheel or sand trimmer. It will be obvious that such a method does not lend itself to automated trimming procedures, where the cir¬ cuitry is monitored as it is tuned and the monitoring equipment controls an extremely precise laser beam. Thick film resistors on substrates can be trimmed precise ly by low-power ( 1. 8 kw input power) laser beams , but that power is not suff icient to trim a heavily plated ground plane.
Summary of the Invention
It is therefore an object of the present invention to provide a means of trimirting a ground plane or the like with a low-power laser beam.
It is a particular object to provide such a means utilizing standard process steps.
It is another object to provide additionally for removal of all conductive layers on other portions of the substrate.
These objects, and others which will become apparent, are provided in a structure and accompanying method in accordance with the present invention. On a non-conductive wafer, one or more conductive circuit components are formed on a first surface. A conductive layer or ground plane is formed on a substantial portion of the second surface of the wafer opposite at least one element of a circuit component which requires a fine tuning or trimming adjustment. The ground plane will consist of a thin conductive layer, such- as copper evaporated over titanium, a heavy conductive layer such as plated copper, and a thin protective layer of a noble metal such as gold. The heavy copper layer will have an aperture opposite at least a portion of the component to be adjusted. Therefore, tuning or trimming can be accom¬ plished by removing discrete areas of the thinner layers within the aperture in the heavy layer, using a relative¬ ly low-power laser beam, such as those used to trim thick film resistors.
O PI Brief Description of the Drawing
Fig. 1 is a bottom view of a stripline filter sub¬ strate.
Fig. 2 is a cut-away, perspective view of a portion of the substrate of Fig. 1, along the line 2-2. Fig. 3 shows the successive steps in one preferred embodiment of the invention.
Fig. 4 shows the successive steps in another embodi¬ ment, which provides for areas of bare substrate.
Detailed Description of the Preferred Embodiment
For purposes of clarity, the existing thin film process will be briefly described. On a non-conductive substrate, a very thin layer of titanium is deposited first to provide adhesion for the subsequent layers of metal. Next, a thin layer of copper is evaporated over the titanium. A photo-resist is applied and exposed to ultraviolet light through a mask, the unexposed areas resulting eventually in conductive areas. After the resist is developed, the unhardened portions are stripped off and a thick layer of copper is plated on the areas of bare copper. A thin layer of gold is plated on over all, then the hardened resist is stripped from the substrate. Etching subsequently removes all thin layers down to the bare substrate in the desired areas.
As may be seen in the drawing, the invention is used for the fine tuning (trimming) of a stripline filter on a substrate 10 (see Figs. 2-4) such as a ceramic wafer. In this example, the visible surface of the substrate is covered by a ground plane 12 having three apertures or "trim windows" 14. The other surface of the substrate 10 has on it (as indicated by dashed lines in Fig. 1) ele- ments 16A, 16B and 16C of the filter circuit. Stripline filters are well known in the art, and have previously been constructed using a layer of heavy copper throughout the ground plane. Tuning or other fine adjustment has been accomplished by use of an abrasion technique using a diamond grinding wheel. No further description of the circuit aspects of the filter will be given here, since the present invention is only concerned with the capability of fine tuning by the removal of discrete areas of the ground plane with a low-power laser beam.
In the cut-away, perspective view of Fig. 2, the filter of Fig. 1 is shown cut along the line 2-2 with the edges of circuit elements 16A, B and C visible on the lower surface (normally considered the top side of the filter) . The ground plane 12 and windows 14 are on the upper side of the ceramic wafer 10 in this view and it is apparent that the copper layer within the window 14 is thinner than it is in the adjacent areas. It is to be noted that no attempt has been made to scale any of the drawing figures; instead, typical dimensions are given as appropriate in the text.
Fig. 3 shows a series of progressive steps in producing the ground plane only of one embodiment of the invention. Fig. 3A shows the bare substrate 10 and Fig. 3B shows a very thin (500 A) added layer 18 of deposited titanium. In Fig. 3C, a thin (10,000 A) layer 20 of cop¬ per has been evaporated over the titanium layer 18. In Fig. 3D, a film 22 of a photo-resist (such as that sold commercially as Riston™ 218R) has been added, and a mask 24 is shown in position to expose the area 14' of the photo-resist film 22 for providing one window 14 (Figs. 1 and 2) . After the photo-resist has been exposed to ultraviolet light through the mask, and developed, the unhardened areas are removed as shown in Fig. 3E. A heavy (0.7 to 1.2 mils) layer 25 of copper is plated on all areas except area 14, as shown in Fig. 3F. The hard¬ ened resist 22 is then stripped off, as shown in Fig. 3G. o
As shown in Fig. 3H, a thin (5000 A) layer 26 of gold is plated over all exposed copper, both thick and thin layers. In the tuning operation, a low-powered laser beam can be manually or automatically controlled to remove as much of the thin layers of gold and copper in any of the windows 14 as is required; e.g., for tuning a stripline filter. In Fig. 4 is seen the series of progressive steps in an alternate embodiment which can provide both the trim windows 14 as shown in Fig. 3 and areas of bare substrate which may be desired for other purposes than tuning.
Figs. 4A-4D are the same as Figs. 3A-3D except that the mask 24-1 has an area 14' for providing the window or aperture 14 and another area 28' for providing an area 28 (see Fig. 4M) of bare substrate. After the photo¬ resist 22 has been exposed to ultraviolet light through the mask 24 and developed, the unhardened resist is removed as in Fig. 4E, leaving areas 22-1 and 22-2. The heavy copper layer 25 is then plated on (Fig. 4F) follow¬ ed by the thin layer 26 of gold (Fig. 4G) . The hardened areas of photo-resist 22 are then stripped off as shown in Fig. 4H, and another layer 30 of the photo-resist is applied over all (Fig. 41). All areas except area 14' of the photo-resist are exposed through a second mask 24-2, then the photo-resist is developed. After the unhardened resist is removed (Fig. 4J); i.e., the portion in the area 14', that area is plated with gold (layer 26) as shown in Fig. 4K. When the hardened resist is removed (Fig. 4L) , all exposed surfaces have been plated with gold except for the area 28'. An etching process (Fig. 4M) will remove the thin copper and titanium layer to provide bare substrate in the area 28. Thus there has been shown and described a means of providing a tunable circuit element on a substrate using only the standard process steps, and of tuning said element with a low-power laser beam. It is intended to cover all modifications and variations which fall within the spirit and scope of the appended claims.
What is claimed is:
-

Claims

Claims
1. An apparatus for use in communications equipment and comprising: a non-conductive wafer; conductive circuit elements formed on a first surface of said wafer; and a conductive element formed on a substantial portion of the second surface of said wafer, positioned opposite at least one of said circuit elements on the first wafer surface, and including a first conductive layer, a superimposed second conductive layer, the second layer being substantially thicker than the first layer and having an aperture opposite the at least one circuit element on the first wafer surface, and a third conduc¬ tive layer superimposed on the exposed portions of the first and second conductive layers and formed of a noble metal.
OMPI TPΠ
2. An apparatus in accordance with claim 1 wherein said first conductive layer is an evaporated layer and said second and third conductive layers are plated layers.
3. An apparatus' in accordance with claim 2 wherein said first and second layers are comprised of copper and said third layer is comprised of gold.
4. An apparatus in accordance with claim 1 wherein the conductive elements are formed on a fourth evaporated layer of a conductive material other than the material of said first, second and third conductive layers.
5. An apparatus in accordance with claim 4 wherein the fourth evaporated layer is comprised of titanium.
6. A method of tuning an apparatus for- use in communications equipment comprising the steps of: providing a non-conductive wafer; providing on a first major surface of said wafer at least one conductive circuit element; providing on' the second major surface of said substrate a relatively large conductive area having generally a first predetermined thickness and having, opposite the at least one circuit element, a portion of a second predetermined thickness, the second predetermined thickness being substantially thinner than the first predetermined thickness; and evaporating appropriate portions of the thinner portion of the large conductive area by means of a low- power beam.
7. A method in accordance with claim 6 wherein the step of evaporating portions of the large conductive area is performed with a laser beam.
8. A method of processing an apparatus for use in communications equipment comprising the following steps: a) providing a non-conductive wafer; b) providing conductive circuit elements on a first major surface of the wafer; c) evaporating a relatively thin layer of metal onto a second major surface of the wafer; d) covering said thin metal layer with a layer of photo-sensitive material; e) positioning a mask over said photo-sensitive material; f) exposing at least one portion of said photo¬ sensitive material to radiation through said mask; g) developing said photo-sensitive material; h) removing the uncured portions of said photo¬ sensitive material; i) plating a relatively heavy layer of metal on those portions of the first metal layer not covered by cured photo-sensitive material; j) removing the cured portions of the photo¬ sensitive material; k) plating a layer of noble metal over all exposed metal surfaces; and
1) tuning the apparatus by evaporating appro- priate portions of those areas of metal lacking the relatively heavily plated layer by means of a low-power beam.
9. A method in accordance with claim 8 and wherein the relatively thin layer of metal comprises a layer of titanium and a superimposed layer of copper.
10. A method in accordance with claim 8 wherein the relatively heavy layer of metal is comprised of copper.
11. A method in accordance with claim 8 wherein the noble metal is gold.
12. A method in accordance with claim 8 wherein at least two portions of the layer of photo-sensitive mater- ial are exposed to radiation through the first mask and wherein the steps of removing the cured portions of photo-sensitive material and plating with a noble metal are reversed, and further including the steps of: k) covering the surface with a second layer of photo-sensitive material;
1) positioning a second mask over said second layer of photo-sensitive material; m) exposing portions of said second layer to radiation through said second mask, said portions exclud- ' ing at least one area not covered by the heavy layer of metal; n) developing said second layer of photo¬ sensitive material; o) removing the uncured portions of said second layer of photo-sensitive material; p) plating a second layer of a noble metal over all exposed metal; q) removing all cured portions of said second layer of photo-sensitive material; and r) removing all thin layers of metal not cov¬ ered by a noble metal.
OMPI
/., IIPPOO »
13. A method in accordance with claim 12 wherein the step of removing thin layers of metal is done by an etch¬ ing process.
PCT/US1980/001202 1979-10-15 1980-09-15 Thin film structure for ceramic substrates WO1981001079A1 (en)

Priority Applications (1)

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DE8080902196T DE3068442D1 (en) 1979-10-15 1980-09-15 Thin film structure for ceramic substrates

Applications Claiming Priority (2)

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US06/084,941 US4288530A (en) 1979-10-15 1979-10-15 Method of tuning apparatus by low power laser beam removal
US84941 1979-10-15

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US (1) US4288530A (en)
EP (1) EP0037421B1 (en)
JP (1) JPS6239846B2 (en)
CA (1) CA1145858A (en)
DE (1) DE3068442D1 (en)
WO (1) WO1981001079A1 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0093956A2 (en) * 1982-05-10 1983-11-16 Oki Electric Industry Company, Limited A dielectric filter
FR2598339A1 (en) * 1986-05-06 1987-11-13 Europ Agence Spatiale PARABOLIC REFLECTOR ANTENNAS AND METHOD FOR OBTAINING THE SAME
EP0298434A2 (en) * 1987-07-08 1989-01-11 Siemens Aktiengesellschaft Thin-film quadrature coupler
EP0324512A2 (en) * 1982-05-10 1989-07-19 Oki Electric Industry Company, Limited A dielectric filter
EP0343345A1 (en) * 1988-03-30 1989-11-29 NGK Spark Plug Co. Ltd. Stripline filter
EP0415558A2 (en) * 1989-08-31 1991-03-06 NGK Spark Plug Co. Ltd. Bandpass filter and method of trimming response characteristics thereof
EP0606813A2 (en) * 1992-12-29 1994-07-20 International Business Machines Corporation Process for corrosion free multi-layer metal conductors

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4467312A (en) * 1980-12-23 1984-08-21 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor resistor device
FR2524247A1 (en) * 1982-03-23 1983-09-30 Thomson Csf METHOD FOR MANUFACTURING PRINTED CIRCUITS WITH INDIVIDUAL CONDUCTIVE RIGID METAL SUPPORT
US4769883A (en) * 1983-03-07 1988-09-13 Westinghouse Electric Corp. Method for tuning a microwave integrated circuit
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EP0093956A2 (en) * 1982-05-10 1983-11-16 Oki Electric Industry Company, Limited A dielectric filter
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EP0298434A3 (en) * 1987-07-08 1990-05-02 Siemens Aktiengesellschaft Thin-film quadrature coupler
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JPS56501149A (en) 1981-08-13
CA1145858A (en) 1983-05-03
JPS6239846B2 (en) 1987-08-25
DE3068442D1 (en) 1984-08-09
EP0037421B1 (en) 1984-07-04
US4288530A (en) 1981-09-08
EP0037421A1 (en) 1981-10-14
EP0037421A4 (en) 1982-01-26

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